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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX5;6; Verify that fast-isel doesn't select legacy SSE instructions on targets that7; feature AVX.8;9; Test cases are obtained from the following code snippet:10; ///11; double single_to_double_rr(float x) {12; return (double)x;13; }14; float double_to_single_rr(double x) {15; return (float)x;16; }17; double single_to_double_rm(ptr x) {18; return (double)*x;19; }20; float double_to_single_rm(ptr x) {21; return (float)*x;22; }23; ///24 25define double @single_to_double_rr(float %x) {26; SSE-LABEL: single_to_double_rr:27; SSE: # %bb.0: # %entry28; SSE-NEXT: cvtss2sd %xmm0, %xmm029; SSE-NEXT: retq30;31; AVX-LABEL: single_to_double_rr:32; AVX: # %bb.0: # %entry33; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm034; AVX-NEXT: retq35entry:36 %conv = fpext float %x to double37 ret double %conv38}39 40define float @double_to_single_rr(double %x) {41; SSE-LABEL: double_to_single_rr:42; SSE: # %bb.0: # %entry43; SSE-NEXT: cvtsd2ss %xmm0, %xmm044; SSE-NEXT: retq45;46; AVX-LABEL: double_to_single_rr:47; AVX: # %bb.0: # %entry48; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm049; AVX-NEXT: retq50entry:51 %conv = fptrunc double %x to float52 ret float %conv53}54 55define double @single_to_double_rm(ptr %x) {56; SSE-LABEL: single_to_double_rm:57; SSE: # %bb.0: # %entry58; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero59; SSE-NEXT: cvtss2sd %xmm0, %xmm060; SSE-NEXT: retq61;62; AVX-LABEL: single_to_double_rm:63; AVX: # %bb.0: # %entry64; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero65; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm066; AVX-NEXT: retq67entry:68 %0 = load float, ptr %x, align 469 %conv = fpext float %0 to double70 ret double %conv71}72 73define double @single_to_double_rm_optsize(ptr %x) optsize {74; SSE-LABEL: single_to_double_rm_optsize:75; SSE: # %bb.0: # %entry76; SSE-NEXT: cvtss2sd (%rdi), %xmm077; SSE-NEXT: retq78;79; AVX-LABEL: single_to_double_rm_optsize:80; AVX: # %bb.0: # %entry81; AVX-NEXT: vcvtss2sd (%rdi), %xmm15, %xmm082; AVX-NEXT: retq83entry:84 %0 = load float, ptr %x, align 485 %conv = fpext float %0 to double86 ret double %conv87}88 89define float @double_to_single_rm(ptr %x) {90; SSE-LABEL: double_to_single_rm:91; SSE: # %bb.0: # %entry92; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero93; SSE-NEXT: cvtsd2ss %xmm0, %xmm094; SSE-NEXT: retq95;96; AVX-LABEL: double_to_single_rm:97; AVX: # %bb.0: # %entry98; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero99; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0100; AVX-NEXT: retq101entry:102 %0 = load double, ptr %x, align 8103 %conv = fptrunc double %0 to float104 ret float %conv105}106 107define float @double_to_single_rm_optsize(ptr %x) optsize {108; SSE-LABEL: double_to_single_rm_optsize:109; SSE: # %bb.0: # %entry110; SSE-NEXT: cvtsd2ss (%rdi), %xmm0111; SSE-NEXT: retq112;113; AVX-LABEL: double_to_single_rm_optsize:114; AVX: # %bb.0: # %entry115; AVX-NEXT: vcvtsd2ss (%rdi), %xmm15, %xmm0116; AVX-NEXT: retq117entry:118 %0 = load double, ptr %x, align 8119 %conv = fptrunc double %0 to float120 ret float %conv121}122