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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE23; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX4; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX5 6 7define double @long_to_double_rr(i64 %a) {8; SSE2-LABEL: long_to_double_rr:9; SSE2: # %bb.0: # %entry10; SSE2-NEXT: cvtsi2sd %rdi, %xmm011; SSE2-NEXT: retq12;13; AVX-LABEL: long_to_double_rr:14; AVX: # %bb.0: # %entry15; AVX-NEXT: vcvtsi2sd %rdi, %xmm15, %xmm016; AVX-NEXT: retq17entry:18 %0 = sitofp i64 %a to double19 ret double %020}21 22define double @long_to_double_rm(ptr %a) {23; SSE2-LABEL: long_to_double_rm:24; SSE2: # %bb.0: # %entry25; SSE2-NEXT: cvtsi2sdq (%rdi), %xmm026; SSE2-NEXT: retq27;28; AVX-LABEL: long_to_double_rm:29; AVX: # %bb.0: # %entry30; AVX-NEXT: vcvtsi2sdq (%rdi), %xmm15, %xmm031; AVX-NEXT: retq32entry:33 %0 = load i64, ptr %a34 %1 = sitofp i64 %0 to double35 ret double %136}37 38define double @long_to_double_rm_optsize(ptr %a) optsize {39; SSE2-LABEL: long_to_double_rm_optsize:40; SSE2: # %bb.0: # %entry41; SSE2-NEXT: cvtsi2sdq (%rdi), %xmm042; SSE2-NEXT: retq43;44; AVX-LABEL: long_to_double_rm_optsize:45; AVX: # %bb.0: # %entry46; AVX-NEXT: vcvtsi2sdq (%rdi), %xmm15, %xmm047; AVX-NEXT: retq48entry:49 %0 = load i64, ptr %a50 %1 = sitofp i64 %0 to double51 ret double %152}53 54define float @long_to_float_rr(i64 %a) {55; SSE2-LABEL: long_to_float_rr:56; SSE2: # %bb.0: # %entry57; SSE2-NEXT: cvtsi2ss %rdi, %xmm058; SSE2-NEXT: retq59;60; AVX-LABEL: long_to_float_rr:61; AVX: # %bb.0: # %entry62; AVX-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm063; AVX-NEXT: retq64entry:65 %0 = sitofp i64 %a to float66 ret float %067}68 69define float @long_to_float_rm(ptr %a) {70; SSE2-LABEL: long_to_float_rm:71; SSE2: # %bb.0: # %entry72; SSE2-NEXT: cvtsi2ssq (%rdi), %xmm073; SSE2-NEXT: retq74;75; AVX-LABEL: long_to_float_rm:76; AVX: # %bb.0: # %entry77; AVX-NEXT: vcvtsi2ssq (%rdi), %xmm15, %xmm078; AVX-NEXT: retq79entry:80 %0 = load i64, ptr %a81 %1 = sitofp i64 %0 to float82 ret float %183}84 85define float @long_to_float_rm_optsize(ptr %a) optsize {86; SSE2-LABEL: long_to_float_rm_optsize:87; SSE2: # %bb.0: # %entry88; SSE2-NEXT: cvtsi2ssq (%rdi), %xmm089; SSE2-NEXT: retq90;91; AVX-LABEL: long_to_float_rm_optsize:92; AVX: # %bb.0: # %entry93; AVX-NEXT: vcvtsi2ssq (%rdi), %xmm15, %xmm094; AVX-NEXT: retq95entry:96 %0 = load i64, ptr %a97 %1 = sitofp i64 %0 to float98 ret float %199}100