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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=SDAG3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=FAST4; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX5; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX6 7; Test all the cmp predicates that can feed an integer conditional move.8 9define i64 @select_fcmp_false_cmov(double %a, double %b, i64 %c, i64 %d) {10; CHECK-LABEL: select_fcmp_false_cmov:11; CHECK: ## %bb.0:12; CHECK-NEXT: movq %rsi, %rax13; CHECK-NEXT: retq14 %1 = fcmp false double %a, %b15 %2 = select i1 %1, i64 %c, i64 %d16 ret i64 %217}18 19define i64 @select_fcmp_oeq_cmov(double %a, double %b, i64 %c, i64 %d) {20; SDAG-LABEL: select_fcmp_oeq_cmov:21; SDAG: ## %bb.0:22; SDAG-NEXT: movq %rdi, %rax23; SDAG-NEXT: ucomisd %xmm1, %xmm024; SDAG-NEXT: cmovneq %rsi, %rax25; SDAG-NEXT: cmovpq %rsi, %rax26; SDAG-NEXT: retq27;28; FAST-LABEL: select_fcmp_oeq_cmov:29; FAST: ## %bb.0:30; FAST-NEXT: movq %rdi, %rax31; FAST-NEXT: ucomisd %xmm1, %xmm032; FAST-NEXT: setnp %cl33; FAST-NEXT: sete %dl34; FAST-NEXT: testb %cl, %dl35; FAST-NEXT: cmoveq %rsi, %rax36; FAST-NEXT: retq37;38; FAST_AVX-LABEL: select_fcmp_oeq_cmov:39; FAST_AVX: ## %bb.0:40; FAST_AVX-NEXT: movq %rdi, %rax41; FAST_AVX-NEXT: vucomisd %xmm1, %xmm042; FAST_AVX-NEXT: setnp %cl43; FAST_AVX-NEXT: sete %dl44; FAST_AVX-NEXT: testb %cl, %dl45; FAST_AVX-NEXT: cmoveq %rsi, %rax46; FAST_AVX-NEXT: retq47 %1 = fcmp oeq double %a, %b48 %2 = select i1 %1, i64 %c, i64 %d49 ret i64 %250}51 52define i64 @select_fcmp_ogt_cmov(double %a, double %b, i64 %c, i64 %d) {53; NOAVX-LABEL: select_fcmp_ogt_cmov:54; NOAVX: ## %bb.0:55; NOAVX-NEXT: movq %rdi, %rax56; NOAVX-NEXT: ucomisd %xmm1, %xmm057; NOAVX-NEXT: cmovbeq %rsi, %rax58; NOAVX-NEXT: retq59;60; FAST_AVX-LABEL: select_fcmp_ogt_cmov:61; FAST_AVX: ## %bb.0:62; FAST_AVX-NEXT: movq %rdi, %rax63; FAST_AVX-NEXT: vucomisd %xmm1, %xmm064; FAST_AVX-NEXT: cmovbeq %rsi, %rax65; FAST_AVX-NEXT: retq66 %1 = fcmp ogt double %a, %b67 %2 = select i1 %1, i64 %c, i64 %d68 ret i64 %269}70 71define i64 @select_fcmp_oge_cmov(double %a, double %b, i64 %c, i64 %d) {72; NOAVX-LABEL: select_fcmp_oge_cmov:73; NOAVX: ## %bb.0:74; NOAVX-NEXT: movq %rdi, %rax75; NOAVX-NEXT: ucomisd %xmm1, %xmm076; NOAVX-NEXT: cmovbq %rsi, %rax77; NOAVX-NEXT: retq78;79; FAST_AVX-LABEL: select_fcmp_oge_cmov:80; FAST_AVX: ## %bb.0:81; FAST_AVX-NEXT: movq %rdi, %rax82; FAST_AVX-NEXT: vucomisd %xmm1, %xmm083; FAST_AVX-NEXT: cmovbq %rsi, %rax84; FAST_AVX-NEXT: retq85 %1 = fcmp oge double %a, %b86 %2 = select i1 %1, i64 %c, i64 %d87 ret i64 %288}89 90define i64 @select_fcmp_olt_cmov(double %a, double %b, i64 %c, i64 %d) {91; NOAVX-LABEL: select_fcmp_olt_cmov:92; NOAVX: ## %bb.0:93; NOAVX-NEXT: movq %rdi, %rax94; NOAVX-NEXT: ucomisd %xmm0, %xmm195; NOAVX-NEXT: cmovbeq %rsi, %rax96; NOAVX-NEXT: retq97;98; FAST_AVX-LABEL: select_fcmp_olt_cmov:99; FAST_AVX: ## %bb.0:100; FAST_AVX-NEXT: movq %rdi, %rax101; FAST_AVX-NEXT: vucomisd %xmm0, %xmm1102; FAST_AVX-NEXT: cmovbeq %rsi, %rax103; FAST_AVX-NEXT: retq104 %1 = fcmp olt double %a, %b105 %2 = select i1 %1, i64 %c, i64 %d106 ret i64 %2107}108 109define i64 @select_fcmp_ole_cmov(double %a, double %b, i64 %c, i64 %d) {110; NOAVX-LABEL: select_fcmp_ole_cmov:111; NOAVX: ## %bb.0:112; NOAVX-NEXT: movq %rdi, %rax113; NOAVX-NEXT: ucomisd %xmm0, %xmm1114; NOAVX-NEXT: cmovbq %rsi, %rax115; NOAVX-NEXT: retq116;117; FAST_AVX-LABEL: select_fcmp_ole_cmov:118; FAST_AVX: ## %bb.0:119; FAST_AVX-NEXT: movq %rdi, %rax120; FAST_AVX-NEXT: vucomisd %xmm0, %xmm1121; FAST_AVX-NEXT: cmovbq %rsi, %rax122; FAST_AVX-NEXT: retq123 %1 = fcmp ole double %a, %b124 %2 = select i1 %1, i64 %c, i64 %d125 ret i64 %2126}127 128define i64 @select_fcmp_one_cmov(double %a, double %b, i64 %c, i64 %d) {129; NOAVX-LABEL: select_fcmp_one_cmov:130; NOAVX: ## %bb.0:131; NOAVX-NEXT: movq %rdi, %rax132; NOAVX-NEXT: ucomisd %xmm1, %xmm0133; NOAVX-NEXT: cmoveq %rsi, %rax134; NOAVX-NEXT: retq135;136; FAST_AVX-LABEL: select_fcmp_one_cmov:137; FAST_AVX: ## %bb.0:138; FAST_AVX-NEXT: movq %rdi, %rax139; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0140; FAST_AVX-NEXT: cmoveq %rsi, %rax141; FAST_AVX-NEXT: retq142 %1 = fcmp one double %a, %b143 %2 = select i1 %1, i64 %c, i64 %d144 ret i64 %2145}146 147define i64 @select_fcmp_ord_cmov(double %a, double %b, i64 %c, i64 %d) {148; NOAVX-LABEL: select_fcmp_ord_cmov:149; NOAVX: ## %bb.0:150; NOAVX-NEXT: movq %rdi, %rax151; NOAVX-NEXT: ucomisd %xmm1, %xmm0152; NOAVX-NEXT: cmovpq %rsi, %rax153; NOAVX-NEXT: retq154;155; FAST_AVX-LABEL: select_fcmp_ord_cmov:156; FAST_AVX: ## %bb.0:157; FAST_AVX-NEXT: movq %rdi, %rax158; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0159; FAST_AVX-NEXT: cmovpq %rsi, %rax160; FAST_AVX-NEXT: retq161 %1 = fcmp ord double %a, %b162 %2 = select i1 %1, i64 %c, i64 %d163 ret i64 %2164}165 166define i64 @select_fcmp_uno_cmov(double %a, double %b, i64 %c, i64 %d) {167; NOAVX-LABEL: select_fcmp_uno_cmov:168; NOAVX: ## %bb.0:169; NOAVX-NEXT: movq %rdi, %rax170; NOAVX-NEXT: ucomisd %xmm1, %xmm0171; NOAVX-NEXT: cmovnpq %rsi, %rax172; NOAVX-NEXT: retq173;174; FAST_AVX-LABEL: select_fcmp_uno_cmov:175; FAST_AVX: ## %bb.0:176; FAST_AVX-NEXT: movq %rdi, %rax177; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0178; FAST_AVX-NEXT: cmovnpq %rsi, %rax179; FAST_AVX-NEXT: retq180 %1 = fcmp uno double %a, %b181 %2 = select i1 %1, i64 %c, i64 %d182 ret i64 %2183}184 185define i64 @select_fcmp_ueq_cmov(double %a, double %b, i64 %c, i64 %d) {186; NOAVX-LABEL: select_fcmp_ueq_cmov:187; NOAVX: ## %bb.0:188; NOAVX-NEXT: movq %rdi, %rax189; NOAVX-NEXT: ucomisd %xmm1, %xmm0190; NOAVX-NEXT: cmovneq %rsi, %rax191; NOAVX-NEXT: retq192;193; FAST_AVX-LABEL: select_fcmp_ueq_cmov:194; FAST_AVX: ## %bb.0:195; FAST_AVX-NEXT: movq %rdi, %rax196; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0197; FAST_AVX-NEXT: cmovneq %rsi, %rax198; FAST_AVX-NEXT: retq199 %1 = fcmp ueq double %a, %b200 %2 = select i1 %1, i64 %c, i64 %d201 ret i64 %2202}203 204define i64 @select_fcmp_ugt_cmov(double %a, double %b, i64 %c, i64 %d) {205; NOAVX-LABEL: select_fcmp_ugt_cmov:206; NOAVX: ## %bb.0:207; NOAVX-NEXT: movq %rdi, %rax208; NOAVX-NEXT: ucomisd %xmm0, %xmm1209; NOAVX-NEXT: cmovaeq %rsi, %rax210; NOAVX-NEXT: retq211;212; FAST_AVX-LABEL: select_fcmp_ugt_cmov:213; FAST_AVX: ## %bb.0:214; FAST_AVX-NEXT: movq %rdi, %rax215; FAST_AVX-NEXT: vucomisd %xmm0, %xmm1216; FAST_AVX-NEXT: cmovaeq %rsi, %rax217; FAST_AVX-NEXT: retq218 %1 = fcmp ugt double %a, %b219 %2 = select i1 %1, i64 %c, i64 %d220 ret i64 %2221}222 223define i64 @select_fcmp_uge_cmov(double %a, double %b, i64 %c, i64 %d) {224; NOAVX-LABEL: select_fcmp_uge_cmov:225; NOAVX: ## %bb.0:226; NOAVX-NEXT: movq %rdi, %rax227; NOAVX-NEXT: ucomisd %xmm0, %xmm1228; NOAVX-NEXT: cmovaq %rsi, %rax229; NOAVX-NEXT: retq230;231; FAST_AVX-LABEL: select_fcmp_uge_cmov:232; FAST_AVX: ## %bb.0:233; FAST_AVX-NEXT: movq %rdi, %rax234; FAST_AVX-NEXT: vucomisd %xmm0, %xmm1235; FAST_AVX-NEXT: cmovaq %rsi, %rax236; FAST_AVX-NEXT: retq237 %1 = fcmp uge double %a, %b238 %2 = select i1 %1, i64 %c, i64 %d239 ret i64 %2240}241 242define i64 @select_fcmp_ult_cmov(double %a, double %b, i64 %c, i64 %d) {243; NOAVX-LABEL: select_fcmp_ult_cmov:244; NOAVX: ## %bb.0:245; NOAVX-NEXT: movq %rdi, %rax246; NOAVX-NEXT: ucomisd %xmm1, %xmm0247; NOAVX-NEXT: cmovaeq %rsi, %rax248; NOAVX-NEXT: retq249;250; FAST_AVX-LABEL: select_fcmp_ult_cmov:251; FAST_AVX: ## %bb.0:252; FAST_AVX-NEXT: movq %rdi, %rax253; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0254; FAST_AVX-NEXT: cmovaeq %rsi, %rax255; FAST_AVX-NEXT: retq256 %1 = fcmp ult double %a, %b257 %2 = select i1 %1, i64 %c, i64 %d258 ret i64 %2259}260 261define i64 @select_fcmp_ule_cmov(double %a, double %b, i64 %c, i64 %d) {262; NOAVX-LABEL: select_fcmp_ule_cmov:263; NOAVX: ## %bb.0:264; NOAVX-NEXT: movq %rdi, %rax265; NOAVX-NEXT: ucomisd %xmm1, %xmm0266; NOAVX-NEXT: cmovaq %rsi, %rax267; NOAVX-NEXT: retq268;269; FAST_AVX-LABEL: select_fcmp_ule_cmov:270; FAST_AVX: ## %bb.0:271; FAST_AVX-NEXT: movq %rdi, %rax272; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0273; FAST_AVX-NEXT: cmovaq %rsi, %rax274; FAST_AVX-NEXT: retq275 %1 = fcmp ule double %a, %b276 %2 = select i1 %1, i64 %c, i64 %d277 ret i64 %2278}279 280define i64 @select_fcmp_une_cmov(double %a, double %b, i64 %c, i64 %d) {281; SDAG-LABEL: select_fcmp_une_cmov:282; SDAG: ## %bb.0:283; SDAG-NEXT: movq %rsi, %rax284; SDAG-NEXT: ucomisd %xmm1, %xmm0285; SDAG-NEXT: cmovneq %rdi, %rax286; SDAG-NEXT: cmovpq %rdi, %rax287; SDAG-NEXT: retq288;289; FAST-LABEL: select_fcmp_une_cmov:290; FAST: ## %bb.0:291; FAST-NEXT: movq %rdi, %rax292; FAST-NEXT: ucomisd %xmm1, %xmm0293; FAST-NEXT: setp %cl294; FAST-NEXT: setne %dl295; FAST-NEXT: orb %cl, %dl296; FAST-NEXT: cmoveq %rsi, %rax297; FAST-NEXT: retq298;299; FAST_AVX-LABEL: select_fcmp_une_cmov:300; FAST_AVX: ## %bb.0:301; FAST_AVX-NEXT: movq %rdi, %rax302; FAST_AVX-NEXT: vucomisd %xmm1, %xmm0303; FAST_AVX-NEXT: setp %cl304; FAST_AVX-NEXT: setne %dl305; FAST_AVX-NEXT: orb %cl, %dl306; FAST_AVX-NEXT: cmoveq %rsi, %rax307; FAST_AVX-NEXT: retq308 %1 = fcmp une double %a, %b309 %2 = select i1 %1, i64 %c, i64 %d310 ret i64 %2311}312 313define i64 @select_fcmp_true_cmov(double %a, double %b, i64 %c, i64 %d) {314; CHECK-LABEL: select_fcmp_true_cmov:315; CHECK: ## %bb.0:316; CHECK-NEXT: movq %rdi, %rax317; CHECK-NEXT: retq318 %1 = fcmp true double %a, %b319 %2 = select i1 %1, i64 %c, i64 %d320 ret i64 %2321}322 323define i64 @select_icmp_eq_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {324; CHECK-LABEL: select_icmp_eq_cmov:325; CHECK: ## %bb.0:326; CHECK-NEXT: movq %rdx, %rax327; CHECK-NEXT: cmpq %rsi, %rdi328; CHECK-NEXT: cmovneq %rcx, %rax329; CHECK-NEXT: retq330 %1 = icmp eq i64 %a, %b331 %2 = select i1 %1, i64 %c, i64 %d332 ret i64 %2333}334 335define i64 @select_icmp_ne_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {336; CHECK-LABEL: select_icmp_ne_cmov:337; CHECK: ## %bb.0:338; CHECK-NEXT: movq %rdx, %rax339; CHECK-NEXT: cmpq %rsi, %rdi340; CHECK-NEXT: cmoveq %rcx, %rax341; CHECK-NEXT: retq342 %1 = icmp ne i64 %a, %b343 %2 = select i1 %1, i64 %c, i64 %d344 ret i64 %2345}346 347define i64 @select_icmp_ugt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {348; CHECK-LABEL: select_icmp_ugt_cmov:349; CHECK: ## %bb.0:350; CHECK-NEXT: movq %rdx, %rax351; CHECK-NEXT: cmpq %rsi, %rdi352; CHECK-NEXT: cmovbeq %rcx, %rax353; CHECK-NEXT: retq354 %1 = icmp ugt i64 %a, %b355 %2 = select i1 %1, i64 %c, i64 %d356 ret i64 %2357}358 359 360define i64 @select_icmp_uge_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {361; CHECK-LABEL: select_icmp_uge_cmov:362; CHECK: ## %bb.0:363; CHECK-NEXT: movq %rdx, %rax364; CHECK-NEXT: cmpq %rsi, %rdi365; CHECK-NEXT: cmovbq %rcx, %rax366; CHECK-NEXT: retq367 %1 = icmp uge i64 %a, %b368 %2 = select i1 %1, i64 %c, i64 %d369 ret i64 %2370}371 372define i64 @select_icmp_ult_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {373; CHECK-LABEL: select_icmp_ult_cmov:374; CHECK: ## %bb.0:375; CHECK-NEXT: movq %rdx, %rax376; CHECK-NEXT: cmpq %rsi, %rdi377; CHECK-NEXT: cmovaeq %rcx, %rax378; CHECK-NEXT: retq379 %1 = icmp ult i64 %a, %b380 %2 = select i1 %1, i64 %c, i64 %d381 ret i64 %2382}383 384define i64 @select_icmp_ule_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {385; CHECK-LABEL: select_icmp_ule_cmov:386; CHECK: ## %bb.0:387; CHECK-NEXT: movq %rdx, %rax388; CHECK-NEXT: cmpq %rsi, %rdi389; CHECK-NEXT: cmovaq %rcx, %rax390; CHECK-NEXT: retq391 %1 = icmp ule i64 %a, %b392 %2 = select i1 %1, i64 %c, i64 %d393 ret i64 %2394}395 396define i64 @select_icmp_sgt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {397; CHECK-LABEL: select_icmp_sgt_cmov:398; CHECK: ## %bb.0:399; CHECK-NEXT: movq %rdx, %rax400; CHECK-NEXT: cmpq %rsi, %rdi401; CHECK-NEXT: cmovleq %rcx, %rax402; CHECK-NEXT: retq403 %1 = icmp sgt i64 %a, %b404 %2 = select i1 %1, i64 %c, i64 %d405 ret i64 %2406}407 408define i64 @select_icmp_sge_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {409; CHECK-LABEL: select_icmp_sge_cmov:410; CHECK: ## %bb.0:411; CHECK-NEXT: movq %rdx, %rax412; CHECK-NEXT: cmpq %rsi, %rdi413; CHECK-NEXT: cmovlq %rcx, %rax414; CHECK-NEXT: retq415 %1 = icmp sge i64 %a, %b416 %2 = select i1 %1, i64 %c, i64 %d417 ret i64 %2418}419 420define i64 @select_icmp_slt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {421; CHECK-LABEL: select_icmp_slt_cmov:422; CHECK: ## %bb.0:423; CHECK-NEXT: movq %rdx, %rax424; CHECK-NEXT: cmpq %rsi, %rdi425; CHECK-NEXT: cmovgeq %rcx, %rax426; CHECK-NEXT: retq427 %1 = icmp slt i64 %a, %b428 %2 = select i1 %1, i64 %c, i64 %d429 ret i64 %2430}431 432define i64 @select_icmp_sle_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {433; CHECK-LABEL: select_icmp_sle_cmov:434; CHECK: ## %bb.0:435; CHECK-NEXT: movq %rdx, %rax436; CHECK-NEXT: cmpq %rsi, %rdi437; CHECK-NEXT: cmovgq %rcx, %rax438; CHECK-NEXT: retq439 %1 = icmp sle i64 %a, %b440 %2 = select i1 %1, i64 %c, i64 %d441 ret i64 %2442}443 444