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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s3; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s4; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=i386-- < %s | FileCheck --check-prefixes=X86,X86-BWON %s5; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=i386-- < %s | FileCheck --check-prefixes=X86,X86-BWOFF %s6 7target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"8 9define i8 @test_movb(i8 %a0) nounwind {10; X64-LABEL: test_movb:11; X64:       # %bb.0:12; X64-NEXT:    movl %edi, %eax13; X64-NEXT:    # kill: def $al killed $al killed $eax14; X64-NEXT:    retq15;16; X86-BWON-LABEL: test_movb:17; X86-BWON:       # %bb.0:18; X86-BWON-NEXT:    movzbl {{[0-9]+}}(%esp), %eax19; X86-BWON-NEXT:    retl20;21; X86-BWOFF-LABEL: test_movb:22; X86-BWOFF:       # %bb.0:23; X86-BWOFF-NEXT:    movb {{[0-9]+}}(%esp), %al24; X86-BWOFF-NEXT:    retl25  ret i8 %a026}27 28define i8 @test_movb_Os(i8 %a0) nounwind optsize {29; X64-LABEL: test_movb_Os:30; X64:       # %bb.0:31; X64-NEXT:    movl %edi, %eax32; X64-NEXT:    # kill: def $al killed $al killed $eax33; X64-NEXT:    retq34;35; X86-LABEL: test_movb_Os:36; X86:       # %bb.0:37; X86-NEXT:    movb {{[0-9]+}}(%esp), %al38; X86-NEXT:    retl39  ret i8 %a040}41 42define i8 @test_movb_Oz(i8 %a0) nounwind minsize {43; X64-LABEL: test_movb_Oz:44; X64:       # %bb.0:45; X64-NEXT:    movl %edi, %eax46; X64-NEXT:    # kill: def $al killed $al killed $eax47; X64-NEXT:    retq48;49; X86-LABEL: test_movb_Oz:50; X86:       # %bb.0:51; X86-NEXT:    movb {{[0-9]+}}(%esp), %al52; X86-NEXT:    retl53  ret i8 %a054}55 56define i16 @test_movw(i16 %a0) {57; X64-LABEL: test_movw:58; X64:       # %bb.0:59; X64-NEXT:    movl %edi, %eax60; X64-NEXT:    # kill: def $ax killed $ax killed $eax61; X64-NEXT:    retq62;63; X86-BWON-LABEL: test_movw:64; X86-BWON:       # %bb.0:65; X86-BWON-NEXT:    movzwl {{[0-9]+}}(%esp), %eax66; X86-BWON-NEXT:    retl67;68; X86-BWOFF-LABEL: test_movw:69; X86-BWOFF:       # %bb.0:70; X86-BWOFF-NEXT:    movw {{[0-9]+}}(%esp), %ax71; X86-BWOFF-NEXT:    retl72  ret i16 %a073}74 75; Verify we don't mess with H-reg copies (only generated in 32-bit mode).76define i8 @test_movb_hreg(i16 %a0) {77; X64-LABEL: test_movb_hreg:78; X64:       # %bb.0:79; X64-NEXT:    # kill: def $edi killed $edi def $rdi80; X64-NEXT:    movl %edi, %eax81; X64-NEXT:    shrl $8, %eax82; X64-NEXT:    addl %edi, %eax83; X64-NEXT:    # kill: def $al killed $al killed $eax84; X64-NEXT:    retq85;86; X86-LABEL: test_movb_hreg:87; X86:       # %bb.0:88; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax89; X86-NEXT:    addb %al, %ah90; X86-NEXT:    movb %ah, %al91; X86-NEXT:    retl92  %tmp0 = trunc i16 %a0 to i893  %tmp1 = lshr i16 %a0, 894  %tmp2 = trunc i16 %tmp1 to i895  %tmp3 = add i8 %tmp0, %tmp296  ret i8 %tmp397}98