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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefixes=FMA,FMA-INFS3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma | FileCheck %s --check-prefixes=FMA4,FMA4-INFS4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 | FileCheck %s --check-prefixes=FMA4,FMA4-INFS5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512-INFS6 7;8; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z)9;10 11define float @test_f32_fmadd(float %a0, float %a1, float %a2) {12; FMA-LABEL: test_f32_fmadd:13; FMA: # %bb.0:14; FMA-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm215; FMA-NEXT: retq16;17; FMA4-LABEL: test_f32_fmadd:18; FMA4: # %bb.0:19; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm220; FMA4-NEXT: retq21;22; AVX512-LABEL: test_f32_fmadd:23; AVX512: # %bb.0:24; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm225; AVX512-NEXT: retq26 %x = fmul contract float %a0, %a127 %res = fadd contract float %x, %a228 ret float %res29}30 31define <4 x float> @test_4f32_fmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {32; FMA-LABEL: test_4f32_fmadd:33; FMA: # %bb.0:34; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm235; FMA-NEXT: retq36;37; FMA4-LABEL: test_4f32_fmadd:38; FMA4: # %bb.0:39; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm240; FMA4-NEXT: retq41;42; AVX512-LABEL: test_4f32_fmadd:43; AVX512: # %bb.0:44; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm245; AVX512-NEXT: retq46 %x = fmul contract <4 x float> %a0, %a147 %res = fadd contract <4 x float> %x, %a248 ret <4 x float> %res49}50 51define <8 x float> @test_8f32_fmadd(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {52; FMA-LABEL: test_8f32_fmadd:53; FMA: # %bb.0:54; FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm255; FMA-NEXT: retq56;57; FMA4-LABEL: test_8f32_fmadd:58; FMA4: # %bb.0:59; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm260; FMA4-NEXT: retq61;62; AVX512-LABEL: test_8f32_fmadd:63; AVX512: # %bb.0:64; AVX512-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm265; AVX512-NEXT: retq66 %x = fmul contract <8 x float> %a0, %a167 %res = fadd contract <8 x float> %x, %a268 ret <8 x float> %res69}70 71define double @test_f64_fmadd(double %a0, double %a1, double %a2) {72; FMA-LABEL: test_f64_fmadd:73; FMA: # %bb.0:74; FMA-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm275; FMA-NEXT: retq76;77; FMA4-LABEL: test_f64_fmadd:78; FMA4: # %bb.0:79; FMA4-NEXT: vfmaddsd {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm280; FMA4-NEXT: retq81;82; AVX512-LABEL: test_f64_fmadd:83; AVX512: # %bb.0:84; AVX512-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm285; AVX512-NEXT: retq86 %x = fmul contract double %a0, %a187 %res = fadd contract double %x, %a288 ret double %res89}90 91define <2 x double> @test_2f64_fmadd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {92; FMA-LABEL: test_2f64_fmadd:93; FMA: # %bb.0:94; FMA-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm295; FMA-NEXT: retq96;97; FMA4-LABEL: test_2f64_fmadd:98; FMA4: # %bb.0:99; FMA4-NEXT: vfmaddpd {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm2100; FMA4-NEXT: retq101;102; AVX512-LABEL: test_2f64_fmadd:103; AVX512: # %bb.0:104; AVX512-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm2105; AVX512-NEXT: retq106 %x = fmul contract <2 x double> %a0, %a1107 %res = fadd contract <2 x double> %x, %a2108 ret <2 x double> %res109}110 111define <4 x double> @test_4f64_fmadd(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {112; FMA-LABEL: test_4f64_fmadd:113; FMA: # %bb.0:114; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2115; FMA-NEXT: retq116;117; FMA4-LABEL: test_4f64_fmadd:118; FMA4: # %bb.0:119; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm2120; FMA4-NEXT: retq121;122; AVX512-LABEL: test_4f64_fmadd:123; AVX512: # %bb.0:124; AVX512-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2125; AVX512-NEXT: retq126 %x = fmul contract <4 x double> %a0, %a1127 %res = fadd contract <4 x double> %x, %a2128 ret <4 x double> %res129}130 131;132; Pattern: (fsub (fmul x, y), z) -> (fmsub x, y, z)133;134 135define float @test_f32_fmsub(float %a0, float %a1, float %a2) {136; FMA-LABEL: test_f32_fmsub:137; FMA: # %bb.0:138; FMA-NEXT: vfmsub213ss {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2139; FMA-NEXT: retq140;141; FMA4-LABEL: test_f32_fmsub:142; FMA4: # %bb.0:143; FMA4-NEXT: vfmsubss {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm2144; FMA4-NEXT: retq145;146; AVX512-LABEL: test_f32_fmsub:147; AVX512: # %bb.0:148; AVX512-NEXT: vfmsub213ss {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2149; AVX512-NEXT: retq150 %x = fmul contract float %a0, %a1151 %res = fsub contract float %x, %a2152 ret float %res153}154 155define <4 x float> @test_4f32_fmsub(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {156; FMA-LABEL: test_4f32_fmsub:157; FMA: # %bb.0:158; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2159; FMA-NEXT: retq160;161; FMA4-LABEL: test_4f32_fmsub:162; FMA4: # %bb.0:163; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm2164; FMA4-NEXT: retq165;166; AVX512-LABEL: test_4f32_fmsub:167; AVX512: # %bb.0:168; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2169; AVX512-NEXT: retq170 %x = fmul contract <4 x float> %a0, %a1171 %res = fsub contract <4 x float> %x, %a2172 ret <4 x float> %res173}174 175define <8 x float> @test_8f32_fmsub(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {176; FMA-LABEL: test_8f32_fmsub:177; FMA: # %bb.0:178; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2179; FMA-NEXT: retq180;181; FMA4-LABEL: test_8f32_fmsub:182; FMA4: # %bb.0:183; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm1) - ymm2184; FMA4-NEXT: retq185;186; AVX512-LABEL: test_8f32_fmsub:187; AVX512: # %bb.0:188; AVX512-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2189; AVX512-NEXT: retq190 %x = fmul contract <8 x float> %a0, %a1191 %res = fsub contract <8 x float> %x, %a2192 ret <8 x float> %res193}194 195define double @test_f64_fmsub(double %a0, double %a1, double %a2) {196; FMA-LABEL: test_f64_fmsub:197; FMA: # %bb.0:198; FMA-NEXT: vfmsub213sd {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2199; FMA-NEXT: retq200;201; FMA4-LABEL: test_f64_fmsub:202; FMA4: # %bb.0:203; FMA4-NEXT: vfmsubsd {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm2204; FMA4-NEXT: retq205;206; AVX512-LABEL: test_f64_fmsub:207; AVX512: # %bb.0:208; AVX512-NEXT: vfmsub213sd {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2209; AVX512-NEXT: retq210 %x = fmul contract double %a0, %a1211 %res = fsub contract double %x, %a2212 ret double %res213}214 215define <2 x double> @test_2f64_fmsub(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {216; FMA-LABEL: test_2f64_fmsub:217; FMA: # %bb.0:218; FMA-NEXT: vfmsub213pd {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2219; FMA-NEXT: retq220;221; FMA4-LABEL: test_2f64_fmsub:222; FMA4: # %bb.0:223; FMA4-NEXT: vfmsubpd {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm2224; FMA4-NEXT: retq225;226; AVX512-LABEL: test_2f64_fmsub:227; AVX512: # %bb.0:228; AVX512-NEXT: vfmsub213pd {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2229; AVX512-NEXT: retq230 %x = fmul contract <2 x double> %a0, %a1231 %res = fsub contract <2 x double> %x, %a2232 ret <2 x double> %res233}234 235define <4 x double> @test_4f64_fmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {236; FMA-LABEL: test_4f64_fmsub:237; FMA: # %bb.0:238; FMA-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2239; FMA-NEXT: retq240;241; FMA4-LABEL: test_4f64_fmsub:242; FMA4: # %bb.0:243; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * ymm1) - ymm2244; FMA4-NEXT: retq245;246; AVX512-LABEL: test_4f64_fmsub:247; AVX512: # %bb.0:248; AVX512-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2249; AVX512-NEXT: retq250 %x = fmul contract <4 x double> %a0, %a1251 %res = fsub contract <4 x double> %x, %a2252 ret <4 x double> %res253}254 255;256; Pattern: (fsub z, (fmul x, y)) -> (fnmadd x, y, z)257;258 259define float @test_f32_fnmadd(float %a0, float %a1, float %a2) {260; FMA-LABEL: test_f32_fnmadd:261; FMA: # %bb.0:262; FMA-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2263; FMA-NEXT: retq264;265; FMA4-LABEL: test_f32_fnmadd:266; FMA4: # %bb.0:267; FMA4-NEXT: vfnmaddss {{.*#+}} xmm0 = -(xmm0 * xmm1) + xmm2268; FMA4-NEXT: retq269;270; AVX512-LABEL: test_f32_fnmadd:271; AVX512: # %bb.0:272; AVX512-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2273; AVX512-NEXT: retq274 %x = fmul contract float %a0, %a1275 %res = fsub contract float %a2, %x276 ret float %res277}278 279define <4 x float> @test_4f32_fnmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {280; FMA-LABEL: test_4f32_fnmadd:281; FMA: # %bb.0:282; FMA-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2283; FMA-NEXT: retq284;285; FMA4-LABEL: test_4f32_fnmadd:286; FMA4: # %bb.0:287; FMA4-NEXT: vfnmaddps {{.*#+}} xmm0 = -(xmm0 * xmm1) + xmm2288; FMA4-NEXT: retq289;290; AVX512-LABEL: test_4f32_fnmadd:291; AVX512: # %bb.0:292; AVX512-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2293; AVX512-NEXT: retq294 %x = fmul contract <4 x float> %a0, %a1295 %res = fsub contract <4 x float> %a2, %x296 ret <4 x float> %res297}298 299define <8 x float> @test_8f32_fnmadd(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {300; FMA-LABEL: test_8f32_fnmadd:301; FMA: # %bb.0:302; FMA-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2303; FMA-NEXT: retq304;305; FMA4-LABEL: test_8f32_fnmadd:306; FMA4: # %bb.0:307; FMA4-NEXT: vfnmaddps {{.*#+}} ymm0 = -(ymm0 * ymm1) + ymm2308; FMA4-NEXT: retq309;310; AVX512-LABEL: test_8f32_fnmadd:311; AVX512: # %bb.0:312; AVX512-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2313; AVX512-NEXT: retq314 %x = fmul contract <8 x float> %a0, %a1315 %res = fsub contract <8 x float> %a2, %x316 ret <8 x float> %res317}318 319define double @test_f64_fnmadd(double %a0, double %a1, double %a2) {320; FMA-LABEL: test_f64_fnmadd:321; FMA: # %bb.0:322; FMA-NEXT: vfnmadd213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2323; FMA-NEXT: retq324;325; FMA4-LABEL: test_f64_fnmadd:326; FMA4: # %bb.0:327; FMA4-NEXT: vfnmaddsd {{.*#+}} xmm0 = -(xmm0 * xmm1) + xmm2328; FMA4-NEXT: retq329;330; AVX512-LABEL: test_f64_fnmadd:331; AVX512: # %bb.0:332; AVX512-NEXT: vfnmadd213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2333; AVX512-NEXT: retq334 %x = fmul contract double %a0, %a1335 %res = fsub contract double %a2, %x336 ret double %res337}338 339define <2 x double> @test_2f64_fnmadd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {340; FMA-LABEL: test_2f64_fnmadd:341; FMA: # %bb.0:342; FMA-NEXT: vfnmadd213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2343; FMA-NEXT: retq344;345; FMA4-LABEL: test_2f64_fnmadd:346; FMA4: # %bb.0:347; FMA4-NEXT: vfnmaddpd {{.*#+}} xmm0 = -(xmm0 * xmm1) + xmm2348; FMA4-NEXT: retq349;350; AVX512-LABEL: test_2f64_fnmadd:351; AVX512: # %bb.0:352; AVX512-NEXT: vfnmadd213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2353; AVX512-NEXT: retq354 %x = fmul contract <2 x double> %a0, %a1355 %res = fsub contract <2 x double> %a2, %x356 ret <2 x double> %res357}358 359define <4 x double> @test_4f64_fnmadd(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {360; FMA-LABEL: test_4f64_fnmadd:361; FMA: # %bb.0:362; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2363; FMA-NEXT: retq364;365; FMA4-LABEL: test_4f64_fnmadd:366; FMA4: # %bb.0:367; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm0 = -(ymm0 * ymm1) + ymm2368; FMA4-NEXT: retq369;370; AVX512-LABEL: test_4f64_fnmadd:371; AVX512: # %bb.0:372; AVX512-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2373; AVX512-NEXT: retq374 %x = fmul contract <4 x double> %a0, %a1375 %res = fsub contract <4 x double> %a2, %x376 ret <4 x double> %res377}378 379;380; Pattern: (fsub (fneg (fmul x, y)), z) -> (fnmsub x, y, z)381;382 383define float @test_f32_fnmsub(float %a0, float %a1, float %a2) {384; FMA-LABEL: test_f32_fnmsub:385; FMA: # %bb.0:386; FMA-NEXT: vfnmsub213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2387; FMA-NEXT: retq388;389; FMA4-LABEL: test_f32_fnmsub:390; FMA4: # %bb.0:391; FMA4-NEXT: vfnmsubss {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm2392; FMA4-NEXT: retq393;394; AVX512-LABEL: test_f32_fnmsub:395; AVX512: # %bb.0:396; AVX512-NEXT: vfnmsub213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2397; AVX512-NEXT: retq398 %x = fmul contract float %a0, %a1399 %y = fsub contract float -0.000000e+00, %x400 %res = fsub contract float %y, %a2401 ret float %res402}403 404define <4 x float> @test_4f32_fnmsub(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {405; FMA-LABEL: test_4f32_fnmsub:406; FMA: # %bb.0:407; FMA-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2408; FMA-NEXT: retq409;410; FMA4-LABEL: test_4f32_fnmsub:411; FMA4: # %bb.0:412; FMA4-NEXT: vfnmsubps {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm2413; FMA4-NEXT: retq414;415; AVX512-LABEL: test_4f32_fnmsub:416; AVX512: # %bb.0:417; AVX512-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2418; AVX512-NEXT: retq419 %x = fmul contract <4 x float> %a0, %a1420 %y = fsub contract <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x421 %res = fsub contract <4 x float> %y, %a2422 ret <4 x float> %res423}424 425define <8 x float> @test_8f32_fnmsub(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {426; FMA-LABEL: test_8f32_fnmsub:427; FMA: # %bb.0:428; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2429; FMA-NEXT: retq430;431; FMA4-LABEL: test_8f32_fnmsub:432; FMA4: # %bb.0:433; FMA4-NEXT: vfnmsubps {{.*#+}} ymm0 = -(ymm0 * ymm1) - ymm2434; FMA4-NEXT: retq435;436; AVX512-LABEL: test_8f32_fnmsub:437; AVX512: # %bb.0:438; AVX512-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2439; AVX512-NEXT: retq440 %x = fmul contract <8 x float> %a0, %a1441 %y = fsub contract <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x442 %res = fsub contract <8 x float> %y, %a2443 ret <8 x float> %res444}445 446define double @test_f64_fnmsub(double %a0, double %a1, double %a2) {447; FMA-LABEL: test_f64_fnmsub:448; FMA: # %bb.0:449; FMA-NEXT: vfnmsub213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2450; FMA-NEXT: retq451;452; FMA4-LABEL: test_f64_fnmsub:453; FMA4: # %bb.0:454; FMA4-NEXT: vfnmsubsd {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm2455; FMA4-NEXT: retq456;457; AVX512-LABEL: test_f64_fnmsub:458; AVX512: # %bb.0:459; AVX512-NEXT: vfnmsub213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2460; AVX512-NEXT: retq461 %x = fmul contract double %a0, %a1462 %y = fsub contract double -0.000000e+00, %x463 %res = fsub contract double %y, %a2464 ret double %res465}466 467define <2 x double> @test_2f64_fnmsub(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {468; FMA-LABEL: test_2f64_fnmsub:469; FMA: # %bb.0:470; FMA-NEXT: vfnmsub213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2471; FMA-NEXT: retq472;473; FMA4-LABEL: test_2f64_fnmsub:474; FMA4: # %bb.0:475; FMA4-NEXT: vfnmsubpd {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm2476; FMA4-NEXT: retq477;478; AVX512-LABEL: test_2f64_fnmsub:479; AVX512: # %bb.0:480; AVX512-NEXT: vfnmsub213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm2481; AVX512-NEXT: retq482 %x = fmul contract <2 x double> %a0, %a1483 %y = fsub contract <2 x double> <double -0.000000e+00, double -0.000000e+00>, %x484 %res = fsub contract <2 x double> %y, %a2485 ret <2 x double> %res486}487 488define <4 x double> @test_4f64_fnmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {489; FMA-LABEL: test_4f64_fnmsub:490; FMA: # %bb.0:491; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2492; FMA-NEXT: retq493;494; FMA4-LABEL: test_4f64_fnmsub:495; FMA4: # %bb.0:496; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm0 = -(ymm0 * ymm1) - ymm2497; FMA4-NEXT: retq498;499; AVX512-LABEL: test_4f64_fnmsub:500; AVX512: # %bb.0:501; AVX512-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2502; AVX512-NEXT: retq503 %x = fmul contract <4 x double> %a0, %a1504 %y = fsub contract <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %x505 %res = fsub contract <4 x double> %y, %a2506 ret <4 x double> %res507}508 509;510; Load Folding Patterns511;512 513define <4 x float> @test_4f32_fmadd_load(ptr %a0, <4 x float> %a1, <4 x float> %a2) {514; FMA-LABEL: test_4f32_fmadd_load:515; FMA: # %bb.0:516; FMA-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1517; FMA-NEXT: retq518;519; FMA4-LABEL: test_4f32_fmadd_load:520; FMA4: # %bb.0:521; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1522; FMA4-NEXT: retq523;524; AVX512-LABEL: test_4f32_fmadd_load:525; AVX512: # %bb.0:526; AVX512-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1527; AVX512-NEXT: retq528 %x = load <4 x float>, ptr %a0529 %y = fmul contract <4 x float> %x, %a1530 %res = fadd contract <4 x float> %y, %a2531 ret <4 x float> %res532}533 534define <2 x double> @test_2f64_fmsub_load(ptr %a0, <2 x double> %a1, <2 x double> %a2) {535; FMA-LABEL: test_2f64_fmsub_load:536; FMA: # %bb.0:537; FMA-NEXT: vfmsub132pd {{.*#+}} xmm0 = (xmm0 * mem) - xmm1538; FMA-NEXT: retq539;540; FMA4-LABEL: test_2f64_fmsub_load:541; FMA4: # %bb.0:542; FMA4-NEXT: vfmsubpd {{.*#+}} xmm0 = (xmm0 * mem) - xmm1543; FMA4-NEXT: retq544;545; AVX512-LABEL: test_2f64_fmsub_load:546; AVX512: # %bb.0:547; AVX512-NEXT: vfmsub132pd {{.*#+}} xmm0 = (xmm0 * mem) - xmm1548; AVX512-NEXT: retq549 %x = load <2 x double>, ptr %a0550 %y = fmul contract <2 x double> %x, %a1551 %res = fsub contract <2 x double> %y, %a2552 ret <2 x double> %res553}554 555;556; Patterns (+ fneg variants): mul(add(1.0,x),y), mul(sub(1.0,x),y), mul(sub(x,1.0),y)557;558 559define <4 x float> @test_v4f32_mul_add_x_one_y(<4 x float> %x, <4 x float> %y) {560; FMA-LABEL: test_v4f32_mul_add_x_one_y:561; FMA: # %bb.0:562; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0563; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0564; FMA-NEXT: retq565;566; FMA4-LABEL: test_v4f32_mul_add_x_one_y:567; FMA4: # %bb.0:568; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0569; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm0570; FMA4-NEXT: retq571;572; AVX512-LABEL: test_v4f32_mul_add_x_one_y:573; AVX512: # %bb.0:574; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0575; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0576; AVX512-NEXT: retq577 %a = fadd contract <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>578 %m = fmul contract <4 x float> %a, %y579 ret <4 x float> %m580}581 582define <4 x float> @test_v4f32_mul_add_x_one_y_ninf(<4 x float> %x, <4 x float> %y) {583; FMA-LABEL: test_v4f32_mul_add_x_one_y_ninf:584; FMA: # %bb.0:585; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm1586; FMA-NEXT: retq587;588; FMA4-LABEL: test_v4f32_mul_add_x_one_y_ninf:589; FMA4: # %bb.0:590; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1591; FMA4-NEXT: retq592;593; AVX512-LABEL: test_v4f32_mul_add_x_one_y_ninf:594; AVX512: # %bb.0:595; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm1596; AVX512-NEXT: retq597 %a = fadd contract ninf <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>598 %m = fmul contract ninf <4 x float> %a, %y599 ret <4 x float> %m600}601 602define <4 x float> @test_v4f32_mul_y_add_x_one(<4 x float> %x, <4 x float> %y) {603; FMA-LABEL: test_v4f32_mul_y_add_x_one:604; FMA: # %bb.0:605; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0606; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0607; FMA-NEXT: retq608;609; FMA4-LABEL: test_v4f32_mul_y_add_x_one:610; FMA4: # %bb.0:611; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0612; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm0613; FMA4-NEXT: retq614;615; AVX512-LABEL: test_v4f32_mul_y_add_x_one:616; AVX512: # %bb.0:617; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0618; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0619; AVX512-NEXT: retq620 %a = fadd contract <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>621 %m = fmul contract <4 x float> %y, %a622 ret <4 x float> %m623}624 625define <4 x float> @test_v4f32_mul_y_add_x_one_ninf(<4 x float> %x, <4 x float> %y) {626; FMA-LABEL: test_v4f32_mul_y_add_x_one_ninf:627; FMA: # %bb.0:628; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm1629; FMA-NEXT: retq630;631; FMA4-LABEL: test_v4f32_mul_y_add_x_one_ninf:632; FMA4: # %bb.0:633; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1634; FMA4-NEXT: retq635;636; AVX512-LABEL: test_v4f32_mul_y_add_x_one_ninf:637; AVX512: # %bb.0:638; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm1639; AVX512-NEXT: retq640 %a = fadd contract ninf <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>641 %m = fmul contract ninf <4 x float> %y, %a642 ret <4 x float> %m643}644 645define <4 x float> @test_v4f32_mul_y_add_x_one_poisons(<4 x float> %x, <4 x float> %y) {646; FMA-LABEL: test_v4f32_mul_y_add_x_one_poisons:647; FMA: # %bb.0:648; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0649; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0650; FMA-NEXT: retq651;652; FMA4-LABEL: test_v4f32_mul_y_add_x_one_poisons:653; FMA4: # %bb.0:654; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0655; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm0656; FMA4-NEXT: retq657;658; AVX512-LABEL: test_v4f32_mul_y_add_x_one_poisons:659; AVX512: # %bb.0:660; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0661; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0662; AVX512-NEXT: retq663 %a = fadd contract <4 x float> %x, <float 1.0, float poison, float 1.0, float poison>664 %m = fmul contract <4 x float> %y, %a665 ret <4 x float> %m666}667 668define <4 x float> @test_v4f32_mul_y_add_x_one_poisons_ninf(<4 x float> %x, <4 x float> %y) {669; FMA-LABEL: test_v4f32_mul_y_add_x_one_poisons_ninf:670; FMA: # %bb.0:671; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm1672; FMA-NEXT: retq673;674; FMA4-LABEL: test_v4f32_mul_y_add_x_one_poisons_ninf:675; FMA4: # %bb.0:676; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1677; FMA4-NEXT: retq678;679; AVX512-LABEL: test_v4f32_mul_y_add_x_one_poisons_ninf:680; AVX512: # %bb.0:681; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm1682; AVX512-NEXT: retq683 %a = fadd contract ninf<4 x float> %x, <float 1.0, float poison, float 1.0, float poison>684 %m = fmul contract ninf<4 x float> %y, %a685 ret <4 x float> %m686}687 688define <4 x float> @test_v4f32_mul_add_x_negone_y(<4 x float> %x, <4 x float> %y) {689; FMA-LABEL: test_v4f32_mul_add_x_negone_y:690; FMA: # %bb.0:691; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0692; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0693; FMA-NEXT: retq694;695; FMA4-LABEL: test_v4f32_mul_add_x_negone_y:696; FMA4: # %bb.0:697; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0698; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm0699; FMA4-NEXT: retq700;701; AVX512-LABEL: test_v4f32_mul_add_x_negone_y:702; AVX512: # %bb.0:703; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0704; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0705; AVX512-NEXT: retq706 %a = fadd contract <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>707 %m = fmul contract <4 x float> %a, %y708 ret <4 x float> %m709}710 711define <4 x float> @test_v4f32_mul_add_x_negone_y_ninf(<4 x float> %x, <4 x float> %y) {712; FMA-LABEL: test_v4f32_mul_add_x_negone_y_ninf:713; FMA: # %bb.0:714; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm1715; FMA-NEXT: retq716;717; FMA4-LABEL: test_v4f32_mul_add_x_negone_y_ninf:718; FMA4: # %bb.0:719; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm1720; FMA4-NEXT: retq721;722; AVX512-LABEL: test_v4f32_mul_add_x_negone_y_ninf:723; AVX512: # %bb.0:724; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm1725; AVX512-NEXT: retq726 %a = fadd contract ninf<4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>727 %m = fmul contract ninf<4 x float> %a, %y728 ret <4 x float> %m729}730 731define <4 x float> @test_v4f32_mul_y_add_x_negone(<4 x float> %x, <4 x float> %y) {732; FMA-LABEL: test_v4f32_mul_y_add_x_negone:733; FMA: # %bb.0:734; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0735; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0736; FMA-NEXT: retq737;738; FMA4-LABEL: test_v4f32_mul_y_add_x_negone:739; FMA4: # %bb.0:740; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0741; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm0742; FMA4-NEXT: retq743;744; AVX512-LABEL: test_v4f32_mul_y_add_x_negone:745; AVX512: # %bb.0:746; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0747; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0748; AVX512-NEXT: retq749 %a = fadd contract <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>750 %m = fmul contract <4 x float> %y, %a751 ret <4 x float> %m752}753 754define <4 x float> @test_v4f32_mul_y_add_x_negone_ninf(<4 x float> %x, <4 x float> %y) {755; FMA-LABEL: test_v4f32_mul_y_add_x_negone_ninf:756; FMA: # %bb.0:757; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm1758; FMA-NEXT: retq759;760; FMA4-LABEL: test_v4f32_mul_y_add_x_negone_ninf:761; FMA4: # %bb.0:762; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm1763; FMA4-NEXT: retq764;765; AVX512-LABEL: test_v4f32_mul_y_add_x_negone_ninf:766; AVX512: # %bb.0:767; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm1768; AVX512-NEXT: retq769 %a = fadd contract ninf<4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>770 %m = fmul contract ninf<4 x float> %y, %a771 ret <4 x float> %m772}773 774define <4 x float> @test_v4f32_mul_y_add_x_negone_poisons(<4 x float> %x, <4 x float> %y) {775; FMA-LABEL: test_v4f32_mul_y_add_x_negone_poisons:776; FMA: # %bb.0:777; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0778; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0779; FMA-NEXT: retq780;781; FMA4-LABEL: test_v4f32_mul_y_add_x_negone_poisons:782; FMA4: # %bb.0:783; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0784; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm0785; FMA4-NEXT: retq786;787; AVX512-LABEL: test_v4f32_mul_y_add_x_negone_poisons:788; AVX512: # %bb.0:789; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0790; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0791; AVX512-NEXT: retq792 %a = fadd contract <4 x float> %x, <float poison, float -1.0, float poison, float -1.0>793 %m = fmul contract <4 x float> %y, %a794 ret <4 x float> %m795}796 797define <4 x float> @test_v4f32_mul_y_add_x_negone_poisons_ninf(<4 x float> %x, <4 x float> %y) {798; FMA-LABEL: test_v4f32_mul_y_add_x_negone_poisons_ninf:799; FMA: # %bb.0:800; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm1801; FMA-NEXT: retq802;803; FMA4-LABEL: test_v4f32_mul_y_add_x_negone_poisons_ninf:804; FMA4: # %bb.0:805; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm1806; FMA4-NEXT: retq807;808; AVX512-LABEL: test_v4f32_mul_y_add_x_negone_poisons_ninf:809; AVX512: # %bb.0:810; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm1811; AVX512-NEXT: retq812 %a = fadd contract ninf<4 x float> %x, <float poison, float -1.0, float poison, float -1.0>813 %m = fmul contract ninf<4 x float> %y, %a814 ret <4 x float> %m815}816 817define <4 x float> @test_v4f32_mul_sub_one_x_y(<4 x float> %x, <4 x float> %y) {818; FMA-LABEL: test_v4f32_mul_sub_one_x_y:819; FMA: # %bb.0:820; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]821; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0822; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0823; FMA-NEXT: retq824;825; FMA4-LABEL: test_v4f32_mul_sub_one_x_y:826; FMA4: # %bb.0:827; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]828; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm0829; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm0830; FMA4-NEXT: retq831;832; AVX512-LABEL: test_v4f32_mul_sub_one_x_y:833; AVX512: # %bb.0:834; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]835; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm0836; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0837; AVX512-NEXT: retq838 %s = fsub contract <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x839 %m = fmul contract <4 x float> %s, %y840 ret <4 x float> %m841}842 843define <4 x float> @test_v4f32_mul_sub_one_x_y_ninf(<4 x float> %x, <4 x float> %y) {844; FMA-LABEL: test_v4f32_mul_sub_one_x_y_ninf:845; FMA: # %bb.0:846; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]847; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0848; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0849; FMA-NEXT: retq850;851; FMA4-LABEL: test_v4f32_mul_sub_one_x_y_ninf:852; FMA4: # %bb.0:853; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]854; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm0855; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm0856; FMA4-NEXT: retq857;858; AVX512-LABEL: test_v4f32_mul_sub_one_x_y_ninf:859; AVX512: # %bb.0:860; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]861; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm0862; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0863; AVX512-NEXT: retq864 %s = fsub contract ninf<4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x865 %m = fmul contract ninf<4 x float> %s, %y866 ret <4 x float> %m867}868 869define <4 x float> @test_v4f32_mul_y_sub_one_x(<4 x float> %x, <4 x float> %y) {870; FMA-LABEL: test_v4f32_mul_y_sub_one_x:871; FMA: # %bb.0:872; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]873; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0874; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0875; FMA-NEXT: retq876;877; FMA4-LABEL: test_v4f32_mul_y_sub_one_x:878; FMA4: # %bb.0:879; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]880; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm0881; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm0882; FMA4-NEXT: retq883;884; AVX512-LABEL: test_v4f32_mul_y_sub_one_x:885; AVX512: # %bb.0:886; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]887; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm0888; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0889; AVX512-NEXT: retq890 %s = fsub contract <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x891 %m = fmul contract <4 x float> %y, %s892 ret <4 x float> %m893}894 895define <4 x float> @test_v4f32_mul_y_sub_one_x_ninf(<4 x float> %x, <4 x float> %y) {896; FMA-LABEL: test_v4f32_mul_y_sub_one_x_ninf:897; FMA: # %bb.0:898; FMA-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm1899; FMA-NEXT: retq900;901; FMA4-LABEL: test_v4f32_mul_y_sub_one_x_ninf:902; FMA4: # %bb.0:903; FMA4-NEXT: vfnmaddps {{.*#+}} xmm0 = -(xmm0 * xmm1) + xmm1904; FMA4-NEXT: retq905;906; AVX512-LABEL: test_v4f32_mul_y_sub_one_x_ninf:907; AVX512: # %bb.0:908; AVX512-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm1909; AVX512-NEXT: retq910 %s = fsub contract ninf<4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x911 %m = fmul contract ninf<4 x float> %y, %s912 ret <4 x float> %m913}914 915define <4 x float> @test_v4f32_mul_y_sub_one_x_poisons(<4 x float> %x, <4 x float> %y) {916; FMA-LABEL: test_v4f32_mul_y_sub_one_x_poisons:917; FMA: # %bb.0:918; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]919; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0920; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0921; FMA-NEXT: retq922;923; FMA4-LABEL: test_v4f32_mul_y_sub_one_x_poisons:924; FMA4: # %bb.0:925; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]926; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm0927; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm0928; FMA4-NEXT: retq929;930; AVX512-LABEL: test_v4f32_mul_y_sub_one_x_poisons:931; AVX512: # %bb.0:932; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]933; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm0934; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0935; AVX512-NEXT: retq936 %s = fsub contract <4 x float> <float 1.0, float poison, float 1.0, float 1.0>, %x937 %m = fmul contract <4 x float> %y, %s938 ret <4 x float> %m939}940 941define <4 x float> @test_v4f32_mul_y_sub_one_x_poisons_ninf(<4 x float> %x, <4 x float> %y) {942; FMA-LABEL: test_v4f32_mul_y_sub_one_x_poisons_ninf:943; FMA: # %bb.0:944; FMA-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm1945; FMA-NEXT: retq946;947; FMA4-LABEL: test_v4f32_mul_y_sub_one_x_poisons_ninf:948; FMA4: # %bb.0:949; FMA4-NEXT: vfnmaddps {{.*#+}} xmm0 = -(xmm0 * xmm1) + xmm1950; FMA4-NEXT: retq951;952; AVX512-LABEL: test_v4f32_mul_y_sub_one_x_poisons_ninf:953; AVX512: # %bb.0:954; AVX512-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm1955; AVX512-NEXT: retq956 %s = fsub contract ninf<4 x float> <float 1.0, float poison, float 1.0, float 1.0>, %x957 %m = fmul contract ninf<4 x float> %y, %s958 ret <4 x float> %m959}960 961define <4 x float> @test_v4f32_mul_sub_negone_x_y(<4 x float> %x, <4 x float> %y) {962; FMA-LABEL: test_v4f32_mul_sub_negone_x_y:963; FMA: # %bb.0:964; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]965; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0966; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0967; FMA-NEXT: retq968;969; FMA4-LABEL: test_v4f32_mul_sub_negone_x_y:970; FMA4: # %bb.0:971; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]972; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm0973; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm0974; FMA4-NEXT: retq975;976; AVX512-LABEL: test_v4f32_mul_sub_negone_x_y:977; AVX512: # %bb.0:978; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]979; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm0980; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0981; AVX512-NEXT: retq982 %s = fsub contract <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>, %x983 %m = fmul contract <4 x float> %s, %y984 ret <4 x float> %m985}986 987define <4 x float> @test_v4f32_mul_sub_negone_x_y_ninf(<4 x float> %x, <4 x float> %y) {988; FMA-LABEL: test_v4f32_mul_sub_negone_x_y_ninf:989; FMA: # %bb.0:990; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]991; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0992; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0993; FMA-NEXT: retq994;995; FMA4-LABEL: test_v4f32_mul_sub_negone_x_y_ninf:996; FMA4: # %bb.0:997; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]998; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm0999; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm01000; FMA4-NEXT: retq1001;1002; AVX512-LABEL: test_v4f32_mul_sub_negone_x_y_ninf:1003; AVX512: # %bb.0:1004; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1005; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm01006; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm01007; AVX512-NEXT: retq1008 %s = fsub contract ninf<4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>, %x1009 %m = fmul contract ninf<4 x float> %s, %y1010 ret <4 x float> %m1011}1012 1013define <4 x float> @test_v4f32_mul_y_sub_negone_x(<4 x float> %x, <4 x float> %y) {1014; FMA-LABEL: test_v4f32_mul_y_sub_negone_x:1015; FMA: # %bb.0:1016; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1017; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm01018; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm01019; FMA-NEXT: retq1020;1021; FMA4-LABEL: test_v4f32_mul_y_sub_negone_x:1022; FMA4: # %bb.0:1023; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1024; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm01025; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm01026; FMA4-NEXT: retq1027;1028; AVX512-LABEL: test_v4f32_mul_y_sub_negone_x:1029; AVX512: # %bb.0:1030; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1031; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm01032; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm01033; AVX512-NEXT: retq1034 %s = fsub contract <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>, %x1035 %m = fmul contract <4 x float> %y, %s1036 ret <4 x float> %m1037}1038 1039define <4 x float> @test_v4f32_mul_y_sub_negone_x_ninf(<4 x float> %x, <4 x float> %y) {1040; FMA-LABEL: test_v4f32_mul_y_sub_negone_x_ninf:1041; FMA: # %bb.0:1042; FMA-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm11043; FMA-NEXT: retq1044;1045; FMA4-LABEL: test_v4f32_mul_y_sub_negone_x_ninf:1046; FMA4: # %bb.0:1047; FMA4-NEXT: vfnmsubps {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm11048; FMA4-NEXT: retq1049;1050; AVX512-LABEL: test_v4f32_mul_y_sub_negone_x_ninf:1051; AVX512: # %bb.0:1052; AVX512-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm11053; AVX512-NEXT: retq1054 %s = fsub contract ninf<4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>, %x1055 %m = fmul contract ninf<4 x float> %y, %s1056 ret <4 x float> %m1057}1058 1059define <4 x float> @test_v4f32_mul_y_sub_negone_x_poisons(<4 x float> %x, <4 x float> %y) {1060; FMA-LABEL: test_v4f32_mul_y_sub_negone_x_poisons:1061; FMA: # %bb.0:1062; FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1063; FMA-NEXT: vsubps %xmm0, %xmm2, %xmm01064; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm01065; FMA-NEXT: retq1066;1067; FMA4-LABEL: test_v4f32_mul_y_sub_negone_x_poisons:1068; FMA4: # %bb.0:1069; FMA4-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1070; FMA4-NEXT: vsubps %xmm0, %xmm2, %xmm01071; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm01072; FMA4-NEXT: retq1073;1074; AVX512-LABEL: test_v4f32_mul_y_sub_negone_x_poisons:1075; AVX512: # %bb.0:1076; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]1077; AVX512-NEXT: vsubps %xmm0, %xmm2, %xmm01078; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm01079; AVX512-NEXT: retq1080 %s = fsub contract <4 x float> <float -1.0, float -1.0, float poison, float -1.0>, %x1081 %m = fmul contract <4 x float> %y, %s1082 ret <4 x float> %m1083}1084 1085define <4 x float> @test_v4f32_mul_y_sub_negone_x_poisons_ninf(<4 x float> %x, <4 x float> %y) {1086; FMA-LABEL: test_v4f32_mul_y_sub_negone_x_poisons_ninf:1087; FMA: # %bb.0:1088; FMA-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm11089; FMA-NEXT: retq1090;1091; FMA4-LABEL: test_v4f32_mul_y_sub_negone_x_poisons_ninf:1092; FMA4: # %bb.0:1093; FMA4-NEXT: vfnmsubps {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm11094; FMA4-NEXT: retq1095;1096; AVX512-LABEL: test_v4f32_mul_y_sub_negone_x_poisons_ninf:1097; AVX512: # %bb.0:1098; AVX512-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm11099; AVX512-NEXT: retq1100 %s = fsub contract ninf<4 x float> <float -1.0, float -1.0, float poison, float -1.0>, %x1101 %m = fmul contract ninf<4 x float> %y, %s1102 ret <4 x float> %m1103}1104 1105define <4 x float> @test_v4f32_mul_sub_x_one_y(<4 x float> %x, <4 x float> %y) {1106; FMA-LABEL: test_v4f32_mul_sub_x_one_y:1107; FMA: # %bb.0:1108; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01109; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm01110; FMA-NEXT: retq1111;1112; FMA4-LABEL: test_v4f32_mul_sub_x_one_y:1113; FMA4: # %bb.0:1114; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01115; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm01116; FMA4-NEXT: retq1117;1118; AVX512-LABEL: test_v4f32_mul_sub_x_one_y:1119; AVX512: # %bb.0:1120; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01121; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm01122; AVX512-NEXT: retq1123 %s = fsub contract <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>1124 %m = fmul contract <4 x float> %s, %y1125 ret <4 x float> %m1126}1127 1128define <4 x float> @test_v4f32_mul_sub_x_one_y_ninf(<4 x float> %x, <4 x float> %y) {1129; FMA-LABEL: test_v4f32_mul_sub_x_one_y_ninf:1130; FMA: # %bb.0:1131; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm11132; FMA-NEXT: retq1133;1134; FMA4-LABEL: test_v4f32_mul_sub_x_one_y_ninf:1135; FMA4: # %bb.0:1136; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm11137; FMA4-NEXT: retq1138;1139; AVX512-LABEL: test_v4f32_mul_sub_x_one_y_ninf:1140; AVX512: # %bb.0:1141; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm11142; AVX512-NEXT: retq1143 %s = fsub contract ninf<4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>1144 %m = fmul contract ninf<4 x float> %s, %y1145 ret <4 x float> %m1146}1147 1148define <4 x float> @test_v4f32_mul_y_sub_x_one(<4 x float> %x, <4 x float> %y) {1149; FMA-LABEL: test_v4f32_mul_y_sub_x_one:1150; FMA: # %bb.0:1151; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01152; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm01153; FMA-NEXT: retq1154;1155; FMA4-LABEL: test_v4f32_mul_y_sub_x_one:1156; FMA4: # %bb.0:1157; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01158; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm01159; FMA4-NEXT: retq1160;1161; AVX512-LABEL: test_v4f32_mul_y_sub_x_one:1162; AVX512: # %bb.0:1163; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01164; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm01165; AVX512-NEXT: retq1166 %s = fsub contract <4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>1167 %m = fmul contract <4 x float> %y, %s1168 ret <4 x float> %m1169}1170 1171define <4 x float> @test_v4f32_mul_y_sub_x_one_ninf(<4 x float> %x, <4 x float> %y) {1172; FMA-LABEL: test_v4f32_mul_y_sub_x_one_ninf:1173; FMA: # %bb.0:1174; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm11175; FMA-NEXT: retq1176;1177; FMA4-LABEL: test_v4f32_mul_y_sub_x_one_ninf:1178; FMA4: # %bb.0:1179; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm11180; FMA4-NEXT: retq1181;1182; AVX512-LABEL: test_v4f32_mul_y_sub_x_one_ninf:1183; AVX512: # %bb.0:1184; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm11185; AVX512-NEXT: retq1186 %s = fsub contract ninf<4 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0>1187 %m = fmul contract ninf<4 x float> %y, %s1188 ret <4 x float> %m1189}1190 1191define <4 x float> @test_v4f32_mul_y_sub_x_one_poisons(<4 x float> %x, <4 x float> %y) {1192; FMA-LABEL: test_v4f32_mul_y_sub_x_one_poisons:1193; FMA: # %bb.0:1194; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01195; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm01196; FMA-NEXT: retq1197;1198; FMA4-LABEL: test_v4f32_mul_y_sub_x_one_poisons:1199; FMA4: # %bb.0:1200; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01201; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm01202; FMA4-NEXT: retq1203;1204; AVX512-LABEL: test_v4f32_mul_y_sub_x_one_poisons:1205; AVX512: # %bb.0:1206; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01207; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm01208; AVX512-NEXT: retq1209 %s = fsub contract <4 x float> %x, <float 1.0, float 1.0, float 1.0, float poison>1210 %m = fmul contract <4 x float> %y, %s1211 ret <4 x float> %m1212}1213 1214define <4 x float> @test_v4f32_mul_y_sub_x_one_poisons_ninf(<4 x float> %x, <4 x float> %y) {1215; FMA-LABEL: test_v4f32_mul_y_sub_x_one_poisons_ninf:1216; FMA: # %bb.0:1217; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm11218; FMA-NEXT: retq1219;1220; FMA4-LABEL: test_v4f32_mul_y_sub_x_one_poisons_ninf:1221; FMA4: # %bb.0:1222; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm11223; FMA4-NEXT: retq1224;1225; AVX512-LABEL: test_v4f32_mul_y_sub_x_one_poisons_ninf:1226; AVX512: # %bb.0:1227; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm11228; AVX512-NEXT: retq1229 %s = fsub contract ninf<4 x float> %x, <float 1.0, float 1.0, float 1.0, float poison>1230 %m = fmul contract ninf<4 x float> %y, %s1231 ret <4 x float> %m1232}1233 1234define <4 x float> @test_v4f32_mul_sub_x_negone_y(<4 x float> %x, <4 x float> %y) {1235; FMA-LABEL: test_v4f32_mul_sub_x_negone_y:1236; FMA: # %bb.0:1237; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01238; FMA-NEXT: vmulps %xmm1, %xmm0, %xmm01239; FMA-NEXT: retq1240;1241; FMA4-LABEL: test_v4f32_mul_sub_x_negone_y:1242; FMA4: # %bb.0:1243; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01244; FMA4-NEXT: vmulps %xmm1, %xmm0, %xmm01245; FMA4-NEXT: retq1246;1247; AVX512-LABEL: test_v4f32_mul_sub_x_negone_y:1248; AVX512: # %bb.0:1249; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01250; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm01251; AVX512-NEXT: retq1252 %s = fsub contract <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>1253 %m = fmul contract <4 x float> %s, %y1254 ret <4 x float> %m1255}1256 1257define <4 x float> @test_v4f32_mul_sub_x_negone_y_ninf(<4 x float> %x, <4 x float> %y) {1258; FMA-LABEL: test_v4f32_mul_sub_x_negone_y_ninf:1259; FMA: # %bb.0:1260; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm11261; FMA-NEXT: retq1262;1263; FMA4-LABEL: test_v4f32_mul_sub_x_negone_y_ninf:1264; FMA4: # %bb.0:1265; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm11266; FMA4-NEXT: retq1267;1268; AVX512-LABEL: test_v4f32_mul_sub_x_negone_y_ninf:1269; AVX512: # %bb.0:1270; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm11271; AVX512-NEXT: retq1272 %s = fsub contract ninf<4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>1273 %m = fmul contract ninf<4 x float> %s, %y1274 ret <4 x float> %m1275}1276 1277define <4 x float> @test_v4f32_mul_y_sub_x_negone(<4 x float> %x, <4 x float> %y) {1278; FMA-LABEL: test_v4f32_mul_y_sub_x_negone:1279; FMA: # %bb.0:1280; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01281; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm01282; FMA-NEXT: retq1283;1284; FMA4-LABEL: test_v4f32_mul_y_sub_x_negone:1285; FMA4: # %bb.0:1286; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01287; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm01288; FMA4-NEXT: retq1289;1290; AVX512-LABEL: test_v4f32_mul_y_sub_x_negone:1291; AVX512: # %bb.0:1292; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01293; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm01294; AVX512-NEXT: retq1295 %s = fsub contract <4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>1296 %m = fmul contract <4 x float> %y, %s1297 ret <4 x float> %m1298}1299 1300define <4 x float> @test_v4f32_mul_y_sub_x_negone_ninf(<4 x float> %x, <4 x float> %y) {1301; FMA-LABEL: test_v4f32_mul_y_sub_x_negone_ninf:1302; FMA: # %bb.0:1303; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm11304; FMA-NEXT: retq1305;1306; FMA4-LABEL: test_v4f32_mul_y_sub_x_negone_ninf:1307; FMA4: # %bb.0:1308; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm11309; FMA4-NEXT: retq1310;1311; AVX512-LABEL: test_v4f32_mul_y_sub_x_negone_ninf:1312; AVX512: # %bb.0:1313; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm11314; AVX512-NEXT: retq1315 %s = fsub contract ninf<4 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0>1316 %m = fmul contract ninf<4 x float> %y, %s1317 ret <4 x float> %m1318}1319 1320define <4 x float> @test_v4f32_mul_y_sub_x_negone_poisons(<4 x float> %x, <4 x float> %y) {1321; FMA-LABEL: test_v4f32_mul_y_sub_x_negone_poisons:1322; FMA: # %bb.0:1323; FMA-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01324; FMA-NEXT: vmulps %xmm0, %xmm1, %xmm01325; FMA-NEXT: retq1326;1327; FMA4-LABEL: test_v4f32_mul_y_sub_x_negone_poisons:1328; FMA4: # %bb.0:1329; FMA4-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01330; FMA4-NEXT: vmulps %xmm0, %xmm1, %xmm01331; FMA4-NEXT: retq1332;1333; AVX512-LABEL: test_v4f32_mul_y_sub_x_negone_poisons:1334; AVX512: # %bb.0:1335; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01336; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm01337; AVX512-NEXT: retq1338 %s = fsub contract <4 x float> %x, <float poison, float -1.0, float -1.0, float -1.0>1339 %m = fmul contract <4 x float> %y, %s1340 ret <4 x float> %m1341}1342 1343define <4 x float> @test_v4f32_mul_y_sub_x_negone_poisons_ninf(<4 x float> %x, <4 x float> %y) {1344; FMA-LABEL: test_v4f32_mul_y_sub_x_negone_poisons_ninf:1345; FMA: # %bb.0:1346; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm11347; FMA-NEXT: retq1348;1349; FMA4-LABEL: test_v4f32_mul_y_sub_x_negone_poisons_ninf:1350; FMA4: # %bb.0:1351; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm11352; FMA4-NEXT: retq1353;1354; AVX512-LABEL: test_v4f32_mul_y_sub_x_negone_poisons_ninf:1355; AVX512: # %bb.0:1356; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm11357; AVX512-NEXT: retq1358 %s = fsub contract ninf<4 x float> %x, <float poison, float -1.0, float -1.0, float -1.0>1359 %m = fmul contract ninf<4 x float> %y, %s1360 ret <4 x float> %m1361}1362 1363 1364define float @test_f32_interp(float %x, float %y, float %t) {1365; FMA-LABEL: test_f32_interp:1366; FMA: # %bb.0:1367; FMA-NEXT: vmovss {{.*#+}} xmm3 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]1368; FMA-NEXT: vsubss %xmm2, %xmm3, %xmm31369; FMA-NEXT: vmulss %xmm3, %xmm1, %xmm11370; FMA-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11371; FMA-NEXT: retq1372;1373; FMA4-LABEL: test_f32_interp:1374; FMA4: # %bb.0:1375; FMA4-NEXT: vmovss {{.*#+}} xmm3 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]1376; FMA4-NEXT: vsubss %xmm2, %xmm3, %xmm31377; FMA4-NEXT: vmulss %xmm3, %xmm1, %xmm11378; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm0 * xmm2) + xmm11379; FMA4-NEXT: retq1380;1381; AVX512-LABEL: test_f32_interp:1382; AVX512: # %bb.0:1383; AVX512-NEXT: vmovss {{.*#+}} xmm3 = [1.0E+0,0.0E+0,0.0E+0,0.0E+0]1384; AVX512-NEXT: vsubss %xmm2, %xmm3, %xmm31385; AVX512-NEXT: vmulss %xmm3, %xmm1, %xmm11386; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11387; AVX512-NEXT: retq1388 %t1 = fsub contract nsz float 1.0, %t1389 %tx = fmul contract nsz float %x, %t1390 %ty = fmul contract nsz float %y, %t11391 %r = fadd contract nsz float %tx, %ty1392 ret float %r1393}1394 1395define float @test_f32_interp_ninf(float %x, float %y, float %t) {1396; FMA-LABEL: test_f32_interp_ninf:1397; FMA: # %bb.0:1398; FMA-NEXT: vfmsub213ss {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11399; FMA-NEXT: vfmsub213ss {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11400; FMA-NEXT: retq1401;1402; FMA4-LABEL: test_f32_interp_ninf:1403; FMA4: # %bb.0:1404; FMA4-NEXT: vfmsubss {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11405; FMA4-NEXT: vfmsubss {{.*#+}} xmm0 = (xmm0 * xmm2) - xmm11406; FMA4-NEXT: retq1407;1408; AVX512-LABEL: test_f32_interp_ninf:1409; AVX512: # %bb.0:1410; AVX512-NEXT: vfmsub213ss {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11411; AVX512-NEXT: vfmsub213ss {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11412; AVX512-NEXT: retq1413 %t1 = fsub contract ninf nsz float 1.0, %t1414 %tx = fmul contract ninf nsz float %x, %t1415 %ty = fmul contract ninf nsz float %y, %t11416 %r = fadd contract ninf nsz float %tx, %ty1417 ret float %r1418}1419 1420define <4 x float> @test_v4f32_interp(<4 x float> %x, <4 x float> %y, <4 x float> %t) {1421; FMA-LABEL: test_v4f32_interp:1422; FMA: # %bb.0:1423; FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]1424; FMA-NEXT: vsubps %xmm2, %xmm3, %xmm31425; FMA-NEXT: vmulps %xmm3, %xmm1, %xmm11426; FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11427; FMA-NEXT: retq1428;1429; FMA4-LABEL: test_v4f32_interp:1430; FMA4: # %bb.0:1431; FMA4-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]1432; FMA4-NEXT: vsubps %xmm2, %xmm3, %xmm31433; FMA4-NEXT: vmulps %xmm3, %xmm1, %xmm11434; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * xmm2) + xmm11435; FMA4-NEXT: retq1436;1437; AVX512-LABEL: test_v4f32_interp:1438; AVX512: # %bb.0:1439; AVX512-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]1440; AVX512-NEXT: vsubps %xmm2, %xmm3, %xmm31441; AVX512-NEXT: vmulps %xmm3, %xmm1, %xmm11442; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11443; AVX512-NEXT: retq1444 %t1 = fsub contract nsz <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %t1445 %tx = fmul contract nsz <4 x float> %x, %t1446 %ty = fmul contract nsz <4 x float> %y, %t11447 %r = fadd contract nsz <4 x float> %tx, %ty1448 ret <4 x float> %r1449}1450 1451define <4 x float> @test_v4f32_interp_ninf(<4 x float> %x, <4 x float> %y, <4 x float> %t) {1452; FMA-LABEL: test_v4f32_interp_ninf:1453; FMA: # %bb.0:1454; FMA-NEXT: vfmsub213ps {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11455; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11456; FMA-NEXT: retq1457;1458; FMA4-LABEL: test_v4f32_interp_ninf:1459; FMA4: # %bb.0:1460; FMA4-NEXT: vfmsubps {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11461; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm2) - xmm11462; FMA4-NEXT: retq1463;1464; AVX512-LABEL: test_v4f32_interp_ninf:1465; AVX512: # %bb.0:1466; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11467; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11468; AVX512-NEXT: retq1469 %t1 = fsub contract ninf nsz <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %t1470 %tx = fmul contract ninf nsz <4 x float> %x, %t1471 %ty = fmul contract ninf nsz <4 x float> %y, %t11472 %r = fadd contract ninf nsz <4 x float> %tx, %ty1473 ret <4 x float> %r1474}1475 1476define <8 x float> @test_v8f32_interp(<8 x float> %x, <8 x float> %y, <8 x float> %t) {1477; FMA-LABEL: test_v8f32_interp:1478; FMA: # %bb.0:1479; FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]1480; FMA-NEXT: vsubps %ymm2, %ymm3, %ymm31481; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm11482; FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm11483; FMA-NEXT: retq1484;1485; FMA4-LABEL: test_v8f32_interp:1486; FMA4: # %bb.0:1487; FMA4-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]1488; FMA4-NEXT: vsubps %ymm2, %ymm3, %ymm31489; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm11490; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm11491; FMA4-NEXT: retq1492;1493; AVX512-LABEL: test_v8f32_interp:1494; AVX512: # %bb.0:1495; AVX512-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]1496; AVX512-NEXT: vsubps %ymm2, %ymm3, %ymm31497; AVX512-NEXT: vmulps %ymm3, %ymm1, %ymm11498; AVX512-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm11499; AVX512-NEXT: retq1500 %t1 = fsub contract nsz <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %t1501 %tx = fmul contract nsz <8 x float> %x, %t1502 %ty = fmul contract nsz <8 x float> %y, %t11503 %r = fadd contract nsz <8 x float> %tx, %ty1504 ret <8 x float> %r1505}1506 1507define <8 x float> @test_v8f32_interp_ninf(<8 x float> %x, <8 x float> %y, <8 x float> %t) {1508; FMA-LABEL: test_v8f32_interp_ninf:1509; FMA: # %bb.0:1510; FMA-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm2 * ymm1) - ymm11511; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm11512; FMA-NEXT: retq1513;1514; FMA4-LABEL: test_v8f32_interp_ninf:1515; FMA4: # %bb.0:1516; FMA4-NEXT: vfmsubps {{.*#+}} ymm1 = (ymm2 * ymm1) - ymm11517; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm11518; FMA4-NEXT: retq1519;1520; AVX512-LABEL: test_v8f32_interp_ninf:1521; AVX512: # %bb.0:1522; AVX512-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm2 * ymm1) - ymm11523; AVX512-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm11524; AVX512-NEXT: retq1525 %t1 = fsub contract ninf nsz <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %t1526 %tx = fmul contract ninf nsz <8 x float> %x, %t1527 %ty = fmul contract ninf nsz <8 x float> %y, %t11528 %r = fadd contract ninf nsz <8 x float> %tx, %ty1529 ret <8 x float> %r1530}1531 1532define double @test_f64_interp(double %x, double %y, double %t) {1533; FMA-LABEL: test_f64_interp:1534; FMA: # %bb.0:1535; FMA-NEXT: vmovsd {{.*#+}} xmm3 = [1.0E+0,0.0E+0]1536; FMA-NEXT: vsubsd %xmm2, %xmm3, %xmm31537; FMA-NEXT: vmulsd %xmm3, %xmm1, %xmm11538; FMA-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11539; FMA-NEXT: retq1540;1541; FMA4-LABEL: test_f64_interp:1542; FMA4: # %bb.0:1543; FMA4-NEXT: vmovsd {{.*#+}} xmm3 = [1.0E+0,0.0E+0]1544; FMA4-NEXT: vsubsd %xmm2, %xmm3, %xmm31545; FMA4-NEXT: vmulsd %xmm3, %xmm1, %xmm11546; FMA4-NEXT: vfmaddsd {{.*#+}} xmm0 = (xmm0 * xmm2) + xmm11547; FMA4-NEXT: retq1548;1549; AVX512-LABEL: test_f64_interp:1550; AVX512: # %bb.0:1551; AVX512-NEXT: vmovsd {{.*#+}} xmm3 = [1.0E+0,0.0E+0]1552; AVX512-NEXT: vsubsd %xmm2, %xmm3, %xmm31553; AVX512-NEXT: vmulsd %xmm3, %xmm1, %xmm11554; AVX512-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11555; AVX512-NEXT: retq1556 %t1 = fsub contract nsz double 1.0, %t1557 %tx = fmul contract nsz double %x, %t1558 %ty = fmul contract nsz double %y, %t11559 %r = fadd contract nsz double %tx, %ty1560 ret double %r1561}1562 1563define double @test_f64_interp_ninf(double %x, double %y, double %t) {1564; FMA-LABEL: test_f64_interp_ninf:1565; FMA: # %bb.0:1566; FMA-NEXT: vfmsub213sd {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11567; FMA-NEXT: vfmsub213sd {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11568; FMA-NEXT: retq1569;1570; FMA4-LABEL: test_f64_interp_ninf:1571; FMA4: # %bb.0:1572; FMA4-NEXT: vfmsubsd {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11573; FMA4-NEXT: vfmsubsd {{.*#+}} xmm0 = (xmm0 * xmm2) - xmm11574; FMA4-NEXT: retq1575;1576; AVX512-LABEL: test_f64_interp_ninf:1577; AVX512: # %bb.0:1578; AVX512-NEXT: vfmsub213sd {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11579; AVX512-NEXT: vfmsub213sd {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11580; AVX512-NEXT: retq1581 %t1 = fsub contract ninf nsz double 1.0, %t1582 %tx = fmul contract ninf nsz double %x, %t1583 %ty = fmul contract ninf nsz double %y, %t11584 %r = fadd contract ninf nsz double %tx, %ty1585 ret double %r1586}1587 1588define <2 x double> @test_v2f64_interp(<2 x double> %x, <2 x double> %y, <2 x double> %t) {1589; FMA-LABEL: test_v2f64_interp:1590; FMA: # %bb.0:1591; FMA-NEXT: vmovddup {{.*#+}} xmm3 = [1.0E+0,1.0E+0]1592; FMA-NEXT: # xmm3 = mem[0,0]1593; FMA-NEXT: vsubpd %xmm2, %xmm3, %xmm31594; FMA-NEXT: vmulpd %xmm3, %xmm1, %xmm11595; FMA-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11596; FMA-NEXT: retq1597;1598; FMA4-LABEL: test_v2f64_interp:1599; FMA4: # %bb.0:1600; FMA4-NEXT: vmovddup {{.*#+}} xmm3 = [1.0E+0,1.0E+0]1601; FMA4-NEXT: # xmm3 = mem[0,0]1602; FMA4-NEXT: vsubpd %xmm2, %xmm3, %xmm31603; FMA4-NEXT: vmulpd %xmm3, %xmm1, %xmm11604; FMA4-NEXT: vfmaddpd {{.*#+}} xmm0 = (xmm0 * xmm2) + xmm11605; FMA4-NEXT: retq1606;1607; AVX512-LABEL: test_v2f64_interp:1608; AVX512: # %bb.0:1609; AVX512-NEXT: vmovddup {{.*#+}} xmm3 = [1.0E+0,1.0E+0]1610; AVX512-NEXT: # xmm3 = mem[0,0]1611; AVX512-NEXT: vsubpd %xmm2, %xmm3, %xmm31612; AVX512-NEXT: vmulpd %xmm3, %xmm1, %xmm11613; AVX512-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm11614; AVX512-NEXT: retq1615 %t1 = fsub contract nsz <2 x double> <double 1.0, double 1.0>, %t1616 %tx = fmul contract nsz <2 x double> %x, %t1617 %ty = fmul contract nsz <2 x double> %y, %t11618 %r = fadd contract nsz <2 x double> %tx, %ty1619 ret <2 x double> %r1620}1621 1622define <2 x double> @test_v2f64_interp_ninf(<2 x double> %x, <2 x double> %y, <2 x double> %t) {1623; FMA-LABEL: test_v2f64_interp_ninf:1624; FMA: # %bb.0:1625; FMA-NEXT: vfmsub213pd {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11626; FMA-NEXT: vfmsub213pd {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11627; FMA-NEXT: retq1628;1629; FMA4-LABEL: test_v2f64_interp_ninf:1630; FMA4: # %bb.0:1631; FMA4-NEXT: vfmsubpd {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11632; FMA4-NEXT: vfmsubpd {{.*#+}} xmm0 = (xmm0 * xmm2) - xmm11633; FMA4-NEXT: retq1634;1635; AVX512-LABEL: test_v2f64_interp_ninf:1636; AVX512: # %bb.0:1637; AVX512-NEXT: vfmsub213pd {{.*#+}} xmm1 = (xmm2 * xmm1) - xmm11638; AVX512-NEXT: vfmsub213pd {{.*#+}} xmm0 = (xmm2 * xmm0) - xmm11639; AVX512-NEXT: retq1640 %t1 = fsub contract ninf nsz <2 x double> <double 1.0, double 1.0>, %t1641 %tx = fmul contract ninf nsz <2 x double> %x, %t1642 %ty = fmul contract ninf nsz <2 x double> %y, %t11643 %r = fadd contract ninf nsz <2 x double> %tx, %ty1644 ret <2 x double> %r1645}1646 1647define <4 x double> @test_v4f64_interp(<4 x double> %x, <4 x double> %y, <4 x double> %t) {1648; FMA-LABEL: test_v4f64_interp:1649; FMA: # %bb.0:1650; FMA-NEXT: vbroadcastsd {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]1651; FMA-NEXT: vsubpd %ymm2, %ymm3, %ymm31652; FMA-NEXT: vmulpd %ymm3, %ymm1, %ymm11653; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm11654; FMA-NEXT: retq1655;1656; FMA4-LABEL: test_v4f64_interp:1657; FMA4: # %bb.0:1658; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]1659; FMA4-NEXT: vsubpd %ymm2, %ymm3, %ymm31660; FMA4-NEXT: vmulpd %ymm3, %ymm1, %ymm11661; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm11662; FMA4-NEXT: retq1663;1664; AVX512-LABEL: test_v4f64_interp:1665; AVX512: # %bb.0:1666; AVX512-NEXT: vbroadcastsd {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]1667; AVX512-NEXT: vsubpd %ymm2, %ymm3, %ymm31668; AVX512-NEXT: vmulpd %ymm3, %ymm1, %ymm11669; AVX512-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm11670; AVX512-NEXT: retq1671 %t1 = fsub contract nsz <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, %t1672 %tx = fmul contract nsz <4 x double> %x, %t1673 %ty = fmul contract nsz <4 x double> %y, %t11674 %r = fadd contract nsz <4 x double> %tx, %ty1675 ret <4 x double> %r1676}1677 1678define <4 x double> @test_v4f64_interp_ninf(<4 x double> %x, <4 x double> %y, <4 x double> %t) {1679; FMA-LABEL: test_v4f64_interp_ninf:1680; FMA: # %bb.0:1681; FMA-NEXT: vfmsub213pd {{.*#+}} ymm1 = (ymm2 * ymm1) - ymm11682; FMA-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm11683; FMA-NEXT: retq1684;1685; FMA4-LABEL: test_v4f64_interp_ninf:1686; FMA4: # %bb.0:1687; FMA4-NEXT: vfmsubpd {{.*#+}} ymm1 = (ymm2 * ymm1) - ymm11688; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm11689; FMA4-NEXT: retq1690;1691; AVX512-LABEL: test_v4f64_interp_ninf:1692; AVX512: # %bb.0:1693; AVX512-NEXT: vfmsub213pd {{.*#+}} ymm1 = (ymm2 * ymm1) - ymm11694; AVX512-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm11695; AVX512-NEXT: retq1696 %t1 = fsub contract ninf nsz <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, %t1697 %tx = fmul contract ninf nsz <4 x double> %x, %t1698 %ty = fmul contract ninf nsz <4 x double> %y, %t11699 %r = fadd contract ninf nsz <4 x double> %tx, %ty1700 ret <4 x double> %r1701}1702 1703;1704; Pattern: (fneg (fma x, y, z)) -> (fma x, -y, -z)1705;1706 1707define <4 x float> @test_v4f32_fneg_fmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {1708; FMA-LABEL: test_v4f32_fneg_fmadd:1709; FMA: # %bb.0:1710; FMA-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm21711; FMA-NEXT: retq1712;1713; FMA4-LABEL: test_v4f32_fneg_fmadd:1714; FMA4: # %bb.0:1715; FMA4-NEXT: vfnmsubps {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm21716; FMA4-NEXT: retq1717;1718; AVX512-LABEL: test_v4f32_fneg_fmadd:1719; AVX512: # %bb.0:1720; AVX512-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm21721; AVX512-NEXT: retq1722 %mul = fmul contract nsz <4 x float> %a0, %a11723 %add = fadd contract nsz <4 x float> %mul, %a21724 %neg = fsub contract nsz <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %add1725 ret <4 x float> %neg1726}1727 1728define <4 x double> @test_v4f64_fneg_fmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {1729; FMA-LABEL: test_v4f64_fneg_fmsub:1730; FMA: # %bb.0:1731; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm21732; FMA-NEXT: retq1733;1734; FMA4-LABEL: test_v4f64_fneg_fmsub:1735; FMA4: # %bb.0:1736; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm0 = -(ymm0 * ymm1) + ymm21737; FMA4-NEXT: retq1738;1739; AVX512-LABEL: test_v4f64_fneg_fmsub:1740; AVX512: # %bb.0:1741; AVX512-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm21742; AVX512-NEXT: retq1743 %mul = fmul contract nsz <4 x double> %a0, %a11744 %sub = fsub contract nsz <4 x double> %mul, %a21745 %neg = fsub contract nsz <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %sub1746 ret <4 x double> %neg1747}1748 1749define <4 x float> @test_v4f32_fneg_fnmadd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {1750; FMA-LABEL: test_v4f32_fneg_fnmadd:1751; FMA: # %bb.0:1752; FMA-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm21753; FMA-NEXT: retq1754;1755; FMA4-LABEL: test_v4f32_fneg_fnmadd:1756; FMA4: # %bb.0:1757; FMA4-NEXT: vfmsubps {{.*#+}} xmm0 = (xmm0 * xmm1) - xmm21758; FMA4-NEXT: retq1759;1760; AVX512-LABEL: test_v4f32_fneg_fnmadd:1761; AVX512: # %bb.0:1762; AVX512-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm21763; AVX512-NEXT: retq1764 %mul = fmul contract nsz <4 x float> %a0, %a11765 %neg0 = fsub contract nsz <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %mul1766 %add = fadd contract nsz <4 x float> %neg0, %a21767 %neg1 = fsub contract nsz <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %add1768 ret <4 x float> %neg11769}1770 1771define <4 x double> @test_v4f64_fneg_fnmsub(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {1772; FMA-LABEL: test_v4f64_fneg_fnmsub:1773; FMA: # %bb.0:1774; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm21775; FMA-NEXT: retq1776;1777; FMA4-LABEL: test_v4f64_fneg_fnmsub:1778; FMA4: # %bb.0:1779; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm21780; FMA4-NEXT: retq1781;1782; AVX512-LABEL: test_v4f64_fneg_fnmsub:1783; AVX512: # %bb.0:1784; AVX512-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm21785; AVX512-NEXT: retq1786 %mul = fmul contract nsz <4 x double> %a0, %a11787 %neg0 = fsub contract nsz <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %mul1788 %sub = fsub contract nsz <4 x double> %neg0, %a21789 %neg1 = fsub contract nsz <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %sub1790 ret <4 x double> %neg11791}1792 1793;1794; Pattern: (fma x, c1, (fmul x, c2)) -> (fmul x, c1+c2)1795;1796 1797define <4 x float> @test_v4f32_fma_x_c1_fmul_x_c2(<4 x float> %x) {1798; FMA-LABEL: test_v4f32_fma_x_c1_fmul_x_c2:1799; FMA: # %bb.0:1800; FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01801; FMA-NEXT: retq1802;1803; FMA4-LABEL: test_v4f32_fma_x_c1_fmul_x_c2:1804; FMA4: # %bb.0:1805; FMA4-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01806; FMA4-NEXT: retq1807;1808; AVX512-LABEL: test_v4f32_fma_x_c1_fmul_x_c2:1809; AVX512: # %bb.0:1810; AVX512-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01811; AVX512-NEXT: retq1812 %m0 = fmul contract reassoc <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>1813 %m1 = fmul contract reassoc <4 x float> %x, <float 4.0, float 3.0, float 2.0, float 1.0>1814 %a = fadd contract reassoc <4 x float> %m0, %m11815 ret <4 x float> %a1816}1817 1818;1819; Pattern: (fma (fmul x, c1), c2, y) -> (fma x, c1*c2, y)1820;1821 1822define <4 x float> @test_v4f32_fma_fmul_x_c1_c2_y(<4 x float> %x, <4 x float> %y) {1823; FMA-LABEL: test_v4f32_fma_fmul_x_c1_c2_y:1824; FMA: # %bb.0:1825; FMA-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm11826; FMA-NEXT: retq1827;1828; FMA4-LABEL: test_v4f32_fma_fmul_x_c1_c2_y:1829; FMA4: # %bb.0:1830; FMA4-NEXT: vfmaddps {{.*#+}} xmm0 = (xmm0 * mem) + xmm11831; FMA4-NEXT: retq1832;1833; AVX512-LABEL: test_v4f32_fma_fmul_x_c1_c2_y:1834; AVX512: # %bb.0:1835; AVX512-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm11836; AVX512-NEXT: retq1837 %m0 = fmul contract reassoc <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>1838 %m1 = fmul contract reassoc <4 x float> %m0, <float 4.0, float 3.0, float 2.0, float 1.0>1839 %a = fadd contract reassoc <4 x float> %m1, %y1840 ret <4 x float> %a1841}1842 1843; Pattern: (fneg (fmul x, y)) -> (fnmsub x, y, 0)1844 1845define double @test_f64_fneg_fmul(double %x, double %y) {1846; FMA-LABEL: test_f64_fneg_fmul:1847; FMA: # %bb.0:1848; FMA-NEXT: vxorpd %xmm2, %xmm2, %xmm21849; FMA-NEXT: vfnmsub213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm21850; FMA-NEXT: retq1851;1852; FMA4-LABEL: test_f64_fneg_fmul:1853; FMA4: # %bb.0:1854; FMA4-NEXT: vxorpd %xmm2, %xmm2, %xmm21855; FMA4-NEXT: vfnmsubsd {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm21856; FMA4-NEXT: retq1857;1858; AVX512-LABEL: test_f64_fneg_fmul:1859; AVX512: # %bb.0:1860; AVX512-NEXT: vxorpd %xmm2, %xmm2, %xmm21861; AVX512-NEXT: vfnmsub213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm21862; AVX512-NEXT: retq1863 %m = fmul contract nsz double %x, %y1864 %n = fsub contract double -0.0, %m1865 ret double %n1866}1867 1868define <4 x float> @test_v4f32_fneg_fmul(<4 x float> %x, <4 x float> %y) {1869; FMA-LABEL: test_v4f32_fneg_fmul:1870; FMA: # %bb.0:1871; FMA-NEXT: vxorps %xmm2, %xmm2, %xmm21872; FMA-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm21873; FMA-NEXT: retq1874;1875; FMA4-LABEL: test_v4f32_fneg_fmul:1876; FMA4: # %bb.0:1877; FMA4-NEXT: vxorps %xmm2, %xmm2, %xmm21878; FMA4-NEXT: vfnmsubps {{.*#+}} xmm0 = -(xmm0 * xmm1) - xmm21879; FMA4-NEXT: retq1880;1881; AVX512-LABEL: test_v4f32_fneg_fmul:1882; AVX512: # %bb.0:1883; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm21884; AVX512-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - xmm21885; AVX512-NEXT: retq1886 %m = fmul contract nsz <4 x float> %x, %y1887 %n = fsub contract <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %m1888 ret <4 x float> %n1889}1890 1891define <4 x double> @test_v4f64_fneg_fmul(<4 x double> %x, <4 x double> %y) {1892; FMA-LABEL: test_v4f64_fneg_fmul:1893; FMA: # %bb.0:1894; FMA-NEXT: vxorpd %xmm2, %xmm2, %xmm21895; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm21896; FMA-NEXT: retq1897;1898; FMA4-LABEL: test_v4f64_fneg_fmul:1899; FMA4: # %bb.0:1900; FMA4-NEXT: vxorpd %xmm2, %xmm2, %xmm21901; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm0 = -(ymm0 * ymm1) - ymm21902; FMA4-NEXT: retq1903;1904; AVX512-LABEL: test_v4f64_fneg_fmul:1905; AVX512: # %bb.0:1906; AVX512-NEXT: vxorpd %xmm2, %xmm2, %xmm21907; AVX512-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm21908; AVX512-NEXT: retq1909 %m = fmul contract nsz <4 x double> %x, %y1910 %n = fsub contract <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %m1911 ret <4 x double> %n1912}1913 1914define <4 x double> @test_v4f64_fneg_fmul_no_nsz(<4 x double> %x, <4 x double> %y) {1915; FMA-LABEL: test_v4f64_fneg_fmul_no_nsz:1916; FMA: # %bb.0:1917; FMA-NEXT: vmulpd %ymm1, %ymm0, %ymm01918; FMA-NEXT: vxorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01919; FMA-NEXT: retq1920;1921; FMA4-LABEL: test_v4f64_fneg_fmul_no_nsz:1922; FMA4: # %bb.0:1923; FMA4-NEXT: vmulpd %ymm1, %ymm0, %ymm01924; FMA4-NEXT: vxorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01925; FMA4-NEXT: retq1926;1927; AVX512-LABEL: test_v4f64_fneg_fmul_no_nsz:1928; AVX512: # %bb.0:1929; AVX512-NEXT: vmulpd %ymm1, %ymm0, %ymm01930; AVX512-NEXT: vxorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm01931; AVX512-NEXT: retq1932 %m = fmul contract <4 x double> %x, %y1933 %n = fsub contract <4 x double> <double -0.0, double -0.0, double -0.0, double -0.0>, %m1934 ret <4 x double> %n1935}1936 1937; ((a*b) + (c*d)) + n1 --> (a*b) + ((c*d) + n1)1938 1939define double @fadd_fma_fmul_1(double %a, double %b, double %c, double %d, double %n1) nounwind {1940; FMA-LABEL: fadd_fma_fmul_1:1941; FMA: # %bb.0:1942; FMA-NEXT: vfmadd213sd {{.*#+}} xmm2 = (xmm3 * xmm2) + xmm41943; FMA-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm21944; FMA-NEXT: retq1945;1946; FMA4-LABEL: fadd_fma_fmul_1:1947; FMA4: # %bb.0:1948; FMA4-NEXT: vfmaddsd {{.*#+}} xmm2 = (xmm2 * xmm3) + xmm41949; FMA4-NEXT: vfmaddsd {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm21950; FMA4-NEXT: retq1951;1952; AVX512-LABEL: fadd_fma_fmul_1:1953; AVX512: # %bb.0:1954; AVX512-NEXT: vfmadd213sd {{.*#+}} xmm2 = (xmm3 * xmm2) + xmm41955; AVX512-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm21956; AVX512-NEXT: retq1957 %m1 = fmul contract fast double %a, %b1958 %m2 = fmul contract fast double %c, %d1959 %a1 = fadd contract fast double %m1, %m21960 %a2 = fadd contract fast double %a1, %n11961 ret double %a21962}1963 1964; Minimum FMF - the 1st fadd is contracted because that combines1965; fmul+fadd as specified by the order of operations; the 2nd fadd1966; requires reassociation to fuse with c*d.1967 1968define float @fadd_fma_fmul_fmf(float %a, float %b, float %c, float %d, float %n0) nounwind {1969; FMA-LABEL: fadd_fma_fmul_fmf:1970; FMA: # %bb.0:1971; FMA-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm3 * xmm2) + xmm41972; FMA-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm21973; FMA-NEXT: retq1974;1975; FMA4-LABEL: fadd_fma_fmul_fmf:1976; FMA4: # %bb.0:1977; FMA4-NEXT: vfmaddss {{.*#+}} xmm2 = (xmm2 * xmm3) + xmm41978; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm21979; FMA4-NEXT: retq1980;1981; AVX512-LABEL: fadd_fma_fmul_fmf:1982; AVX512: # %bb.0:1983; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm3 * xmm2) + xmm41984; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm21985; AVX512-NEXT: retq1986 %m1 = fmul contract float %a, %b1987 %m2 = fmul contract float %c, %d1988 %a1 = fadd contract float %m1, %m21989 %a2 = fadd contract reassoc float %n0, %a11990 ret float %a21991}1992 1993; Not minimum FMF.1994 1995define float @fadd_fma_fmul_2(float %a, float %b, float %c, float %d, float %n0) nounwind {1996; FMA-LABEL: fadd_fma_fmul_2:1997; FMA: # %bb.0:1998; FMA-NEXT: vmulss %xmm3, %xmm2, %xmm21999; FMA-NEXT: vfmadd231ss {{.*#+}} xmm2 = (xmm1 * xmm0) + xmm22000; FMA-NEXT: vaddss %xmm2, %xmm4, %xmm02001; FMA-NEXT: retq2002;2003; FMA4-LABEL: fadd_fma_fmul_2:2004; FMA4: # %bb.0:2005; FMA4-NEXT: vmulss %xmm3, %xmm2, %xmm22006; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm22007; FMA4-NEXT: vaddss %xmm0, %xmm4, %xmm02008; FMA4-NEXT: retq2009;2010; AVX512-LABEL: fadd_fma_fmul_2:2011; AVX512: # %bb.0:2012; AVX512-NEXT: vmulss %xmm3, %xmm2, %xmm22013; AVX512-NEXT: vfmadd231ss {{.*#+}} xmm2 = (xmm1 * xmm0) + xmm22014; AVX512-NEXT: vaddss %xmm2, %xmm4, %xmm02015; AVX512-NEXT: retq2016 %m1 = fmul contract float %a, %b2017 %m2 = fmul contract float %c, %d2018 %a1 = fadd contract float %m1, %m22019 %a2 = fadd contract float %n0, %a12020 ret float %a22021}2022 2023; The final fadd can be folded with either 1 of the leading fmuls.2024 2025define <2 x double> @fadd_fma_fmul_3(<2 x double> %x1, <2 x double> %x2, <2 x double> %x3, <2 x double> %x4, <2 x double> %x5, <2 x double> %x6, <2 x double> %x7, <2 x double> %x8) nounwind {2026; FMA-LABEL: fadd_fma_fmul_3:2027; FMA: # %bb.0:2028; FMA-NEXT: vmulpd %xmm3, %xmm2, %xmm22029; FMA-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm1 * xmm0) + xmm22030; FMA-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm7 * xmm6) + xmm22031; FMA-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm5 * xmm4) + xmm22032; FMA-NEXT: vmovapd %xmm2, %xmm02033; FMA-NEXT: retq2034;2035; FMA4-LABEL: fadd_fma_fmul_3:2036; FMA4: # %bb.0:2037; FMA4-NEXT: vmulpd %xmm3, %xmm2, %xmm22038; FMA4-NEXT: vfmaddpd {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm22039; FMA4-NEXT: vfmaddpd {{.*#+}} xmm0 = (xmm6 * xmm7) + xmm02040; FMA4-NEXT: vfmaddpd {{.*#+}} xmm0 = (xmm4 * xmm5) + xmm02041; FMA4-NEXT: retq2042;2043; AVX512-LABEL: fadd_fma_fmul_3:2044; AVX512: # %bb.0:2045; AVX512-NEXT: vmulpd %xmm3, %xmm2, %xmm22046; AVX512-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm1 * xmm0) + xmm22047; AVX512-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm7 * xmm6) + xmm22048; AVX512-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm5 * xmm4) + xmm22049; AVX512-NEXT: vmovapd %xmm2, %xmm02050; AVX512-NEXT: retq2051 %m1 = fmul contract fast <2 x double> %x1, %x22052 %m2 = fmul contract fast <2 x double> %x3, %x42053 %m3 = fmul contract fast <2 x double> %x5, %x62054 %m4 = fmul contract fast <2 x double> %x7, %x82055 %a1 = fadd contract fast <2 x double> %m1, %m22056 %a2 = fadd contract fast <2 x double> %m3, %m42057 %a3 = fadd contract fast <2 x double> %a1, %a22058 ret <2 x double> %a32059}2060 2061; negative test2062 2063define float @fadd_fma_fmul_extra_use_1(float %a, float %b, float %c, float %d, float %n0, ptr %p) nounwind {2064; FMA-LABEL: fadd_fma_fmul_extra_use_1:2065; FMA: # %bb.0:2066; FMA-NEXT: vmulss %xmm1, %xmm0, %xmm02067; FMA-NEXT: vmovss %xmm0, (%rdi)2068; FMA-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm3 * xmm2) + xmm02069; FMA-NEXT: vaddss %xmm2, %xmm4, %xmm02070; FMA-NEXT: retq2071;2072; FMA4-LABEL: fadd_fma_fmul_extra_use_1:2073; FMA4: # %bb.0:2074; FMA4-NEXT: vmulss %xmm1, %xmm0, %xmm02075; FMA4-NEXT: vmovss %xmm0, (%rdi)2076; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm2 * xmm3) + xmm02077; FMA4-NEXT: vaddss %xmm0, %xmm4, %xmm02078; FMA4-NEXT: retq2079;2080; AVX512-LABEL: fadd_fma_fmul_extra_use_1:2081; AVX512: # %bb.0:2082; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm02083; AVX512-NEXT: vmovss %xmm0, (%rdi)2084; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm3 * xmm2) + xmm02085; AVX512-NEXT: vaddss %xmm2, %xmm4, %xmm02086; AVX512-NEXT: retq2087 %m1 = fmul contract fast float %a, %b2088 store float %m1, ptr %p2089 %m2 = fmul contract fast float %c, %d2090 %a1 = fadd contract fast float %m1, %m22091 %a2 = fadd contract fast float %n0, %a12092 ret float %a22093}2094 2095; negative test2096 2097define float @fadd_fma_fmul_extra_use_2(float %a, float %b, float %c, float %d, float %n0, ptr %p) nounwind {2098; FMA-LABEL: fadd_fma_fmul_extra_use_2:2099; FMA: # %bb.0:2100; FMA-NEXT: vmulss %xmm3, %xmm2, %xmm22101; FMA-NEXT: vmovss %xmm2, (%rdi)2102; FMA-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm22103; FMA-NEXT: vaddss %xmm0, %xmm4, %xmm02104; FMA-NEXT: retq2105;2106; FMA4-LABEL: fadd_fma_fmul_extra_use_2:2107; FMA4: # %bb.0:2108; FMA4-NEXT: vmulss %xmm3, %xmm2, %xmm22109; FMA4-NEXT: vmovss %xmm2, (%rdi)2110; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm22111; FMA4-NEXT: vaddss %xmm0, %xmm4, %xmm02112; FMA4-NEXT: retq2113;2114; AVX512-LABEL: fadd_fma_fmul_extra_use_2:2115; AVX512: # %bb.0:2116; AVX512-NEXT: vmulss %xmm3, %xmm2, %xmm22117; AVX512-NEXT: vmovss %xmm2, (%rdi)2118; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm22119; AVX512-NEXT: vaddss %xmm0, %xmm4, %xmm02120; AVX512-NEXT: retq2121 %m1 = fmul contract fast float %a, %b2122 %m2 = fmul contract fast float %c, %d2123 store float %m2, ptr %p2124 %a1 = fadd contract fast float %m1, %m22125 %a2 = fadd contract fast float %n0, %a12126 ret float %a22127}2128 2129; negative test2130 2131define float @fadd_fma_fmul_extra_use_3(float %a, float %b, float %c, float %d, float %n0, ptr %p) nounwind {2132; FMA-LABEL: fadd_fma_fmul_extra_use_3:2133; FMA: # %bb.0:2134; FMA-NEXT: vmulss %xmm3, %xmm2, %xmm22135; FMA-NEXT: vfmadd231ss {{.*#+}} xmm2 = (xmm1 * xmm0) + xmm22136; FMA-NEXT: vmovss %xmm2, (%rdi)2137; FMA-NEXT: vaddss %xmm2, %xmm4, %xmm02138; FMA-NEXT: retq2139;2140; FMA4-LABEL: fadd_fma_fmul_extra_use_3:2141; FMA4: # %bb.0:2142; FMA4-NEXT: vmulss %xmm3, %xmm2, %xmm22143; FMA4-NEXT: vfmaddss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm22144; FMA4-NEXT: vmovss %xmm0, (%rdi)2145; FMA4-NEXT: vaddss %xmm0, %xmm4, %xmm02146; FMA4-NEXT: retq2147;2148; AVX512-LABEL: fadd_fma_fmul_extra_use_3:2149; AVX512: # %bb.0:2150; AVX512-NEXT: vmulss %xmm3, %xmm2, %xmm22151; AVX512-NEXT: vfmadd231ss {{.*#+}} xmm2 = (xmm1 * xmm0) + xmm22152; AVX512-NEXT: vmovss %xmm2, (%rdi)2153; AVX512-NEXT: vaddss %xmm2, %xmm4, %xmm02154; AVX512-NEXT: retq2155 %m1 = fmul contract fast float %a, %b2156 %m2 = fmul contract fast float %c, %d2157 %a1 = fadd contract fast float %m1, %m22158 store float %a1, ptr %p2159 %a2 = fadd contract fast float %n0, %a12160 ret float %a22161}2162;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2163; AVX512-INFS: {{.*}}2164; FMA-INFS: {{.*}}2165; FMA4-INFS: {{.*}}2166