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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefix=FMA --check-prefix=FMA-INFS3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma | FileCheck %s --check-prefix=FMA4 --check-prefix=FMA4-INFS4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 | FileCheck %s --check-prefix=FMA4 --check-prefix=FMA4-INFS5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512-INFS6 7;8; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z)9;10 11define <16 x float> @test_16f32_fmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {12; FMA-LABEL: test_16f32_fmadd:13; FMA: # %bb.0:14; FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm415; FMA-NEXT: vfmadd213ps {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm516; FMA-NEXT: retq17;18; FMA4-LABEL: test_16f32_fmadd:19; FMA4: # %bb.0:20; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm421; FMA4-NEXT: vfmaddps {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm522; FMA4-NEXT: retq23;24; AVX512-LABEL: test_16f32_fmadd:25; AVX512: # %bb.0:26; AVX512-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm227; AVX512-NEXT: retq28 %x = fmul contract <16 x float> %a0, %a129 %res = fadd contract <16 x float> %x, %a230 ret <16 x float> %res31}32 33define <8 x double> @test_8f64_fmadd(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {34; FMA-LABEL: test_8f64_fmadd:35; FMA: # %bb.0:36; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm437; FMA-NEXT: vfmadd213pd {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm538; FMA-NEXT: retq39;40; FMA4-LABEL: test_8f64_fmadd:41; FMA4: # %bb.0:42; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm443; FMA4-NEXT: vfmaddpd {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm544; FMA4-NEXT: retq45;46; AVX512-LABEL: test_8f64_fmadd:47; AVX512: # %bb.0:48; AVX512-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm249; AVX512-NEXT: retq50 %x = fmul contract <8 x double> %a0, %a151 %res = fadd contract <8 x double> %x, %a252 ret <8 x double> %res53}54 55;56; Pattern: (fsub (fmul x, y), z) -> (fmsub x, y, z)57;58 59define <16 x float> @test_16f32_fmsub(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {60; FMA-LABEL: test_16f32_fmsub:61; FMA: # %bb.0:62; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm463; FMA-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm564; FMA-NEXT: retq65;66; FMA4-LABEL: test_16f32_fmsub:67; FMA4: # %bb.0:68; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm469; FMA4-NEXT: vfmsubps {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm570; FMA4-NEXT: retq71;72; AVX512-LABEL: test_16f32_fmsub:73; AVX512: # %bb.0:74; AVX512-NEXT: vfmsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm275; AVX512-NEXT: retq76 %x = fmul contract <16 x float> %a0, %a177 %res = fsub contract <16 x float> %x, %a278 ret <16 x float> %res79}80 81define <8 x double> @test_8f64_fmsub(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {82; FMA-LABEL: test_8f64_fmsub:83; FMA: # %bb.0:84; FMA-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm485; FMA-NEXT: vfmsub213pd {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm586; FMA-NEXT: retq87;88; FMA4-LABEL: test_8f64_fmsub:89; FMA4: # %bb.0:90; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm491; FMA4-NEXT: vfmsubpd {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm592; FMA4-NEXT: retq93;94; AVX512-LABEL: test_8f64_fmsub:95; AVX512: # %bb.0:96; AVX512-NEXT: vfmsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm297; AVX512-NEXT: retq98 %x = fmul contract <8 x double> %a0, %a199 %res = fsub contract <8 x double> %x, %a2100 ret <8 x double> %res101}102 103;104; Pattern: (fsub z, (fmul x, y)) -> (fnmadd x, y, z)105;106 107define <16 x float> @test_16f32_fnmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {108; FMA-LABEL: test_16f32_fnmadd:109; FMA: # %bb.0:110; FMA-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm4111; FMA-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm3 * ymm1) + ymm5112; FMA-NEXT: retq113;114; FMA4-LABEL: test_16f32_fnmadd:115; FMA4: # %bb.0:116; FMA4-NEXT: vfnmaddps {{.*#+}} ymm0 = -(ymm0 * ymm2) + ymm4117; FMA4-NEXT: vfnmaddps {{.*#+}} ymm1 = -(ymm1 * ymm3) + ymm5118; FMA4-NEXT: retq119;120; AVX512-LABEL: test_16f32_fnmadd:121; AVX512: # %bb.0:122; AVX512-NEXT: vfnmadd213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) + zmm2123; AVX512-NEXT: retq124 %x = fmul contract <16 x float> %a0, %a1125 %res = fsub contract <16 x float> %a2, %x126 ret <16 x float> %res127}128 129define <8 x double> @test_8f64_fnmadd(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {130; FMA-LABEL: test_8f64_fnmadd:131; FMA: # %bb.0:132; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm4133; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm1 = -(ymm3 * ymm1) + ymm5134; FMA-NEXT: retq135;136; FMA4-LABEL: test_8f64_fnmadd:137; FMA4: # %bb.0:138; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm0 = -(ymm0 * ymm2) + ymm4139; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm1 = -(ymm1 * ymm3) + ymm5140; FMA4-NEXT: retq141;142; AVX512-LABEL: test_8f64_fnmadd:143; AVX512: # %bb.0:144; AVX512-NEXT: vfnmadd213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) + zmm2145; AVX512-NEXT: retq146 %x = fmul contract <8 x double> %a0, %a1147 %res = fsub contract <8 x double> %a2, %x148 ret <8 x double> %res149}150 151;152; Pattern: (fsub (fneg (fmul x, y)), z) -> (fnmsub x, y, z)153;154 155define <16 x float> @test_16f32_fnmsub(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {156; FMA-LABEL: test_16f32_fnmsub:157; FMA: # %bb.0:158; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) - ymm4159; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm1 = -(ymm3 * ymm1) - ymm5160; FMA-NEXT: retq161;162; FMA4-LABEL: test_16f32_fnmsub:163; FMA4: # %bb.0:164; FMA4-NEXT: vfnmsubps {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm4165; FMA4-NEXT: vfnmsubps {{.*#+}} ymm1 = -(ymm1 * ymm3) - ymm5166; FMA4-NEXT: retq167;168; AVX512-LABEL: test_16f32_fnmsub:169; AVX512: # %bb.0:170; AVX512-NEXT: vfnmsub213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm2171; AVX512-NEXT: retq172 %x = fmul contract <16 x float> %a0, %a1173 %y = fsub contract <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x174 %res = fsub contract <16 x float> %y, %a2175 ret <16 x float> %res176}177 178define <8 x double> @test_8f64_fnmsub(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {179; FMA-LABEL: test_8f64_fnmsub:180; FMA: # %bb.0:181; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm2 * ymm0) - ymm4182; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm1 = -(ymm3 * ymm1) - ymm5183; FMA-NEXT: retq184;185; FMA4-LABEL: test_8f64_fnmsub:186; FMA4: # %bb.0:187; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm4188; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm1 = -(ymm1 * ymm3) - ymm5189; FMA4-NEXT: retq190;191; AVX512-LABEL: test_8f64_fnmsub:192; AVX512: # %bb.0:193; AVX512-NEXT: vfnmsub213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm2194; AVX512-NEXT: retq195 %x = fmul contract <8 x double> %a0, %a1196 %y = fsub contract <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %x197 %res = fsub contract <8 x double> %y, %a2198 ret <8 x double> %res199}200 201;202; Load Folding Patterns203;204 205define <16 x float> @test_16f32_fmadd_load(ptr %a0, <16 x float> %a1, <16 x float> %a2) {206; FMA-LABEL: test_16f32_fmadd_load:207; FMA: # %bb.0:208; FMA-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * mem) + ymm2209; FMA-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * mem) + ymm3210; FMA-NEXT: retq211;212; FMA4-LABEL: test_16f32_fmadd_load:213; FMA4: # %bb.0:214; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * mem) + ymm2215; FMA4-NEXT: vfmaddps {{.*#+}} ymm1 = (ymm1 * mem) + ymm3216; FMA4-NEXT: retq217;218; AVX512-LABEL: test_16f32_fmadd_load:219; AVX512: # %bb.0:220; AVX512-NEXT: vfmadd132ps {{.*#+}} zmm0 = (zmm0 * mem) + zmm1221; AVX512-NEXT: retq222 %x = load <16 x float>, ptr %a0223 %y = fmul contract <16 x float> %x, %a1224 %res = fadd contract <16 x float> %y, %a2225 ret <16 x float> %res226}227 228define <8 x double> @test_8f64_fmsub_load(ptr %a0, <8 x double> %a1, <8 x double> %a2) {229; FMA-LABEL: test_8f64_fmsub_load:230; FMA: # %bb.0:231; FMA-NEXT: vfmsub132pd {{.*#+}} ymm0 = (ymm0 * mem) - ymm2232; FMA-NEXT: vfmsub132pd {{.*#+}} ymm1 = (ymm1 * mem) - ymm3233; FMA-NEXT: retq234;235; FMA4-LABEL: test_8f64_fmsub_load:236; FMA4: # %bb.0:237; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * mem) - ymm2238; FMA4-NEXT: vfmsubpd {{.*#+}} ymm1 = (ymm1 * mem) - ymm3239; FMA4-NEXT: retq240;241; AVX512-LABEL: test_8f64_fmsub_load:242; AVX512: # %bb.0:243; AVX512-NEXT: vfmsub132pd {{.*#+}} zmm0 = (zmm0 * mem) - zmm1244; AVX512-NEXT: retq245 %x = load <8 x double>, ptr %a0246 %y = fmul contract <8 x double> %x, %a1247 %res = fsub contract <8 x double> %y, %a2248 ret <8 x double> %res249}250 251;252; Patterns (+ fneg variants): mul(add(1.0,x),y), mul(sub(1.0,x),y), mul(sub(x,1.0),y)253;254 255define <16 x float> @test_v16f32_mul_add_x_one_y(<16 x float> %x, <16 x float> %y) {256; FMA-LABEL: test_v16f32_mul_add_x_one_y:257; FMA: # %bb.0:258; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]259; FMA-NEXT: vaddps %ymm4, %ymm1, %ymm1260; FMA-NEXT: vaddps %ymm4, %ymm0, %ymm0261; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0262; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1263; FMA-NEXT: retq264;265; FMA4-LABEL: test_v16f32_mul_add_x_one_y:266; FMA4: # %bb.0:267; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]268; FMA4-NEXT: vaddps %ymm4, %ymm1, %ymm1269; FMA4-NEXT: vaddps %ymm4, %ymm0, %ymm0270; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0271; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1272; FMA4-NEXT: retq273;274; AVX512-LABEL: test_v16f32_mul_add_x_one_y:275; AVX512: # %bb.0:276; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0277; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0278; AVX512-NEXT: retq279 %a = fadd contract <16 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>280 %m = fmul contract <16 x float> %a, %y281 ret <16 x float> %m282}283 284define <16 x float> @test_v16f32_mul_add_x_one_y_ninf(<16 x float> %x, <16 x float> %y) {285; FMA-LABEL: test_v16f32_mul_add_x_one_y_ninf:286; FMA: # %bb.0:287; FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm2288; FMA-NEXT: vfmadd213ps {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm3289; FMA-NEXT: retq290;291; FMA4-LABEL: test_v16f32_mul_add_x_one_y_ninf:292; FMA4: # %bb.0:293; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2294; FMA4-NEXT: vfmaddps {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm3295; FMA4-NEXT: retq296;297; AVX512-LABEL: test_v16f32_mul_add_x_one_y_ninf:298; AVX512: # %bb.0:299; AVX512-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm1300; AVX512-NEXT: retq301 %a = fadd contract ninf <16 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>302 %m = fmul contract ninf <16 x float> %a, %y303 ret <16 x float> %m304}305 306define <8 x double> @test_v8f64_mul_y_add_x_one(<8 x double> %x, <8 x double> %y) {307; FMA-LABEL: test_v8f64_mul_y_add_x_one:308; FMA: # %bb.0:309; FMA-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]310; FMA-NEXT: vaddpd %ymm4, %ymm1, %ymm1311; FMA-NEXT: vaddpd %ymm4, %ymm0, %ymm0312; FMA-NEXT: vmulpd %ymm0, %ymm2, %ymm0313; FMA-NEXT: vmulpd %ymm1, %ymm3, %ymm1314; FMA-NEXT: retq315;316; FMA4-LABEL: test_v8f64_mul_y_add_x_one:317; FMA4: # %bb.0:318; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]319; FMA4-NEXT: vaddpd %ymm4, %ymm1, %ymm1320; FMA4-NEXT: vaddpd %ymm4, %ymm0, %ymm0321; FMA4-NEXT: vmulpd %ymm0, %ymm2, %ymm0322; FMA4-NEXT: vmulpd %ymm1, %ymm3, %ymm1323; FMA4-NEXT: retq324;325; AVX512-LABEL: test_v8f64_mul_y_add_x_one:326; AVX512: # %bb.0:327; AVX512-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0328; AVX512-NEXT: vmulpd %zmm0, %zmm1, %zmm0329; AVX512-NEXT: retq330 %a = fadd contract <8 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>331 %m = fmul contract <8 x double> %y, %a332 ret <8 x double> %m333}334 335define <8 x double> @test_v8f64_mul_y_add_x_one_ninf(<8 x double> %x, <8 x double> %y) {336; FMA-LABEL: test_v8f64_mul_y_add_x_one_ninf:337; FMA: # %bb.0:338; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm2339; FMA-NEXT: vfmadd213pd {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm3340; FMA-NEXT: retq341;342; FMA4-LABEL: test_v8f64_mul_y_add_x_one_ninf:343; FMA4: # %bb.0:344; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2345; FMA4-NEXT: vfmaddpd {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm3346; FMA4-NEXT: retq347;348; AVX512-LABEL: test_v8f64_mul_y_add_x_one_ninf:349; AVX512: # %bb.0:350; AVX512-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm1351; AVX512-NEXT: retq352 %a = fadd contract ninf <8 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>353 %m = fmul contract ninf <8 x double> %y, %a354 ret <8 x double> %m355}356 357define <16 x float> @test_v16f32_mul_add_x_negone_y(<16 x float> %x, <16 x float> %y) {358; FMA-LABEL: test_v16f32_mul_add_x_negone_y:359; FMA: # %bb.0:360; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]361; FMA-NEXT: vaddps %ymm4, %ymm1, %ymm1362; FMA-NEXT: vaddps %ymm4, %ymm0, %ymm0363; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0364; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1365; FMA-NEXT: retq366;367; FMA4-LABEL: test_v16f32_mul_add_x_negone_y:368; FMA4: # %bb.0:369; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]370; FMA4-NEXT: vaddps %ymm4, %ymm1, %ymm1371; FMA4-NEXT: vaddps %ymm4, %ymm0, %ymm0372; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0373; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1374; FMA4-NEXT: retq375;376; AVX512-LABEL: test_v16f32_mul_add_x_negone_y:377; AVX512: # %bb.0:378; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0379; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0380; AVX512-NEXT: retq381 %a = fadd contract <16 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>382 %m = fmul contract <16 x float> %a, %y383 ret <16 x float> %m384}385 386define <16 x float> @test_v16f32_mul_add_x_negone_y_ninf(<16 x float> %x, <16 x float> %y) {387; FMA-LABEL: test_v16f32_mul_add_x_negone_y_ninf:388; FMA: # %bb.0:389; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm2390; FMA-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm3391; FMA-NEXT: retq392;393; FMA4-LABEL: test_v16f32_mul_add_x_negone_y_ninf:394; FMA4: # %bb.0:395; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm2396; FMA4-NEXT: vfmsubps {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm3397; FMA4-NEXT: retq398;399; AVX512-LABEL: test_v16f32_mul_add_x_negone_y_ninf:400; AVX512: # %bb.0:401; AVX512-NEXT: vfmsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm1402; AVX512-NEXT: retq403 %a = fadd contract ninf <16 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>404 %m = fmul contract ninf <16 x float> %a, %y405 ret <16 x float> %m406}407 408define <8 x double> @test_v8f64_mul_y_add_x_negone(<8 x double> %x, <8 x double> %y) {409; FMA-LABEL: test_v8f64_mul_y_add_x_negone:410; FMA: # %bb.0:411; FMA-NEXT: vbroadcastsd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]412; FMA-NEXT: vaddpd %ymm4, %ymm1, %ymm1413; FMA-NEXT: vaddpd %ymm4, %ymm0, %ymm0414; FMA-NEXT: vmulpd %ymm0, %ymm2, %ymm0415; FMA-NEXT: vmulpd %ymm1, %ymm3, %ymm1416; FMA-NEXT: retq417;418; FMA4-LABEL: test_v8f64_mul_y_add_x_negone:419; FMA4: # %bb.0:420; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]421; FMA4-NEXT: vaddpd %ymm4, %ymm1, %ymm1422; FMA4-NEXT: vaddpd %ymm4, %ymm0, %ymm0423; FMA4-NEXT: vmulpd %ymm0, %ymm2, %ymm0424; FMA4-NEXT: vmulpd %ymm1, %ymm3, %ymm1425; FMA4-NEXT: retq426;427; AVX512-LABEL: test_v8f64_mul_y_add_x_negone:428; AVX512: # %bb.0:429; AVX512-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0430; AVX512-NEXT: vmulpd %zmm0, %zmm1, %zmm0431; AVX512-NEXT: retq432 %a = fadd contract <8 x double> %x, <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>433 %m = fmul contract <8 x double> %y, %a434 ret <8 x double> %m435}436 437define <8 x double> @test_v8f64_mul_y_add_x_negone_ninf(<8 x double> %x, <8 x double> %y) {438; FMA-LABEL: test_v8f64_mul_y_add_x_negone_ninf:439; FMA: # %bb.0:440; FMA-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm2441; FMA-NEXT: vfmsub213pd {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm3442; FMA-NEXT: retq443;444; FMA4-LABEL: test_v8f64_mul_y_add_x_negone_ninf:445; FMA4: # %bb.0:446; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm2447; FMA4-NEXT: vfmsubpd {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm3448; FMA4-NEXT: retq449;450; AVX512-LABEL: test_v8f64_mul_y_add_x_negone_ninf:451; AVX512: # %bb.0:452; AVX512-NEXT: vfmsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm1453; AVX512-NEXT: retq454 %a = fadd contract ninf <8 x double> %x, <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>455 %m = fmul contract ninf <8 x double> %y, %a456 ret <8 x double> %m457}458 459define <16 x float> @test_v16f32_mul_sub_one_x_y(<16 x float> %x, <16 x float> %y) {460; FMA-LABEL: test_v16f32_mul_sub_one_x_y:461; FMA: # %bb.0:462; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]463; FMA-NEXT: vsubps %ymm1, %ymm4, %ymm1464; FMA-NEXT: vsubps %ymm0, %ymm4, %ymm0465; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0466; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1467; FMA-NEXT: retq468;469; FMA4-LABEL: test_v16f32_mul_sub_one_x_y:470; FMA4: # %bb.0:471; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]472; FMA4-NEXT: vsubps %ymm1, %ymm4, %ymm1473; FMA4-NEXT: vsubps %ymm0, %ymm4, %ymm0474; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0475; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1476; FMA4-NEXT: retq477;478; AVX512-LABEL: test_v16f32_mul_sub_one_x_y:479; AVX512: # %bb.0:480; AVX512-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]481; AVX512-NEXT: vsubps %zmm0, %zmm2, %zmm0482; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0483; AVX512-NEXT: retq484 %s = fsub contract <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x485 %m = fmul contract <16 x float> %s, %y486 ret <16 x float> %m487}488 489define <16 x float> @test_v16f32_mul_sub_one_x_y_ninf(<16 x float> %x, <16 x float> %y) {490; FMA-LABEL: test_v16f32_mul_sub_one_x_y_ninf:491; FMA: # %bb.0:492; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]493; FMA-NEXT: vsubps %ymm1, %ymm4, %ymm1494; FMA-NEXT: vsubps %ymm0, %ymm4, %ymm0495; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0496; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1497; FMA-NEXT: retq498;499; FMA4-LABEL: test_v16f32_mul_sub_one_x_y_ninf:500; FMA4: # %bb.0:501; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]502; FMA4-NEXT: vsubps %ymm1, %ymm4, %ymm1503; FMA4-NEXT: vsubps %ymm0, %ymm4, %ymm0504; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0505; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1506; FMA4-NEXT: retq507;508; AVX512-LABEL: test_v16f32_mul_sub_one_x_y_ninf:509; AVX512: # %bb.0:510; AVX512-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]511; AVX512-NEXT: vsubps %zmm0, %zmm2, %zmm0512; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0513; AVX512-NEXT: retq514 %s = fsub contract ninf <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x515 %m = fmul contract ninf <16 x float> %s, %y516 ret <16 x float> %m517}518 519define <8 x double> @test_v8f64_mul_y_sub_one_x(<8 x double> %x, <8 x double> %y) {520; FMA-LABEL: test_v8f64_mul_y_sub_one_x:521; FMA: # %bb.0:522; FMA-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]523; FMA-NEXT: vsubpd %ymm1, %ymm4, %ymm1524; FMA-NEXT: vsubpd %ymm0, %ymm4, %ymm0525; FMA-NEXT: vmulpd %ymm0, %ymm2, %ymm0526; FMA-NEXT: vmulpd %ymm1, %ymm3, %ymm1527; FMA-NEXT: retq528;529; FMA4-LABEL: test_v8f64_mul_y_sub_one_x:530; FMA4: # %bb.0:531; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]532; FMA4-NEXT: vsubpd %ymm1, %ymm4, %ymm1533; FMA4-NEXT: vsubpd %ymm0, %ymm4, %ymm0534; FMA4-NEXT: vmulpd %ymm0, %ymm2, %ymm0535; FMA4-NEXT: vmulpd %ymm1, %ymm3, %ymm1536; FMA4-NEXT: retq537;538; AVX512-LABEL: test_v8f64_mul_y_sub_one_x:539; AVX512: # %bb.0:540; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]541; AVX512-NEXT: vsubpd %zmm0, %zmm2, %zmm0542; AVX512-NEXT: vmulpd %zmm0, %zmm1, %zmm0543; AVX512-NEXT: retq544 %s = fsub contract <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, %x545 %m = fmul contract <8 x double> %y, %s546 ret <8 x double> %m547}548 549define <8 x double> @test_v8f64_mul_y_sub_one_x_ninf(<8 x double> %x, <8 x double> %y) {550; FMA-LABEL: test_v8f64_mul_y_sub_one_x_ninf:551; FMA: # %bb.0:552; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm2553; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm1 = -(ymm3 * ymm1) + ymm3554; FMA-NEXT: retq555;556; FMA4-LABEL: test_v8f64_mul_y_sub_one_x_ninf:557; FMA4: # %bb.0:558; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm0 = -(ymm0 * ymm2) + ymm2559; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm1 = -(ymm1 * ymm3) + ymm3560; FMA4-NEXT: retq561;562; AVX512-LABEL: test_v8f64_mul_y_sub_one_x_ninf:563; AVX512: # %bb.0:564; AVX512-NEXT: vfnmadd213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) + zmm1565; AVX512-NEXT: retq566 %s = fsub contract ninf <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, %x567 %m = fmul contract ninf <8 x double> %y, %s568 ret <8 x double> %m569}570 571define <16 x float> @test_v16f32_mul_sub_negone_x_y(<16 x float> %x, <16 x float> %y) {572; FMA-LABEL: test_v16f32_mul_sub_negone_x_y:573; FMA: # %bb.0:574; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]575; FMA-NEXT: vsubps %ymm1, %ymm4, %ymm1576; FMA-NEXT: vsubps %ymm0, %ymm4, %ymm0577; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0578; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1579; FMA-NEXT: retq580;581; FMA4-LABEL: test_v16f32_mul_sub_negone_x_y:582; FMA4: # %bb.0:583; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]584; FMA4-NEXT: vsubps %ymm1, %ymm4, %ymm1585; FMA4-NEXT: vsubps %ymm0, %ymm4, %ymm0586; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0587; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1588; FMA4-NEXT: retq589;590; AVX512-LABEL: test_v16f32_mul_sub_negone_x_y:591; AVX512: # %bb.0:592; AVX512-NEXT: vbroadcastss {{.*#+}} zmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]593; AVX512-NEXT: vsubps %zmm0, %zmm2, %zmm0594; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0595; AVX512-NEXT: retq596 %s = fsub contract <16 x float> <float -1.0, float -1.0, float -1.0, float -1.0,float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>, %x597 %m = fmul contract <16 x float> %s, %y598 ret <16 x float> %m599}600 601define <16 x float> @test_v16f32_mul_sub_negone_x_y_ninf(<16 x float> %x, <16 x float> %y) {602; FMA-LABEL: test_v16f32_mul_sub_negone_x_y_ninf:603; FMA: # %bb.0:604; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]605; FMA-NEXT: vsubps %ymm1, %ymm4, %ymm1606; FMA-NEXT: vsubps %ymm0, %ymm4, %ymm0607; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0608; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1609; FMA-NEXT: retq610;611; FMA4-LABEL: test_v16f32_mul_sub_negone_x_y_ninf:612; FMA4: # %bb.0:613; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]614; FMA4-NEXT: vsubps %ymm1, %ymm4, %ymm1615; FMA4-NEXT: vsubps %ymm0, %ymm4, %ymm0616; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0617; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1618; FMA4-NEXT: retq619;620; AVX512-LABEL: test_v16f32_mul_sub_negone_x_y_ninf:621; AVX512: # %bb.0:622; AVX512-NEXT: vbroadcastss {{.*#+}} zmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]623; AVX512-NEXT: vsubps %zmm0, %zmm2, %zmm0624; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0625; AVX512-NEXT: retq626 %s = fsub contract ninf <16 x float> <float -1.0, float -1.0, float -1.0, float -1.0,float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>, %x627 %m = fmul contract ninf <16 x float> %s, %y628 ret <16 x float> %m629}630 631define <8 x double> @test_v8f64_mul_y_sub_negone_x(<8 x double> %x, <8 x double> %y) {632; FMA-LABEL: test_v8f64_mul_y_sub_negone_x:633; FMA: # %bb.0:634; FMA-NEXT: vbroadcastsd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]635; FMA-NEXT: vsubpd %ymm1, %ymm4, %ymm1636; FMA-NEXT: vsubpd %ymm0, %ymm4, %ymm0637; FMA-NEXT: vmulpd %ymm0, %ymm2, %ymm0638; FMA-NEXT: vmulpd %ymm1, %ymm3, %ymm1639; FMA-NEXT: retq640;641; FMA4-LABEL: test_v8f64_mul_y_sub_negone_x:642; FMA4: # %bb.0:643; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]644; FMA4-NEXT: vsubpd %ymm1, %ymm4, %ymm1645; FMA4-NEXT: vsubpd %ymm0, %ymm4, %ymm0646; FMA4-NEXT: vmulpd %ymm0, %ymm2, %ymm0647; FMA4-NEXT: vmulpd %ymm1, %ymm3, %ymm1648; FMA4-NEXT: retq649;650; AVX512-LABEL: test_v8f64_mul_y_sub_negone_x:651; AVX512: # %bb.0:652; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]653; AVX512-NEXT: vsubpd %zmm0, %zmm2, %zmm0654; AVX512-NEXT: vmulpd %zmm0, %zmm1, %zmm0655; AVX512-NEXT: retq656 %s = fsub contract <8 x double> <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>, %x657 %m = fmul contract <8 x double> %y, %s658 ret <8 x double> %m659}660 661define <8 x double> @test_v8f64_mul_y_sub_negone_x_ninf(<8 x double> %x, <8 x double> %y) {662; FMA-LABEL: test_v8f64_mul_y_sub_negone_x_ninf:663; FMA: # %bb.0:664; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm2 * ymm0) - ymm2665; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm1 = -(ymm3 * ymm1) - ymm3666; FMA-NEXT: retq667;668; FMA4-LABEL: test_v8f64_mul_y_sub_negone_x_ninf:669; FMA4: # %bb.0:670; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm2671; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm1 = -(ymm1 * ymm3) - ymm3672; FMA4-NEXT: retq673;674; AVX512-LABEL: test_v8f64_mul_y_sub_negone_x_ninf:675; AVX512: # %bb.0:676; AVX512-NEXT: vfnmsub213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm1677; AVX512-NEXT: retq678 %s = fsub contract ninf <8 x double> <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>, %x679 %m = fmul contract ninf <8 x double> %y, %s680 ret <8 x double> %m681}682 683define <16 x float> @test_v16f32_mul_sub_x_one_y(<16 x float> %x, <16 x float> %y) {684; FMA-LABEL: test_v16f32_mul_sub_x_one_y:685; FMA: # %bb.0:686; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]687; FMA-NEXT: vaddps %ymm4, %ymm1, %ymm1688; FMA-NEXT: vaddps %ymm4, %ymm0, %ymm0689; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0690; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1691; FMA-NEXT: retq692;693; FMA4-LABEL: test_v16f32_mul_sub_x_one_y:694; FMA4: # %bb.0:695; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]696; FMA4-NEXT: vaddps %ymm4, %ymm1, %ymm1697; FMA4-NEXT: vaddps %ymm4, %ymm0, %ymm0698; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0699; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1700; FMA4-NEXT: retq701;702; AVX512-LABEL: test_v16f32_mul_sub_x_one_y:703; AVX512: # %bb.0:704; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0705; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0706; AVX512-NEXT: retq707 %s = fsub contract <16 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>708 %m = fmul contract <16 x float> %s, %y709 ret <16 x float> %m710}711 712define <16 x float> @test_v16f32_mul_sub_x_one_y_ninf(<16 x float> %x, <16 x float> %y) {713; FMA-LABEL: test_v16f32_mul_sub_x_one_y_ninf:714; FMA: # %bb.0:715; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm2716; FMA-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm3717; FMA-NEXT: retq718;719; FMA4-LABEL: test_v16f32_mul_sub_x_one_y_ninf:720; FMA4: # %bb.0:721; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm2722; FMA4-NEXT: vfmsubps {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm3723; FMA4-NEXT: retq724;725; AVX512-LABEL: test_v16f32_mul_sub_x_one_y_ninf:726; AVX512: # %bb.0:727; AVX512-NEXT: vfmsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm1728; AVX512-NEXT: retq729 %s = fsub contract ninf <16 x float> %x, <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>730 %m = fmul contract ninf <16 x float> %s, %y731 ret <16 x float> %m732}733 734define <8 x double> @test_v8f64_mul_y_sub_x_one(<8 x double> %x, <8 x double> %y) {735; FMA-LABEL: test_v8f64_mul_y_sub_x_one:736; FMA: # %bb.0:737; FMA-NEXT: vbroadcastsd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]738; FMA-NEXT: vaddpd %ymm4, %ymm1, %ymm1739; FMA-NEXT: vaddpd %ymm4, %ymm0, %ymm0740; FMA-NEXT: vmulpd %ymm0, %ymm2, %ymm0741; FMA-NEXT: vmulpd %ymm1, %ymm3, %ymm1742; FMA-NEXT: retq743;744; FMA4-LABEL: test_v8f64_mul_y_sub_x_one:745; FMA4: # %bb.0:746; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]747; FMA4-NEXT: vaddpd %ymm4, %ymm1, %ymm1748; FMA4-NEXT: vaddpd %ymm4, %ymm0, %ymm0749; FMA4-NEXT: vmulpd %ymm0, %ymm2, %ymm0750; FMA4-NEXT: vmulpd %ymm1, %ymm3, %ymm1751; FMA4-NEXT: retq752;753; AVX512-LABEL: test_v8f64_mul_y_sub_x_one:754; AVX512: # %bb.0:755; AVX512-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0756; AVX512-NEXT: vmulpd %zmm0, %zmm1, %zmm0757; AVX512-NEXT: retq758 %s = fsub contract <8 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>759 %m = fmul contract <8 x double> %y, %s760 ret <8 x double> %m761}762 763define <8 x double> @test_v8f64_mul_y_sub_x_one_ninf(<8 x double> %x, <8 x double> %y) {764; FMA-LABEL: test_v8f64_mul_y_sub_x_one_ninf:765; FMA: # %bb.0:766; FMA-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm2767; FMA-NEXT: vfmsub213pd {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm3768; FMA-NEXT: retq769;770; FMA4-LABEL: test_v8f64_mul_y_sub_x_one_ninf:771; FMA4: # %bb.0:772; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm2773; FMA4-NEXT: vfmsubpd {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm3774; FMA4-NEXT: retq775;776; AVX512-LABEL: test_v8f64_mul_y_sub_x_one_ninf:777; AVX512: # %bb.0:778; AVX512-NEXT: vfmsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm1779; AVX512-NEXT: retq780 %s = fsub contract ninf <8 x double> %x, <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>781 %m = fmul contract ninf <8 x double> %y, %s782 ret <8 x double> %m783}784 785define <16 x float> @test_v16f32_mul_sub_x_negone_y(<16 x float> %x, <16 x float> %y) {786; FMA-LABEL: test_v16f32_mul_sub_x_negone_y:787; FMA: # %bb.0:788; FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]789; FMA-NEXT: vaddps %ymm4, %ymm1, %ymm1790; FMA-NEXT: vaddps %ymm4, %ymm0, %ymm0791; FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0792; FMA-NEXT: vmulps %ymm3, %ymm1, %ymm1793; FMA-NEXT: retq794;795; FMA4-LABEL: test_v16f32_mul_sub_x_negone_y:796; FMA4: # %bb.0:797; FMA4-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]798; FMA4-NEXT: vaddps %ymm4, %ymm1, %ymm1799; FMA4-NEXT: vaddps %ymm4, %ymm0, %ymm0800; FMA4-NEXT: vmulps %ymm2, %ymm0, %ymm0801; FMA4-NEXT: vmulps %ymm3, %ymm1, %ymm1802; FMA4-NEXT: retq803;804; AVX512-LABEL: test_v16f32_mul_sub_x_negone_y:805; AVX512: # %bb.0:806; AVX512-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0807; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0808; AVX512-NEXT: retq809 %s = fsub contract <16 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>810 %m = fmul contract <16 x float> %s, %y811 ret <16 x float> %m812}813 814define <16 x float> @test_v16f32_mul_sub_x_negone_y_ninf(<16 x float> %x, <16 x float> %y) {815; FMA-LABEL: test_v16f32_mul_sub_x_negone_y_ninf:816; FMA: # %bb.0:817; FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm2818; FMA-NEXT: vfmadd213ps {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm3819; FMA-NEXT: retq820;821; FMA4-LABEL: test_v16f32_mul_sub_x_negone_y_ninf:822; FMA4: # %bb.0:823; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2824; FMA4-NEXT: vfmaddps {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm3825; FMA4-NEXT: retq826;827; AVX512-LABEL: test_v16f32_mul_sub_x_negone_y_ninf:828; AVX512: # %bb.0:829; AVX512-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm1830; AVX512-NEXT: retq831 %s = fsub contract ninf <16 x float> %x, <float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0, float -1.0>832 %m = fmul contract ninf <16 x float> %s, %y833 ret <16 x float> %m834}835 836define <8 x double> @test_v8f64_mul_y_sub_x_negone(<8 x double> %x, <8 x double> %y) {837; FMA-LABEL: test_v8f64_mul_y_sub_x_negone:838; FMA: # %bb.0:839; FMA-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]840; FMA-NEXT: vaddpd %ymm4, %ymm1, %ymm1841; FMA-NEXT: vaddpd %ymm4, %ymm0, %ymm0842; FMA-NEXT: vmulpd %ymm0, %ymm2, %ymm0843; FMA-NEXT: vmulpd %ymm1, %ymm3, %ymm1844; FMA-NEXT: retq845;846; FMA4-LABEL: test_v8f64_mul_y_sub_x_negone:847; FMA4: # %bb.0:848; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]849; FMA4-NEXT: vaddpd %ymm4, %ymm1, %ymm1850; FMA4-NEXT: vaddpd %ymm4, %ymm0, %ymm0851; FMA4-NEXT: vmulpd %ymm0, %ymm2, %ymm0852; FMA4-NEXT: vmulpd %ymm1, %ymm3, %ymm1853; FMA4-NEXT: retq854;855; AVX512-LABEL: test_v8f64_mul_y_sub_x_negone:856; AVX512: # %bb.0:857; AVX512-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0858; AVX512-NEXT: vmulpd %zmm0, %zmm1, %zmm0859; AVX512-NEXT: retq860 %s = fsub contract <8 x double> %x, <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>861 %m = fmul contract <8 x double> %y, %s862 ret <8 x double> %m863}864 865define <8 x double> @test_v8f64_mul_y_sub_x_negone_ninf(<8 x double> %x, <8 x double> %y) {866; FMA-LABEL: test_v8f64_mul_y_sub_x_negone_ninf:867; FMA: # %bb.0:868; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm2869; FMA-NEXT: vfmadd213pd {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm3870; FMA-NEXT: retq871;872; FMA4-LABEL: test_v8f64_mul_y_sub_x_negone_ninf:873; FMA4: # %bb.0:874; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2875; FMA4-NEXT: vfmaddpd {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm3876; FMA4-NEXT: retq877;878; AVX512-LABEL: test_v8f64_mul_y_sub_x_negone_ninf:879; AVX512: # %bb.0:880; AVX512-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm1881; AVX512-NEXT: retq882 %s = fsub contract ninf <8 x double> %x, <double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0, double -1.0>883 %m = fmul contract ninf <8 x double> %y, %s884 ret <8 x double> %m885}886 887 888define <16 x float> @test_v16f32_interp(<16 x float> %x, <16 x float> %y, <16 x float> %t) {889; FMA-LABEL: test_v16f32_interp:890; FMA: # %bb.0:891; FMA-NEXT: vbroadcastss {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]892; FMA-NEXT: vsubps %ymm4, %ymm6, %ymm7893; FMA-NEXT: vsubps %ymm5, %ymm6, %ymm6894; FMA-NEXT: vmulps %ymm6, %ymm3, %ymm3895; FMA-NEXT: vmulps %ymm7, %ymm2, %ymm2896; FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm4 * ymm0) + ymm2897; FMA-NEXT: vfmadd213ps {{.*#+}} ymm1 = (ymm5 * ymm1) + ymm3898; FMA-NEXT: retq899;900; FMA4-LABEL: test_v16f32_interp:901; FMA4: # %bb.0:902; FMA4-NEXT: vbroadcastss {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]903; FMA4-NEXT: vsubps %ymm4, %ymm6, %ymm7904; FMA4-NEXT: vsubps %ymm5, %ymm6, %ymm6905; FMA4-NEXT: vmulps %ymm6, %ymm3, %ymm3906; FMA4-NEXT: vmulps %ymm7, %ymm2, %ymm2907; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * ymm4) + ymm2908; FMA4-NEXT: vfmaddps {{.*#+}} ymm1 = (ymm1 * ymm5) + ymm3909; FMA4-NEXT: retq910;911; AVX512-LABEL: test_v16f32_interp:912; AVX512: # %bb.0:913; AVX512-NEXT: vbroadcastss {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]914; AVX512-NEXT: vsubps %zmm2, %zmm3, %zmm3915; AVX512-NEXT: vmulps %zmm3, %zmm1, %zmm1916; AVX512-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm2 * zmm0) + zmm1917; AVX512-NEXT: retq918 %t1 = fsub contract nsz <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %t919 %tx = fmul contract nsz <16 x float> %x, %t920 %ty = fmul contract nsz <16 x float> %y, %t1921 %r = fadd contract nsz <16 x float> %tx, %ty922 ret <16 x float> %r923}924 925define <16 x float> @test_v16f32_interp_ninf(<16 x float> %x, <16 x float> %y, <16 x float> %t) {926; FMA-LABEL: test_v16f32_interp_ninf:927; FMA: # %bb.0:928; FMA-NEXT: vfmsub213ps {{.*#+}} ymm3 = (ymm5 * ymm3) - ymm3929; FMA-NEXT: vfmsub213ps {{.*#+}} ymm2 = (ymm4 * ymm2) - ymm2930; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm4 * ymm0) - ymm2931; FMA-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm5 * ymm1) - ymm3932; FMA-NEXT: retq933;934; FMA4-LABEL: test_v16f32_interp_ninf:935; FMA4: # %bb.0:936; FMA4-NEXT: vfmsubps {{.*#+}} ymm3 = (ymm5 * ymm3) - ymm3937; FMA4-NEXT: vfmsubps {{.*#+}} ymm2 = (ymm4 * ymm2) - ymm2938; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm4) - ymm2939; FMA4-NEXT: vfmsubps {{.*#+}} ymm1 = (ymm1 * ymm5) - ymm3940; FMA4-NEXT: retq941;942; AVX512-LABEL: test_v16f32_interp_ninf:943; AVX512: # %bb.0:944; AVX512-NEXT: vfmsub213ps {{.*#+}} zmm1 = (zmm2 * zmm1) - zmm1945; AVX512-NEXT: vfmsub213ps {{.*#+}} zmm0 = (zmm2 * zmm0) - zmm1946; AVX512-NEXT: retq947 %t1 = fsub contract ninf nsz <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %t948 %tx = fmul contract ninf nsz <16 x float> %x, %t949 %ty = fmul contract ninf nsz <16 x float> %y, %t1950 %r = fadd contract ninf nsz <16 x float> %tx, %ty951 ret <16 x float> %r952}953 954define <8 x double> @test_v8f64_interp(<8 x double> %x, <8 x double> %y, <8 x double> %t) {955; FMA-LABEL: test_v8f64_interp:956; FMA: # %bb.0:957; FMA-NEXT: vbroadcastsd {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]958; FMA-NEXT: vsubpd %ymm4, %ymm6, %ymm7959; FMA-NEXT: vsubpd %ymm5, %ymm6, %ymm6960; FMA-NEXT: vmulpd %ymm6, %ymm3, %ymm3961; FMA-NEXT: vmulpd %ymm7, %ymm2, %ymm2962; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm4 * ymm0) + ymm2963; FMA-NEXT: vfmadd213pd {{.*#+}} ymm1 = (ymm5 * ymm1) + ymm3964; FMA-NEXT: retq965;966; FMA4-LABEL: test_v8f64_interp:967; FMA4: # %bb.0:968; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]969; FMA4-NEXT: vsubpd %ymm4, %ymm6, %ymm7970; FMA4-NEXT: vsubpd %ymm5, %ymm6, %ymm6971; FMA4-NEXT: vmulpd %ymm6, %ymm3, %ymm3972; FMA4-NEXT: vmulpd %ymm7, %ymm2, %ymm2973; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm4) + ymm2974; FMA4-NEXT: vfmaddpd {{.*#+}} ymm1 = (ymm1 * ymm5) + ymm3975; FMA4-NEXT: retq976;977; AVX512-LABEL: test_v8f64_interp:978; AVX512: # %bb.0:979; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]980; AVX512-NEXT: vsubpd %zmm2, %zmm3, %zmm3981; AVX512-NEXT: vmulpd %zmm3, %zmm1, %zmm1982; AVX512-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm2 * zmm0) + zmm1983; AVX512-NEXT: retq984 %t1 = fsub contract nsz <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, %t985 %tx = fmul contract nsz <8 x double> %x, %t986 %ty = fmul contract nsz <8 x double> %y, %t1987 %r = fadd contract nsz <8 x double> %tx, %ty988 ret <8 x double> %r989}990 991define <8 x double> @test_v8f64_interp_ninf(<8 x double> %x, <8 x double> %y, <8 x double> %t) {992; FMA-LABEL: test_v8f64_interp_ninf:993; FMA: # %bb.0:994; FMA-NEXT: vfmsub213pd {{.*#+}} ymm3 = (ymm5 * ymm3) - ymm3995; FMA-NEXT: vfmsub213pd {{.*#+}} ymm2 = (ymm4 * ymm2) - ymm2996; FMA-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm4 * ymm0) - ymm2997; FMA-NEXT: vfmsub213pd {{.*#+}} ymm1 = (ymm5 * ymm1) - ymm3998; FMA-NEXT: retq999;1000; FMA4-LABEL: test_v8f64_interp_ninf:1001; FMA4: # %bb.0:1002; FMA4-NEXT: vfmsubpd {{.*#+}} ymm3 = (ymm5 * ymm3) - ymm31003; FMA4-NEXT: vfmsubpd {{.*#+}} ymm2 = (ymm4 * ymm2) - ymm21004; FMA4-NEXT: vfmsubpd {{.*#+}} ymm0 = (ymm0 * ymm4) - ymm21005; FMA4-NEXT: vfmsubpd {{.*#+}} ymm1 = (ymm1 * ymm5) - ymm31006; FMA4-NEXT: retq1007;1008; AVX512-LABEL: test_v8f64_interp_ninf:1009; AVX512: # %bb.0:1010; AVX512-NEXT: vfmsub213pd {{.*#+}} zmm1 = (zmm2 * zmm1) - zmm11011; AVX512-NEXT: vfmsub213pd {{.*#+}} zmm0 = (zmm2 * zmm0) - zmm11012; AVX512-NEXT: retq1013 %t1 = fsub contract ninf nsz <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, %t1014 %tx = fmul contract ninf nsz <8 x double> %x, %t1015 %ty = fmul contract ninf nsz <8 x double> %y, %t11016 %r = fadd contract ninf nsz <8 x double> %tx, %ty1017 ret <8 x double> %r1018}1019 1020;1021; Pattern: (fneg (fma x, y, z)) -> (fma x, -y, -z)1022;1023 1024define <16 x float> @test_v16f32_fneg_fmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {1025; FMA-LABEL: test_v16f32_fneg_fmadd:1026; FMA: # %bb.0:1027; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) - ymm41028; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm1 = -(ymm3 * ymm1) - ymm51029; FMA-NEXT: retq1030;1031; FMA4-LABEL: test_v16f32_fneg_fmadd:1032; FMA4: # %bb.0:1033; FMA4-NEXT: vfnmsubps {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm41034; FMA4-NEXT: vfnmsubps {{.*#+}} ymm1 = -(ymm1 * ymm3) - ymm51035; FMA4-NEXT: retq1036;1037; AVX512-LABEL: test_v16f32_fneg_fmadd:1038; AVX512: # %bb.0:1039; AVX512-NEXT: vfnmsub213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm21040; AVX512-NEXT: retq1041 %mul = fmul contract nsz <16 x float> %a0, %a11042 %add = fadd contract nsz <16 x float> %mul, %a21043 %neg = fsub contract nsz <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %add1044 ret <16 x float> %neg1045}1046 1047define <8 x double> @test_v8f64_fneg_fmsub(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {1048; FMA-LABEL: test_v8f64_fneg_fmsub:1049; FMA: # %bb.0:1050; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm41051; FMA-NEXT: vfnmadd213pd {{.*#+}} ymm1 = -(ymm3 * ymm1) + ymm51052; FMA-NEXT: retq1053;1054; FMA4-LABEL: test_v8f64_fneg_fmsub:1055; FMA4: # %bb.0:1056; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm0 = -(ymm0 * ymm2) + ymm41057; FMA4-NEXT: vfnmaddpd {{.*#+}} ymm1 = -(ymm1 * ymm3) + ymm51058; FMA4-NEXT: retq1059;1060; AVX512-LABEL: test_v8f64_fneg_fmsub:1061; AVX512: # %bb.0:1062; AVX512-NEXT: vfnmadd213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) + zmm21063; AVX512-NEXT: retq1064 %mul = fmul contract nsz <8 x double> %a0, %a11065 %sub = fsub contract nsz <8 x double> %mul, %a21066 %neg = fsub contract nsz <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %sub1067 ret <8 x double> %neg1068}1069 1070define <16 x float> @test_v16f32_fneg_fnmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {1071; FMA-LABEL: test_v16f32_fneg_fnmadd:1072; FMA: # %bb.0:1073; FMA-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) - ymm41074; FMA-NEXT: vfmsub213ps {{.*#+}} ymm1 = (ymm3 * ymm1) - ymm51075; FMA-NEXT: retq1076;1077; FMA4-LABEL: test_v16f32_fneg_fnmadd:1078; FMA4: # %bb.0:1079; FMA4-NEXT: vfmsubps {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm41080; FMA4-NEXT: vfmsubps {{.*#+}} ymm1 = (ymm1 * ymm3) - ymm51081; FMA4-NEXT: retq1082;1083; AVX512-LABEL: test_v16f32_fneg_fnmadd:1084; AVX512: # %bb.0:1085; AVX512-NEXT: vfmsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) - zmm21086; AVX512-NEXT: retq1087 %mul = fmul contract nsz <16 x float> %a0, %a11088 %neg0 = fsub contract nsz <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %mul1089 %add = fadd contract nsz <16 x float> %neg0, %a21090 %neg1 = fsub contract nsz <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %add1091 ret <16 x float> %neg11092}1093 1094define <8 x double> @test_v8f64_fneg_fnmsub(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {1095; FMA-LABEL: test_v8f64_fneg_fnmsub:1096; FMA: # %bb.0:1097; FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm41098; FMA-NEXT: vfmadd213pd {{.*#+}} ymm1 = (ymm3 * ymm1) + ymm51099; FMA-NEXT: retq1100;1101; FMA4-LABEL: test_v8f64_fneg_fnmsub:1102; FMA4: # %bb.0:1103; FMA4-NEXT: vfmaddpd {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm41104; FMA4-NEXT: vfmaddpd {{.*#+}} ymm1 = (ymm1 * ymm3) + ymm51105; FMA4-NEXT: retq1106;1107; AVX512-LABEL: test_v8f64_fneg_fnmsub:1108; AVX512: # %bb.0:1109; AVX512-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm21110; AVX512-NEXT: retq1111 %mul = fmul contract nsz <8 x double> %a0, %a11112 %neg0 = fsub contract nsz <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %mul1113 %sub = fsub contract nsz <8 x double> %neg0, %a21114 %neg1 = fsub contract nsz <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %sub1115 ret <8 x double> %neg11116}1117 1118;1119; Pattern: (fma x, c1, (fmul x, c2)) -> (fmul x, c1+c2)1120;1121 1122define <16 x float> @test_v16f32_fma_x_c1_fmul_x_c2(<16 x float> %x) {1123; FMA-LABEL: test_v16f32_fma_x_c1_fmul_x_c2:1124; FMA: # %bb.0:1125; FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01126; FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm11127; FMA-NEXT: retq1128;1129; FMA4-LABEL: test_v16f32_fma_x_c1_fmul_x_c2:1130; FMA4: # %bb.0:1131; FMA4-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm01132; FMA4-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm11133; FMA4-NEXT: retq1134;1135; AVX512-LABEL: test_v16f32_fma_x_c1_fmul_x_c2:1136; AVX512: # %bb.0:1137; AVX512-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm01138; AVX512-NEXT: retq1139 %m0 = fmul contract reassoc <16 x float> %x, <float 17.0, float 16.0, float 15.0, float 14.0, float 13.0, float 12.0, float 11.0, float 10.0, float 9.0, float 8.0, float 7.0, float 6.0, float 5.0, float 4.0, float 3.0, float 2.0>1140 %m1 = fmul contract reassoc <16 x float> %x, <float 16.0, float 15.0, float 14.0, float 13.0, float 12.0, float 11.0, float 10.0, float 9.0, float 8.0, float 7.0, float 6.0, float 5.0, float 4.0, float 3.0, float 2.0, float 1.0>1141 %a = fadd contract reassoc <16 x float> %m0, %m11142 ret <16 x float> %a1143}1144 1145;1146; Pattern: (fma (fmul x, c1), c2, y) -> (fma x, c1*c2, y)1147;1148 1149define <16 x float> @test_v16f32_fma_fmul_x_c1_c2_y(<16 x float> %x, <16 x float> %y) {1150; FMA-LABEL: test_v16f32_fma_fmul_x_c1_c2_y:1151; FMA: # %bb.0:1152; FMA-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * mem) + ymm21153; FMA-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * mem) + ymm31154; FMA-NEXT: retq1155;1156; FMA4-LABEL: test_v16f32_fma_fmul_x_c1_c2_y:1157; FMA4: # %bb.0:1158; FMA4-NEXT: vfmaddps {{.*#+}} ymm0 = (ymm0 * mem) + ymm21159; FMA4-NEXT: vfmaddps {{.*#+}} ymm1 = (ymm1 * mem) + ymm31160; FMA4-NEXT: retq1161;1162; AVX512-LABEL: test_v16f32_fma_fmul_x_c1_c2_y:1163; AVX512: # %bb.0:1164; AVX512-NEXT: vfmadd132ps {{.*#+}} zmm0 = (zmm0 * mem) + zmm11165; AVX512-NEXT: retq1166 %m0 = fmul contract reassoc <16 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0>1167 %m1 = fmul contract reassoc <16 x float> %m0, <float 16.0, float 15.0, float 14.0, float 13.0, float 12.0, float 11.0, float 10.0, float 9.0, float 8.0, float 7.0, float 6.0, float 5.0, float 4.0, float 3.0, float 2.0, float 1.0>1168 %a = fadd contract reassoc <16 x float> %m1, %y1169 ret <16 x float> %a1170}1171 1172; Pattern: (fneg (fmul x, y)) -> (fnmsub x, y, 0)1173 1174define <16 x float> @test_v16f32_fneg_fmul(<16 x float> %x, <16 x float> %y) {1175; FMA-LABEL: test_v16f32_fneg_fmul:1176; FMA: # %bb.0:1177; FMA-NEXT: vxorps %xmm4, %xmm4, %xmm41178; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) - ymm41179; FMA-NEXT: vfnmsub213ps {{.*#+}} ymm1 = -(ymm3 * ymm1) - ymm41180; FMA-NEXT: retq1181;1182; FMA4-LABEL: test_v16f32_fneg_fmul:1183; FMA4: # %bb.0:1184; FMA4-NEXT: vxorps %xmm4, %xmm4, %xmm41185; FMA4-NEXT: vfnmsubps {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm41186; FMA4-NEXT: vfnmsubps {{.*#+}} ymm1 = -(ymm1 * ymm3) - ymm41187; FMA4-NEXT: retq1188;1189; AVX512-LABEL: test_v16f32_fneg_fmul:1190; AVX512: # %bb.0:1191; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm21192; AVX512-NEXT: vfnmsub213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm21193; AVX512-NEXT: retq1194 %m = fmul contract nsz <16 x float> %x, %y1195 %n = fsub contract <16 x float> <float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0, float -0.0>, %m1196 ret <16 x float> %n1197}1198 1199define <8 x double> @test_v8f64_fneg_fmul(<8 x double> %x, <8 x double> %y) {1200; FMA-LABEL: test_v8f64_fneg_fmul:1201; FMA: # %bb.0:1202; FMA-NEXT: vxorpd %xmm4, %xmm4, %xmm41203; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm2 * ymm0) - ymm41204; FMA-NEXT: vfnmsub213pd {{.*#+}} ymm1 = -(ymm3 * ymm1) - ymm41205; FMA-NEXT: retq1206;1207; FMA4-LABEL: test_v8f64_fneg_fmul:1208; FMA4: # %bb.0:1209; FMA4-NEXT: vxorpd %xmm4, %xmm4, %xmm41210; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm41211; FMA4-NEXT: vfnmsubpd {{.*#+}} ymm1 = -(ymm1 * ymm3) - ymm41212; FMA4-NEXT: retq1213;1214; AVX512-LABEL: test_v8f64_fneg_fmul:1215; AVX512: # %bb.0:1216; AVX512-NEXT: vxorpd %xmm2, %xmm2, %xmm21217; AVX512-NEXT: vfnmsub213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm21218; AVX512-NEXT: retq1219 %m = fmul contract nsz <8 x double> %x, %y1220 %n = fsub contract <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %m1221 ret <8 x double> %n1222}1223 1224define <8 x double> @test_v8f64_fneg_fmul_no_nsz(<8 x double> %x, <8 x double> %y) {1225; FMA-LABEL: test_v8f64_fneg_fmul_no_nsz:1226; FMA: # %bb.0:1227; FMA-NEXT: vmulpd %ymm3, %ymm1, %ymm11228; FMA-NEXT: vmulpd %ymm2, %ymm0, %ymm01229; FMA-NEXT: vbroadcastsd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]1230; FMA-NEXT: vxorpd %ymm2, %ymm0, %ymm01231; FMA-NEXT: vxorpd %ymm2, %ymm1, %ymm11232; FMA-NEXT: retq1233;1234; FMA4-LABEL: test_v8f64_fneg_fmul_no_nsz:1235; FMA4: # %bb.0:1236; FMA4-NEXT: vmulpd %ymm3, %ymm1, %ymm11237; FMA4-NEXT: vmulpd %ymm2, %ymm0, %ymm01238; FMA4-NEXT: vbroadcastsd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]1239; FMA4-NEXT: vxorpd %ymm2, %ymm0, %ymm01240; FMA4-NEXT: vxorpd %ymm2, %ymm1, %ymm11241; FMA4-NEXT: retq1242;1243; AVX512-LABEL: test_v8f64_fneg_fmul_no_nsz:1244; AVX512: # %bb.0:1245; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm01246; AVX512-NEXT: vxorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm01247; AVX512-NEXT: retq1248 %m = fmul contract <8 x double> %x, %y1249 %n = fsub contract <8 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %m1250 ret <8 x double> %n1251}1252 1253;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1254; AVX512-INFS: {{.*}}1255; FMA-INFS: {{.*}}1256; FMA4-INFS: {{.*}}1257