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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefixes=NOFMA3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s -check-prefixes=FMA3,FMA3_2564; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck %s -check-prefixes=FMA3,FMA3_5125; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4 | FileCheck %s -check-prefixes=FMA46 7; This test checks the fusing of MUL + ADDSUB to FMADDSUB.8 9define <2 x double> @mul_addsub_pd128(<2 x double> %A, <2 x double> %B, <2 x double> %C) {10; NOFMA-LABEL: mul_addsub_pd128:11; NOFMA: # %bb.0: # %entry12; NOFMA-NEXT: vmulpd %xmm1, %xmm0, %xmm013; NOFMA-NEXT: vaddsubpd %xmm2, %xmm0, %xmm014; NOFMA-NEXT: retq15;16; FMA3-LABEL: mul_addsub_pd128:17; FMA3: # %bb.0: # %entry18; FMA3-NEXT: vfmaddsub213pd {{.*#+}} xmm0 = (xmm1 * xmm0) +/- xmm219; FMA3-NEXT: retq20;21; FMA4-LABEL: mul_addsub_pd128:22; FMA4: # %bb.0: # %entry23; FMA4-NEXT: vfmaddsubpd {{.*#+}} xmm0 = (xmm0 * xmm1) +/- xmm224; FMA4-NEXT: retq25entry:26 %AB = fmul contract <2 x double> %A, %B27 %Sub = fsub contract <2 x double> %AB, %C28 %Add = fadd contract <2 x double> %AB, %C29 %Addsub = shufflevector <2 x double> %Sub, <2 x double> %Add, <2 x i32> <i32 0, i32 3>30 ret <2 x double> %Addsub31}32 33define <4 x float> @mul_addsub_ps128(<4 x float> %A, <4 x float> %B, <4 x float> %C) {34; NOFMA-LABEL: mul_addsub_ps128:35; NOFMA: # %bb.0: # %entry36; NOFMA-NEXT: vmulps %xmm1, %xmm0, %xmm037; NOFMA-NEXT: vaddsubps %xmm2, %xmm0, %xmm038; NOFMA-NEXT: retq39;40; FMA3-LABEL: mul_addsub_ps128:41; FMA3: # %bb.0: # %entry42; FMA3-NEXT: vfmaddsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) +/- xmm243; FMA3-NEXT: retq44;45; FMA4-LABEL: mul_addsub_ps128:46; FMA4: # %bb.0: # %entry47; FMA4-NEXT: vfmaddsubps {{.*#+}} xmm0 = (xmm0 * xmm1) +/- xmm248; FMA4-NEXT: retq49entry:50 %AB = fmul contract <4 x float> %A, %B51 %Sub = fsub contract <4 x float> %AB, %C52 %Add = fadd contract <4 x float> %AB, %C53 %Addsub = shufflevector <4 x float> %Sub, <4 x float> %Add, <4 x i32> <i32 0, i32 5, i32 2, i32 7>54 ret <4 x float> %Addsub55}56 57define <4 x double> @mul_addsub_pd256(<4 x double> %A, <4 x double> %B, <4 x double> %C) {58; NOFMA-LABEL: mul_addsub_pd256:59; NOFMA: # %bb.0: # %entry60; NOFMA-NEXT: vmulpd %ymm1, %ymm0, %ymm061; NOFMA-NEXT: vaddsubpd %ymm2, %ymm0, %ymm062; NOFMA-NEXT: retq63;64; FMA3-LABEL: mul_addsub_pd256:65; FMA3: # %bb.0: # %entry66; FMA3-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) +/- ymm267; FMA3-NEXT: retq68;69; FMA4-LABEL: mul_addsub_pd256:70; FMA4: # %bb.0: # %entry71; FMA4-NEXT: vfmaddsubpd {{.*#+}} ymm0 = (ymm0 * ymm1) +/- ymm272; FMA4-NEXT: retq73entry:74 %AB = fmul contract <4 x double> %A, %B75 %Sub = fsub contract <4 x double> %AB, %C76 %Add = fadd contract <4 x double> %AB, %C77 %Addsub = shufflevector <4 x double> %Sub, <4 x double> %Add, <4 x i32> <i32 0, i32 5, i32 2, i32 7>78 ret <4 x double> %Addsub79}80 81define <8 x float> @mul_addsub_ps256(<8 x float> %A, <8 x float> %B, <8 x float> %C) {82; NOFMA-LABEL: mul_addsub_ps256:83; NOFMA: # %bb.0: # %entry84; NOFMA-NEXT: vmulps %ymm1, %ymm0, %ymm085; NOFMA-NEXT: vaddsubps %ymm2, %ymm0, %ymm086; NOFMA-NEXT: retq87;88; FMA3-LABEL: mul_addsub_ps256:89; FMA3: # %bb.0: # %entry90; FMA3-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) +/- ymm291; FMA3-NEXT: retq92;93; FMA4-LABEL: mul_addsub_ps256:94; FMA4: # %bb.0: # %entry95; FMA4-NEXT: vfmaddsubps {{.*#+}} ymm0 = (ymm0 * ymm1) +/- ymm296; FMA4-NEXT: retq97entry:98 %AB = fmul contract <8 x float> %A, %B99 %Sub = fsub contract <8 x float> %AB, %C100 %Add = fadd contract <8 x float> %AB, %C101 %Addsub = shufflevector <8 x float> %Sub, <8 x float> %Add, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>102 ret <8 x float> %Addsub103}104 105define <8 x double> @mul_addsub_pd512(<8 x double> %A, <8 x double> %B, <8 x double> %C) {106; NOFMA-LABEL: mul_addsub_pd512:107; NOFMA: # %bb.0: # %entry108; NOFMA-NEXT: vmulpd %ymm3, %ymm1, %ymm1109; NOFMA-NEXT: vmulpd %ymm2, %ymm0, %ymm0110; NOFMA-NEXT: vaddsubpd %ymm4, %ymm0, %ymm0111; NOFMA-NEXT: vaddsubpd %ymm5, %ymm1, %ymm1112; NOFMA-NEXT: retq113;114; FMA3_256-LABEL: mul_addsub_pd512:115; FMA3_256: # %bb.0: # %entry116; FMA3_256-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) +/- ymm4117; FMA3_256-NEXT: vfmaddsub213pd {{.*#+}} ymm1 = (ymm3 * ymm1) +/- ymm5118; FMA3_256-NEXT: retq119;120; FMA3_512-LABEL: mul_addsub_pd512:121; FMA3_512: # %bb.0: # %entry122; FMA3_512-NEXT: vfmaddsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm2123; FMA3_512-NEXT: retq124;125; FMA4-LABEL: mul_addsub_pd512:126; FMA4: # %bb.0: # %entry127; FMA4-NEXT: vfmaddsubpd {{.*#+}} ymm0 = (ymm0 * ymm2) +/- ymm4128; FMA4-NEXT: vfmaddsubpd {{.*#+}} ymm1 = (ymm1 * ymm3) +/- ymm5129; FMA4-NEXT: retq130entry:131 %AB = fmul contract <8 x double> %A, %B132 %Sub = fsub contract <8 x double> %AB, %C133 %Add = fadd contract <8 x double> %AB, %C134 %Addsub = shufflevector <8 x double> %Sub, <8 x double> %Add, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>135 ret <8 x double> %Addsub136}137 138define <16 x float> @mul_addsub_ps512(<16 x float> %A, <16 x float> %B, <16 x float> %C) {139; NOFMA-LABEL: mul_addsub_ps512:140; NOFMA: # %bb.0: # %entry141; NOFMA-NEXT: vmulps %ymm3, %ymm1, %ymm1142; NOFMA-NEXT: vmulps %ymm2, %ymm0, %ymm0143; NOFMA-NEXT: vaddsubps %ymm4, %ymm0, %ymm0144; NOFMA-NEXT: vaddsubps %ymm5, %ymm1, %ymm1145; NOFMA-NEXT: retq146;147; FMA3_256-LABEL: mul_addsub_ps512:148; FMA3_256: # %bb.0: # %entry149; FMA3_256-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) +/- ymm4150; FMA3_256-NEXT: vfmaddsub213ps {{.*#+}} ymm1 = (ymm3 * ymm1) +/- ymm5151; FMA3_256-NEXT: retq152;153; FMA3_512-LABEL: mul_addsub_ps512:154; FMA3_512: # %bb.0: # %entry155; FMA3_512-NEXT: vfmaddsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm2156; FMA3_512-NEXT: retq157;158; FMA4-LABEL: mul_addsub_ps512:159; FMA4: # %bb.0: # %entry160; FMA4-NEXT: vfmaddsubps {{.*#+}} ymm0 = (ymm0 * ymm2) +/- ymm4161; FMA4-NEXT: vfmaddsubps {{.*#+}} ymm1 = (ymm1 * ymm3) +/- ymm5162; FMA4-NEXT: retq163entry:164 %AB = fmul contract <16 x float> %A, %B165 %Sub = fsub contract <16 x float> %AB, %C166 %Add = fadd contract <16 x float> %AB, %C167 %Addsub = shufflevector <16 x float> %Sub, <16 x float> %Add, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>168 ret <16 x float> %Addsub169}170 171define <4 x float> @buildvector_mul_addsub_ps128(<4 x float> %C, <4 x float> %D, <4 x float> %B) {172; NOFMA-LABEL: buildvector_mul_addsub_ps128:173; NOFMA: # %bb.0: # %bb174; NOFMA-NEXT: vmulps %xmm1, %xmm0, %xmm0175; NOFMA-NEXT: vaddsubps %xmm2, %xmm0, %xmm0176; NOFMA-NEXT: retq177;178; FMA3-LABEL: buildvector_mul_addsub_ps128:179; FMA3: # %bb.0: # %bb180; FMA3-NEXT: vfmaddsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) +/- xmm2181; FMA3-NEXT: retq182;183; FMA4-LABEL: buildvector_mul_addsub_ps128:184; FMA4: # %bb.0: # %bb185; FMA4-NEXT: vfmaddsubps {{.*#+}} xmm0 = (xmm0 * xmm1) +/- xmm2186; FMA4-NEXT: retq187bb:188 %A = fmul contract <4 x float> %C, %D189 %A0 = extractelement <4 x float> %A, i32 0190 %B0 = extractelement <4 x float> %B, i32 0191 %sub0 = fsub contract float %A0, %B0192 %A2 = extractelement <4 x float> %A, i32 2193 %B2 = extractelement <4 x float> %B, i32 2194 %sub2 = fsub contract float %A2, %B2195 %A1 = extractelement <4 x float> %A, i32 1196 %B1 = extractelement <4 x float> %B, i32 1197 %add1 = fadd contract float %A1, %B1198 %A3 = extractelement <4 x float> %A, i32 3199 %B3 = extractelement <4 x float> %B, i32 3200 %add3 = fadd contract float %A3, %B3201 %vecinsert1 = insertelement <4 x float> undef, float %sub0, i32 0202 %vecinsert2 = insertelement <4 x float> %vecinsert1, float %add1, i32 1203 %vecinsert3 = insertelement <4 x float> %vecinsert2, float %sub2, i32 2204 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %add3, i32 3205 ret <4 x float> %vecinsert4206}207 208define <2 x double> @buildvector_mul_addsub_pd128(<2 x double> %C, <2 x double> %D, <2 x double> %B) {209; NOFMA-LABEL: buildvector_mul_addsub_pd128:210; NOFMA: # %bb.0: # %bb211; NOFMA-NEXT: vmulpd %xmm1, %xmm0, %xmm0212; NOFMA-NEXT: vaddsubpd %xmm2, %xmm0, %xmm0213; NOFMA-NEXT: retq214;215; FMA3-LABEL: buildvector_mul_addsub_pd128:216; FMA3: # %bb.0: # %bb217; FMA3-NEXT: vfmaddsub213pd {{.*#+}} xmm0 = (xmm1 * xmm0) +/- xmm2218; FMA3-NEXT: retq219;220; FMA4-LABEL: buildvector_mul_addsub_pd128:221; FMA4: # %bb.0: # %bb222; FMA4-NEXT: vfmaddsubpd {{.*#+}} xmm0 = (xmm0 * xmm1) +/- xmm2223; FMA4-NEXT: retq224bb:225 %A = fmul contract <2 x double> %C, %D226 %A0 = extractelement <2 x double> %A, i32 0227 %B0 = extractelement <2 x double> %B, i32 0228 %sub0 = fsub contract double %A0, %B0229 %A1 = extractelement <2 x double> %A, i32 1230 %B1 = extractelement <2 x double> %B, i32 1231 %add1 = fadd contract double %A1, %B1232 %vecinsert1 = insertelement <2 x double> undef, double %sub0, i32 0233 %vecinsert2 = insertelement <2 x double> %vecinsert1, double %add1, i32 1234 ret <2 x double> %vecinsert2235}236 237define <8 x float> @buildvector_mul_addsub_ps256(<8 x float> %C, <8 x float> %D, <8 x float> %B) {238; NOFMA-LABEL: buildvector_mul_addsub_ps256:239; NOFMA: # %bb.0: # %bb240; NOFMA-NEXT: vmulps %ymm1, %ymm0, %ymm0241; NOFMA-NEXT: vaddsubps %ymm2, %ymm0, %ymm0242; NOFMA-NEXT: retq243;244; FMA3-LABEL: buildvector_mul_addsub_ps256:245; FMA3: # %bb.0: # %bb246; FMA3-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) +/- ymm2247; FMA3-NEXT: retq248;249; FMA4-LABEL: buildvector_mul_addsub_ps256:250; FMA4: # %bb.0: # %bb251; FMA4-NEXT: vfmaddsubps {{.*#+}} ymm0 = (ymm0 * ymm1) +/- ymm2252; FMA4-NEXT: retq253bb:254 %A = fmul contract <8 x float> %C, %D255 %A0 = extractelement <8 x float> %A, i32 0256 %B0 = extractelement <8 x float> %B, i32 0257 %sub0 = fsub contract float %A0, %B0258 %A2 = extractelement <8 x float> %A, i32 2259 %B2 = extractelement <8 x float> %B, i32 2260 %sub2 = fsub contract float %A2, %B2261 %A4 = extractelement <8 x float> %A, i32 4262 %B4 = extractelement <8 x float> %B, i32 4263 %sub4 = fsub contract float %A4, %B4264 %A6 = extractelement <8 x float> %A, i32 6265 %B6 = extractelement <8 x float> %B, i32 6266 %sub6 = fsub contract float %A6, %B6267 %A1 = extractelement <8 x float> %A, i32 1268 %B1 = extractelement <8 x float> %B, i32 1269 %add1 = fadd contract float %A1, %B1270 %A3 = extractelement <8 x float> %A, i32 3271 %B3 = extractelement <8 x float> %B, i32 3272 %add3 = fadd contract float %A3, %B3273 %A5 = extractelement <8 x float> %A, i32 5274 %B5 = extractelement <8 x float> %B, i32 5275 %add5 = fadd contract float %A5, %B5276 %A7 = extractelement <8 x float> %A, i32 7277 %B7 = extractelement <8 x float> %B, i32 7278 %add7 = fadd contract float %A7, %B7279 %vecinsert1 = insertelement <8 x float> undef, float %sub0, i32 0280 %vecinsert2 = insertelement <8 x float> %vecinsert1, float %add1, i32 1281 %vecinsert3 = insertelement <8 x float> %vecinsert2, float %sub2, i32 2282 %vecinsert4 = insertelement <8 x float> %vecinsert3, float %add3, i32 3283 %vecinsert5 = insertelement <8 x float> %vecinsert4, float %sub4, i32 4284 %vecinsert6 = insertelement <8 x float> %vecinsert5, float %add5, i32 5285 %vecinsert7 = insertelement <8 x float> %vecinsert6, float %sub6, i32 6286 %vecinsert8 = insertelement <8 x float> %vecinsert7, float %add7, i32 7287 ret <8 x float> %vecinsert8288}289 290define <4 x double> @buildvector_mul_addsub_pd256(<4 x double> %C, <4 x double> %D, <4 x double> %B) {291; NOFMA-LABEL: buildvector_mul_addsub_pd256:292; NOFMA: # %bb.0: # %bb293; NOFMA-NEXT: vmulpd %ymm1, %ymm0, %ymm0294; NOFMA-NEXT: vaddsubpd %ymm2, %ymm0, %ymm0295; NOFMA-NEXT: retq296;297; FMA3-LABEL: buildvector_mul_addsub_pd256:298; FMA3: # %bb.0: # %bb299; FMA3-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) +/- ymm2300; FMA3-NEXT: retq301;302; FMA4-LABEL: buildvector_mul_addsub_pd256:303; FMA4: # %bb.0: # %bb304; FMA4-NEXT: vfmaddsubpd {{.*#+}} ymm0 = (ymm0 * ymm1) +/- ymm2305; FMA4-NEXT: retq306bb:307 %A = fmul contract <4 x double> %C, %D308 %A0 = extractelement <4 x double> %A, i32 0309 %B0 = extractelement <4 x double> %B, i32 0310 %sub0 = fsub contract double %A0, %B0311 %A2 = extractelement <4 x double> %A, i32 2312 %B2 = extractelement <4 x double> %B, i32 2313 %sub2 = fsub contract double %A2, %B2314 %A1 = extractelement <4 x double> %A, i32 1315 %B1 = extractelement <4 x double> %B, i32 1316 %add1 = fadd contract double %A1, %B1317 %A3 = extractelement <4 x double> %A, i32 3318 %B3 = extractelement <4 x double> %B, i32 3319 %add3 = fadd contract double %A3, %B3320 %vecinsert1 = insertelement <4 x double> undef, double %sub0, i32 0321 %vecinsert2 = insertelement <4 x double> %vecinsert1, double %add1, i32 1322 %vecinsert3 = insertelement <4 x double> %vecinsert2, double %sub2, i32 2323 %vecinsert4 = insertelement <4 x double> %vecinsert3, double %add3, i32 3324 ret <4 x double> %vecinsert4325}326 327define <16 x float> @buildvector_mul_addsub_ps512(<16 x float> %C, <16 x float> %D, <16 x float> %B) {328; NOFMA-LABEL: buildvector_mul_addsub_ps512:329; NOFMA: # %bb.0: # %bb330; NOFMA-NEXT: vmulps %ymm3, %ymm1, %ymm1331; NOFMA-NEXT: vmulps %ymm2, %ymm0, %ymm0332; NOFMA-NEXT: vaddsubps %ymm4, %ymm0, %ymm0333; NOFMA-NEXT: vaddsubps %ymm5, %ymm1, %ymm1334; NOFMA-NEXT: retq335;336; FMA3_256-LABEL: buildvector_mul_addsub_ps512:337; FMA3_256: # %bb.0: # %bb338; FMA3_256-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm2 * ymm0) +/- ymm4339; FMA3_256-NEXT: vfmaddsub213ps {{.*#+}} ymm1 = (ymm3 * ymm1) +/- ymm5340; FMA3_256-NEXT: retq341;342; FMA3_512-LABEL: buildvector_mul_addsub_ps512:343; FMA3_512: # %bb.0: # %bb344; FMA3_512-NEXT: vfmaddsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm2345; FMA3_512-NEXT: retq346;347; FMA4-LABEL: buildvector_mul_addsub_ps512:348; FMA4: # %bb.0: # %bb349; FMA4-NEXT: vfmaddsubps {{.*#+}} ymm0 = (ymm0 * ymm2) +/- ymm4350; FMA4-NEXT: vfmaddsubps {{.*#+}} ymm1 = (ymm1 * ymm3) +/- ymm5351; FMA4-NEXT: retq352bb:353 %A = fmul contract <16 x float> %C, %D354 %A0 = extractelement <16 x float> %A, i32 0355 %B0 = extractelement <16 x float> %B, i32 0356 %sub0 = fsub contract float %A0, %B0357 %A2 = extractelement <16 x float> %A, i32 2358 %B2 = extractelement <16 x float> %B, i32 2359 %sub2 = fsub contract float %A2, %B2360 %A4 = extractelement <16 x float> %A, i32 4361 %B4 = extractelement <16 x float> %B, i32 4362 %sub4 = fsub contract float %A4, %B4363 %A6 = extractelement <16 x float> %A, i32 6364 %B6 = extractelement <16 x float> %B, i32 6365 %sub6 = fsub contract float %A6, %B6366 %A8 = extractelement <16 x float> %A, i32 8367 %B8 = extractelement <16 x float> %B, i32 8368 %sub8 = fsub contract float %A8, %B8369 %A10 = extractelement <16 x float> %A, i32 10370 %B10 = extractelement <16 x float> %B, i32 10371 %sub10 = fsub contract float %A10, %B10372 %A12 = extractelement <16 x float> %A, i32 12373 %B12 = extractelement <16 x float> %B, i32 12374 %sub12 = fsub contract float %A12, %B12375 %A14 = extractelement <16 x float> %A, i32 14376 %B14 = extractelement <16 x float> %B, i32 14377 %sub14 = fsub contract float %A14, %B14378 %A1 = extractelement <16 x float> %A, i32 1379 %B1 = extractelement <16 x float> %B, i32 1380 %add1 = fadd contract float %A1, %B1381 %A3 = extractelement <16 x float> %A, i32 3382 %B3 = extractelement <16 x float> %B, i32 3383 %add3 = fadd contract float %A3, %B3384 %A5 = extractelement <16 x float> %A, i32 5385 %B5 = extractelement <16 x float> %B, i32 5386 %add5 = fadd contract float %A5, %B5387 %A7 = extractelement <16 x float> %A, i32 7388 %B7 = extractelement <16 x float> %B, i32 7389 %add7 = fadd contract float %A7, %B7390 %A9 = extractelement <16 x float> %A, i32 9391 %B9 = extractelement <16 x float> %B, i32 9392 %add9 = fadd contract float %A9, %B9393 %A11 = extractelement <16 x float> %A, i32 11394 %B11 = extractelement <16 x float> %B, i32 11395 %add11 = fadd contract float %A11, %B11396 %A13 = extractelement <16 x float> %A, i32 13397 %B13 = extractelement <16 x float> %B, i32 13398 %add13 = fadd contract float %A13, %B13399 %A15 = extractelement <16 x float> %A, i32 15400 %B15 = extractelement <16 x float> %B, i32 15401 %add15 = fadd contract float %A15, %B15402 %vecinsert1 = insertelement <16 x float> undef, float %sub0, i32 0403 %vecinsert2 = insertelement <16 x float> %vecinsert1, float %add1, i32 1404 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2405 %vecinsert4 = insertelement <16 x float> %vecinsert3, float %add3, i32 3406 %vecinsert5 = insertelement <16 x float> %vecinsert4, float %sub4, i32 4407 ; element 5 is undef408 %vecinsert7 = insertelement <16 x float> %vecinsert5, float %sub6, i32 6409 %vecinsert8 = insertelement <16 x float> %vecinsert7, float %add7, i32 7410 %vecinsert9 = insertelement <16 x float> %vecinsert8, float %sub8, i32 8411 %vecinsert10 = insertelement <16 x float> %vecinsert9, float %add9, i32 9412 %vecinsert11 = insertelement <16 x float> %vecinsert10, float %sub10, i32 10413 %vecinsert12 = insertelement <16 x float> %vecinsert11, float %add11, i32 11414 ; element 12 is undef415 %vecinsert14 = insertelement <16 x float> %vecinsert12, float %add13, i32 13416 %vecinsert15 = insertelement <16 x float> %vecinsert14, float %sub14, i32 14417 %vecinsert16 = insertelement <16 x float> %vecinsert15, float %add15, i32 15418 ret <16 x float> %vecinsert16419}420 421define <8 x double> @buildvector_mul_addsub_pd512(<8 x double> %C, <8 x double> %D, <8 x double> %B) {422; NOFMA-LABEL: buildvector_mul_addsub_pd512:423; NOFMA: # %bb.0: # %bb424; NOFMA-NEXT: vmulpd %ymm3, %ymm1, %ymm1425; NOFMA-NEXT: vmulpd %ymm2, %ymm0, %ymm0426; NOFMA-NEXT: vaddsubpd %ymm4, %ymm0, %ymm0427; NOFMA-NEXT: vaddsubpd %ymm5, %ymm1, %ymm1428; NOFMA-NEXT: retq429;430; FMA3_256-LABEL: buildvector_mul_addsub_pd512:431; FMA3_256: # %bb.0: # %bb432; FMA3_256-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm2 * ymm0) +/- ymm4433; FMA3_256-NEXT: vfmaddsub213pd {{.*#+}} ymm1 = (ymm3 * ymm1) +/- ymm5434; FMA3_256-NEXT: retq435;436; FMA3_512-LABEL: buildvector_mul_addsub_pd512:437; FMA3_512: # %bb.0: # %bb438; FMA3_512-NEXT: vfmaddsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm2439; FMA3_512-NEXT: retq440;441; FMA4-LABEL: buildvector_mul_addsub_pd512:442; FMA4: # %bb.0: # %bb443; FMA4-NEXT: vfmaddsubpd {{.*#+}} ymm0 = (ymm0 * ymm2) +/- ymm4444; FMA4-NEXT: vfmaddsubpd {{.*#+}} ymm1 = (ymm1 * ymm3) +/- ymm5445; FMA4-NEXT: retq446bb:447 %A = fmul contract <8 x double> %C, %D448 %A0 = extractelement <8 x double> %A, i32 0449 %B0 = extractelement <8 x double> %B, i32 0450 %sub0 = fsub contract double %A0, %B0451 %A2 = extractelement <8 x double> %A, i32 2452 %B2 = extractelement <8 x double> %B, i32 2453 %sub2 = fsub contract double %A2, %B2454 %A4 = extractelement <8 x double> %A, i32 4455 %B4 = extractelement <8 x double> %B, i32 4456 %sub4 = fsub contract double %A4, %B4457 %A6 = extractelement <8 x double> %A, i32 6458 %B6 = extractelement <8 x double> %B, i32 6459 %sub6 = fsub contract double %A6, %B6460 %A1 = extractelement <8 x double> %A, i32 1461 %B1 = extractelement <8 x double> %B, i32 1462 %add1 = fadd contract double %A1, %B1463 %A3 = extractelement <8 x double> %A, i32 3464 %B3 = extractelement <8 x double> %B, i32 3465 %add3 = fadd contract double %A3, %B3466 %A7 = extractelement <8 x double> %A, i32 7467 %B7 = extractelement <8 x double> %B, i32 7468 %add7 = fadd contract double %A7, %B7469 %vecinsert1 = insertelement <8 x double> undef, double %sub0, i32 0470 %vecinsert2 = insertelement <8 x double> %vecinsert1, double %add1, i32 1471 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 2472 %vecinsert4 = insertelement <8 x double> %vecinsert3, double %add3, i32 3473 %vecinsert5 = insertelement <8 x double> %vecinsert4, double %sub4, i32 4474 ; element 5 is undef475 %vecinsert7 = insertelement <8 x double> %vecinsert5, double %sub6, i32 6476 %vecinsert8 = insertelement <8 x double> %vecinsert7, double %add7, i32 7477 ret <8 x double> %vecinsert8478}479 480define <4 x float> @buildvector_mul_subadd_ps128(<4 x float> %C, <4 x float> %D, <4 x float> %B) {481; NOFMA-LABEL: buildvector_mul_subadd_ps128:482; NOFMA: # %bb.0: # %bb483; NOFMA-NEXT: vmulps %xmm1, %xmm0, %xmm0484; NOFMA-NEXT: vaddss %xmm2, %xmm0, %xmm1485; NOFMA-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]486; NOFMA-NEXT: vshufpd {{.*#+}} xmm4 = xmm2[1,0]487; NOFMA-NEXT: vaddss %xmm4, %xmm3, %xmm3488; NOFMA-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]489; NOFMA-NEXT: vmovshdup {{.*#+}} xmm5 = xmm2[1,1,3,3]490; NOFMA-NEXT: vsubss %xmm5, %xmm4, %xmm4491; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[2,3]492; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3]493; NOFMA-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]494; NOFMA-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]495; NOFMA-NEXT: vsubss %xmm2, %xmm0, %xmm0496; NOFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]497; NOFMA-NEXT: retq498;499; FMA3-LABEL: buildvector_mul_subadd_ps128:500; FMA3: # %bb.0: # %bb501; FMA3-NEXT: vfmsubadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) -/+ xmm2502; FMA3-NEXT: retq503;504; FMA4-LABEL: buildvector_mul_subadd_ps128:505; FMA4: # %bb.0: # %bb506; FMA4-NEXT: vfmsubaddps {{.*#+}} xmm0 = (xmm0 * xmm1) -/+ xmm2507; FMA4-NEXT: retq508bb:509 %A = fmul contract <4 x float> %C, %D510 %A0 = extractelement <4 x float> %A, i32 0511 %B0 = extractelement <4 x float> %B, i32 0512 %sub0 = fadd contract float %A0, %B0513 %A2 = extractelement <4 x float> %A, i32 2514 %B2 = extractelement <4 x float> %B, i32 2515 %sub2 = fadd contract float %A2, %B2516 %A1 = extractelement <4 x float> %A, i32 1517 %B1 = extractelement <4 x float> %B, i32 1518 %add1 = fsub contract float %A1, %B1519 %A3 = extractelement <4 x float> %A, i32 3520 %B3 = extractelement <4 x float> %B, i32 3521 %add3 = fsub contract float %A3, %B3522 %vecinsert1 = insertelement <4 x float> undef, float %sub0, i32 0523 %vecinsert2 = insertelement <4 x float> %vecinsert1, float %add1, i32 1524 %vecinsert3 = insertelement <4 x float> %vecinsert2, float %sub2, i32 2525 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %add3, i32 3526 ret <4 x float> %vecinsert4527}528 529define <2 x double> @buildvector_mul_subadd_pd128(<2 x double> %C, <2 x double> %D, <2 x double> %B) {530; NOFMA-LABEL: buildvector_mul_subadd_pd128:531; NOFMA: # %bb.0: # %bb532; NOFMA-NEXT: vmulpd %xmm1, %xmm0, %xmm0533; NOFMA-NEXT: vaddsd %xmm2, %xmm0, %xmm1534; NOFMA-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]535; NOFMA-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]536; NOFMA-NEXT: vsubsd %xmm2, %xmm0, %xmm0537; NOFMA-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]538; NOFMA-NEXT: retq539;540; FMA3-LABEL: buildvector_mul_subadd_pd128:541; FMA3: # %bb.0: # %bb542; FMA3-NEXT: vfmsubadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) -/+ xmm2543; FMA3-NEXT: retq544;545; FMA4-LABEL: buildvector_mul_subadd_pd128:546; FMA4: # %bb.0: # %bb547; FMA4-NEXT: vfmsubaddpd {{.*#+}} xmm0 = (xmm0 * xmm1) -/+ xmm2548; FMA4-NEXT: retq549bb:550 %A = fmul contract <2 x double> %C, %D551 %A0 = extractelement <2 x double> %A, i32 0552 %B0 = extractelement <2 x double> %B, i32 0553 %sub0 = fadd contract double %A0, %B0554 %A1 = extractelement <2 x double> %A, i32 1555 %B1 = extractelement <2 x double> %B, i32 1556 %add1 = fsub contract double %A1, %B1557 %vecinsert1 = insertelement <2 x double> undef, double %sub0, i32 0558 %vecinsert2 = insertelement <2 x double> %vecinsert1, double %add1, i32 1559 ret <2 x double> %vecinsert2560}561 562define <8 x float> @buildvector_mul_subadd_ps256(<8 x float> %C, <8 x float> %D, <8 x float> %B) {563; NOFMA-LABEL: buildvector_mul_subadd_ps256:564; NOFMA: # %bb.0: # %bb565; NOFMA-NEXT: vmulps %ymm1, %ymm0, %ymm0566; NOFMA-NEXT: vaddss %xmm2, %xmm0, %xmm1567; NOFMA-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]568; NOFMA-NEXT: vshufpd {{.*#+}} xmm4 = xmm2[1,0]569; NOFMA-NEXT: vaddss %xmm4, %xmm3, %xmm3570; NOFMA-NEXT: vextractf128 $1, %ymm0, %xmm4571; NOFMA-NEXT: vextractf128 $1, %ymm2, %xmm5572; NOFMA-NEXT: vaddss %xmm5, %xmm4, %xmm6573; NOFMA-NEXT: vshufpd {{.*#+}} xmm7 = xmm4[1,0]574; NOFMA-NEXT: vshufpd {{.*#+}} xmm8 = xmm5[1,0]575; NOFMA-NEXT: vaddss %xmm7, %xmm8, %xmm7576; NOFMA-NEXT: vmovshdup {{.*#+}} xmm8 = xmm0[1,1,3,3]577; NOFMA-NEXT: vmovshdup {{.*#+}} xmm9 = xmm2[1,1,3,3]578; NOFMA-NEXT: vsubss %xmm9, %xmm8, %xmm8579; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm8[0],xmm1[2,3]580; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3]581; NOFMA-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]582; NOFMA-NEXT: vshufps {{.*#+}} xmm2 = xmm2[3,3,3,3]583; NOFMA-NEXT: vsubss %xmm2, %xmm0, %xmm0584; NOFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]585; NOFMA-NEXT: vmovshdup {{.*#+}} xmm1 = xmm4[1,1,3,3]586; NOFMA-NEXT: vmovshdup {{.*#+}} xmm2 = xmm5[1,1,3,3]587; NOFMA-NEXT: vsubss %xmm2, %xmm1, %xmm1588; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm6[0],xmm1[0],xmm6[2,3]589; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm7[0],xmm1[3]590; NOFMA-NEXT: vshufps {{.*#+}} xmm2 = xmm4[3,3,3,3]591; NOFMA-NEXT: vshufps {{.*#+}} xmm3 = xmm5[3,3,3,3]592; NOFMA-NEXT: vsubss %xmm3, %xmm2, %xmm2593; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0]594; NOFMA-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0595; NOFMA-NEXT: retq596;597; FMA3-LABEL: buildvector_mul_subadd_ps256:598; FMA3: # %bb.0: # %bb599; FMA3-NEXT: vfmsubadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ ymm2600; FMA3-NEXT: retq601;602; FMA4-LABEL: buildvector_mul_subadd_ps256:603; FMA4: # %bb.0: # %bb604; FMA4-NEXT: vfmsubaddps {{.*#+}} ymm0 = (ymm0 * ymm1) -/+ ymm2605; FMA4-NEXT: retq606bb:607 %A = fmul contract <8 x float> %C, %D608 %A0 = extractelement <8 x float> %A, i32 0609 %B0 = extractelement <8 x float> %B, i32 0610 %sub0 = fadd contract float %A0, %B0611 %A2 = extractelement <8 x float> %A, i32 2612 %B2 = extractelement <8 x float> %B, i32 2613 %sub2 = fadd contract float %A2, %B2614 %A4 = extractelement <8 x float> %A, i32 4615 %B4 = extractelement <8 x float> %B, i32 4616 %sub4 = fadd contract float %A4, %B4617 %A6 = extractelement <8 x float> %A, i32 6618 %B6 = extractelement <8 x float> %B, i32 6619 %sub6 = fadd contract float %A6, %B6620 %A1 = extractelement <8 x float> %A, i32 1621 %B1 = extractelement <8 x float> %B, i32 1622 %add1 = fsub contract float %A1, %B1623 %A3 = extractelement <8 x float> %A, i32 3624 %B3 = extractelement <8 x float> %B, i32 3625 %add3 = fsub contract float %A3, %B3626 %A5 = extractelement <8 x float> %A, i32 5627 %B5 = extractelement <8 x float> %B, i32 5628 %add5 = fsub contract float %A5, %B5629 %A7 = extractelement <8 x float> %A, i32 7630 %B7 = extractelement <8 x float> %B, i32 7631 %add7 = fsub contract float %A7, %B7632 %vecinsert1 = insertelement <8 x float> undef, float %sub0, i32 0633 %vecinsert2 = insertelement <8 x float> %vecinsert1, float %add1, i32 1634 %vecinsert3 = insertelement <8 x float> %vecinsert2, float %sub2, i32 2635 %vecinsert4 = insertelement <8 x float> %vecinsert3, float %add3, i32 3636 %vecinsert5 = insertelement <8 x float> %vecinsert4, float %sub4, i32 4637 %vecinsert6 = insertelement <8 x float> %vecinsert5, float %add5, i32 5638 %vecinsert7 = insertelement <8 x float> %vecinsert6, float %sub6, i32 6639 %vecinsert8 = insertelement <8 x float> %vecinsert7, float %add7, i32 7640 ret <8 x float> %vecinsert8641}642 643define <4 x double> @buildvector_mul_subadd_pd256(<4 x double> %C, <4 x double> %D, <4 x double> %B) {644; NOFMA-LABEL: buildvector_mul_subadd_pd256:645; NOFMA: # %bb.0: # %bb646; NOFMA-NEXT: vmulpd %ymm1, %ymm0, %ymm0647; NOFMA-NEXT: vaddsd %xmm2, %xmm0, %xmm1648; NOFMA-NEXT: vextractf128 $1, %ymm0, %xmm3649; NOFMA-NEXT: vextractf128 $1, %ymm2, %xmm4650; NOFMA-NEXT: vaddsd %xmm4, %xmm3, %xmm5651; NOFMA-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]652; NOFMA-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]653; NOFMA-NEXT: vsubsd %xmm2, %xmm0, %xmm0654; NOFMA-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]655; NOFMA-NEXT: vshufpd {{.*#+}} xmm1 = xmm3[1,0]656; NOFMA-NEXT: vshufpd {{.*#+}} xmm2 = xmm4[1,0]657; NOFMA-NEXT: vsubsd %xmm2, %xmm1, %xmm1658; NOFMA-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm5[0],xmm1[0]659; NOFMA-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0660; NOFMA-NEXT: retq661;662; FMA3-LABEL: buildvector_mul_subadd_pd256:663; FMA3: # %bb.0: # %bb664; FMA3-NEXT: vfmsubadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ ymm2665; FMA3-NEXT: retq666;667; FMA4-LABEL: buildvector_mul_subadd_pd256:668; FMA4: # %bb.0: # %bb669; FMA4-NEXT: vfmsubaddpd {{.*#+}} ymm0 = (ymm0 * ymm1) -/+ ymm2670; FMA4-NEXT: retq671bb:672 %A = fmul contract <4 x double> %C, %D673 %A0 = extractelement <4 x double> %A, i32 0674 %B0 = extractelement <4 x double> %B, i32 0675 %sub0 = fadd contract double %A0, %B0676 %A2 = extractelement <4 x double> %A, i32 2677 %B2 = extractelement <4 x double> %B, i32 2678 %sub2 = fadd contract double %A2, %B2679 %A1 = extractelement <4 x double> %A, i32 1680 %B1 = extractelement <4 x double> %B, i32 1681 %add1 = fsub contract double %A1, %B1682 %A3 = extractelement <4 x double> %A, i32 3683 %B3 = extractelement <4 x double> %B, i32 3684 %add3 = fsub contract double %A3, %B3685 %vecinsert1 = insertelement <4 x double> undef, double %sub0, i32 0686 %vecinsert2 = insertelement <4 x double> %vecinsert1, double %add1, i32 1687 %vecinsert3 = insertelement <4 x double> %vecinsert2, double %sub2, i32 2688 %vecinsert4 = insertelement <4 x double> %vecinsert3, double %add3, i32 3689 ret <4 x double> %vecinsert4690}691 692define <16 x float> @buildvector_mul_subadd_ps512(<16 x float> %C, <16 x float> %D, <16 x float> %B) {693; NOFMA-LABEL: buildvector_mul_subadd_ps512:694; NOFMA: # %bb.0: # %bb695; NOFMA-NEXT: vmulps %ymm3, %ymm1, %ymm1696; NOFMA-NEXT: vmulps %ymm2, %ymm0, %ymm0697; NOFMA-NEXT: vaddss %xmm4, %xmm0, %xmm2698; NOFMA-NEXT: vshufpd {{.*#+}} xmm3 = xmm0[1,0]699; NOFMA-NEXT: vshufpd {{.*#+}} xmm6 = xmm4[1,0]700; NOFMA-NEXT: vaddss %xmm6, %xmm3, %xmm3701; NOFMA-NEXT: vextractf128 $1, %ymm0, %xmm6702; NOFMA-NEXT: vextractf128 $1, %ymm4, %xmm7703; NOFMA-NEXT: vaddss %xmm7, %xmm6, %xmm8704; NOFMA-NEXT: vshufpd {{.*#+}} xmm9 = xmm6[1,0]705; NOFMA-NEXT: vshufpd {{.*#+}} xmm10 = xmm7[1,0]706; NOFMA-NEXT: vaddss %xmm10, %xmm9, %xmm9707; NOFMA-NEXT: vinsertps {{.*#+}} xmm8 = xmm8[0,1],xmm9[0],xmm8[3]708; NOFMA-NEXT: vaddss %xmm5, %xmm1, %xmm9709; NOFMA-NEXT: vshufpd {{.*#+}} xmm10 = xmm1[1,0]710; NOFMA-NEXT: vshufpd {{.*#+}} xmm11 = xmm5[1,0]711; NOFMA-NEXT: vaddss %xmm11, %xmm10, %xmm10712; NOFMA-NEXT: vextractf128 $1, %ymm1, %xmm11713; NOFMA-NEXT: vshufpd {{.*#+}} xmm12 = xmm11[1,0]714; NOFMA-NEXT: vextractf128 $1, %ymm5, %xmm13715; NOFMA-NEXT: vshufpd {{.*#+}} xmm14 = xmm13[1,0]716; NOFMA-NEXT: vaddss %xmm14, %xmm12, %xmm12717; NOFMA-NEXT: vmovshdup {{.*#+}} xmm14 = xmm0[1,1,3,3]718; NOFMA-NEXT: vmovshdup {{.*#+}} xmm15 = xmm4[1,1,3,3]719; NOFMA-NEXT: vsubss %xmm15, %xmm14, %xmm14720; NOFMA-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm14[0],xmm2[2,3]721; NOFMA-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3]722; NOFMA-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]723; NOFMA-NEXT: vshufps {{.*#+}} xmm3 = xmm4[3,3,3,3]724; NOFMA-NEXT: vsubss %xmm3, %xmm0, %xmm0725; NOFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0]726; NOFMA-NEXT: vshufps {{.*#+}} xmm2 = xmm6[3,3,3,3]727; NOFMA-NEXT: vshufps {{.*#+}} xmm3 = xmm7[3,3,3,3]728; NOFMA-NEXT: vsubss %xmm3, %xmm2, %xmm2729; NOFMA-NEXT: vinsertps {{.*#+}} xmm2 = xmm8[0,1,2],xmm2[0]730; NOFMA-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]731; NOFMA-NEXT: vmovshdup {{.*#+}} xmm4 = xmm5[1,1,3,3]732; NOFMA-NEXT: vsubss %xmm4, %xmm3, %xmm3733; NOFMA-NEXT: vinsertps {{.*#+}} xmm3 = xmm9[0],xmm3[0],xmm9[2,3]734; NOFMA-NEXT: vinsertps {{.*#+}} xmm3 = xmm3[0,1],xmm10[0],xmm3[3]735; NOFMA-NEXT: vshufps {{.*#+}} xmm1 = xmm1[3,3,3,3]736; NOFMA-NEXT: vshufps {{.*#+}} xmm4 = xmm5[3,3,3,3]737; NOFMA-NEXT: vsubss %xmm4, %xmm1, %xmm1738; NOFMA-NEXT: vinsertps {{.*#+}} xmm1 = xmm3[0,1,2],xmm1[0]739; NOFMA-NEXT: vmovshdup {{.*#+}} xmm3 = xmm11[1,1,3,3]740; NOFMA-NEXT: vmovshdup {{.*#+}} xmm4 = xmm13[1,1,3,3]741; NOFMA-NEXT: vsubss %xmm4, %xmm3, %xmm3742; NOFMA-NEXT: vshufps {{.*#+}} xmm3 = xmm3[0,0],xmm12[0,0]743; NOFMA-NEXT: vshufps {{.*#+}} xmm4 = xmm11[3,3,3,3]744; NOFMA-NEXT: vshufps {{.*#+}} xmm5 = xmm13[3,3,3,3]745; NOFMA-NEXT: vsubss %xmm5, %xmm4, %xmm4746; NOFMA-NEXT: vinsertps {{.*#+}} xmm3 = xmm3[0,1,2],xmm4[0]747; NOFMA-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0748; NOFMA-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1749; NOFMA-NEXT: retq750;751; FMA3_256-LABEL: buildvector_mul_subadd_ps512:752; FMA3_256: # %bb.0: # %bb753; FMA3_256-NEXT: vfmsubadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) -/+ ymm4754; FMA3_256-NEXT: vfmsubadd213ps {{.*#+}} ymm1 = (ymm3 * ymm1) -/+ ymm5755; FMA3_256-NEXT: retq756;757; FMA3_512-LABEL: buildvector_mul_subadd_ps512:758; FMA3_512: # %bb.0: # %bb759; FMA3_512-NEXT: vfmsubadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) -/+ zmm2760; FMA3_512-NEXT: retq761;762; FMA4-LABEL: buildvector_mul_subadd_ps512:763; FMA4: # %bb.0: # %bb764; FMA4-NEXT: vfmsubaddps {{.*#+}} ymm0 = (ymm0 * ymm2) -/+ ymm4765; FMA4-NEXT: vfmsubaddps {{.*#+}} ymm1 = (ymm1 * ymm3) -/+ ymm5766; FMA4-NEXT: retq767bb:768 %A = fmul contract <16 x float> %C, %D769 %A0 = extractelement <16 x float> %A, i32 0770 %B0 = extractelement <16 x float> %B, i32 0771 %sub0 = fadd contract float %A0, %B0772 %A2 = extractelement <16 x float> %A, i32 2773 %B2 = extractelement <16 x float> %B, i32 2774 %sub2 = fadd contract float %A2, %B2775 %A4 = extractelement <16 x float> %A, i32 4776 %B4 = extractelement <16 x float> %B, i32 4777 %sub4 = fadd contract float %A4, %B4778 %A6 = extractelement <16 x float> %A, i32 6779 %B6 = extractelement <16 x float> %B, i32 6780 %sub6 = fadd contract float %A6, %B6781 %A8 = extractelement <16 x float> %A, i32 8782 %B8 = extractelement <16 x float> %B, i32 8783 %sub8 = fadd contract float %A8, %B8784 %A10 = extractelement <16 x float> %A, i32 10785 %B10 = extractelement <16 x float> %B, i32 10786 %sub10 = fadd contract float %A10, %B10787 %A12 = extractelement <16 x float> %A, i32 12788 %B12 = extractelement <16 x float> %B, i32 12789 %sub12 = fadd contract float %A12, %B12790 %A14 = extractelement <16 x float> %A, i32 14791 %B14 = extractelement <16 x float> %B, i32 14792 %sub14 = fadd contract float %A14, %B14793 %A1 = extractelement <16 x float> %A, i32 1794 %B1 = extractelement <16 x float> %B, i32 1795 %add1 = fsub contract float %A1, %B1796 %A3 = extractelement <16 x float> %A, i32 3797 %B3 = extractelement <16 x float> %B, i32 3798 %add3 = fsub contract float %A3, %B3799 %A5 = extractelement <16 x float> %A, i32 5800 %B5 = extractelement <16 x float> %B, i32 5801 %add5 = fsub contract float %A5, %B5802 %A7 = extractelement <16 x float> %A, i32 7803 %B7 = extractelement <16 x float> %B, i32 7804 %add7 = fsub contract float %A7, %B7805 %A9 = extractelement <16 x float> %A, i32 9806 %B9 = extractelement <16 x float> %B, i32 9807 %add9 = fsub contract float %A9, %B9808 %A11 = extractelement <16 x float> %A, i32 11809 %B11 = extractelement <16 x float> %B, i32 11810 %add11 = fsub contract float %A11, %B11811 %A13 = extractelement <16 x float> %A, i32 13812 %B13 = extractelement <16 x float> %B, i32 13813 %add13 = fsub contract float %A13, %B13814 %A15 = extractelement <16 x float> %A, i32 15815 %B15 = extractelement <16 x float> %B, i32 15816 %add15 = fsub contract float %A15, %B15817 %vecinsert1 = insertelement <16 x float> undef, float %sub0, i32 0818 %vecinsert2 = insertelement <16 x float> %vecinsert1, float %add1, i32 1819 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2820 %vecinsert4 = insertelement <16 x float> %vecinsert3, float %add3, i32 3821 %vecinsert5 = insertelement <16 x float> %vecinsert4, float %sub4, i32 4822 ; element 5 is undef823 %vecinsert7 = insertelement <16 x float> %vecinsert5, float %sub6, i32 6824 %vecinsert8 = insertelement <16 x float> %vecinsert7, float %add7, i32 7825 %vecinsert9 = insertelement <16 x float> %vecinsert8, float %sub8, i32 8826 %vecinsert10 = insertelement <16 x float> %vecinsert9, float %add9, i32 9827 %vecinsert11 = insertelement <16 x float> %vecinsert10, float %sub10, i32 10828 %vecinsert12 = insertelement <16 x float> %vecinsert11, float %add11, i32 11829 ; element 12 is undef830 %vecinsert14 = insertelement <16 x float> %vecinsert12, float %add13, i32 13831 %vecinsert15 = insertelement <16 x float> %vecinsert14, float %sub14, i32 14832 %vecinsert16 = insertelement <16 x float> %vecinsert15, float %add15, i32 15833 ret <16 x float> %vecinsert16834}835 836define <8 x double> @buildvector_mul_subadd_pd512(<8 x double> %C, <8 x double> %D, <8 x double> %B) {837; NOFMA-LABEL: buildvector_mul_subadd_pd512:838; NOFMA: # %bb.0: # %bb839; NOFMA-NEXT: vmulpd %ymm3, %ymm1, %ymm1840; NOFMA-NEXT: vmulpd %ymm2, %ymm0, %ymm0841; NOFMA-NEXT: vaddsd %xmm4, %xmm0, %xmm2842; NOFMA-NEXT: vextractf128 $1, %ymm0, %xmm3843; NOFMA-NEXT: vextractf128 $1, %ymm4, %xmm6844; NOFMA-NEXT: vaddsd %xmm6, %xmm3, %xmm7845; NOFMA-NEXT: vaddsd %xmm5, %xmm1, %xmm8846; NOFMA-NEXT: vextractf128 $1, %ymm1, %xmm1847; NOFMA-NEXT: vextractf128 $1, %ymm5, %xmm5848; NOFMA-NEXT: vaddsd %xmm5, %xmm1, %xmm9849; NOFMA-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]850; NOFMA-NEXT: vshufpd {{.*#+}} xmm4 = xmm4[1,0]851; NOFMA-NEXT: vsubsd %xmm4, %xmm0, %xmm0852; NOFMA-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm0[0]853; NOFMA-NEXT: vshufpd {{.*#+}} xmm2 = xmm3[1,0]854; NOFMA-NEXT: vshufpd {{.*#+}} xmm3 = xmm6[1,0]855; NOFMA-NEXT: vsubsd %xmm3, %xmm2, %xmm2856; NOFMA-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm7[0],xmm2[0]857; NOFMA-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]858; NOFMA-NEXT: vshufpd {{.*#+}} xmm3 = xmm5[1,0]859; NOFMA-NEXT: vsubsd %xmm3, %xmm1, %xmm1860; NOFMA-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm9[0],xmm1[0]861; NOFMA-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0862; NOFMA-NEXT: vinsertf128 $1, %xmm1, %ymm8, %ymm1863; NOFMA-NEXT: retq864;865; FMA3_256-LABEL: buildvector_mul_subadd_pd512:866; FMA3_256: # %bb.0: # %bb867; FMA3_256-NEXT: vfmsubadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) -/+ ymm4868; FMA3_256-NEXT: vfmsubadd213pd {{.*#+}} ymm1 = (ymm3 * ymm1) -/+ ymm5869; FMA3_256-NEXT: retq870;871; FMA3_512-LABEL: buildvector_mul_subadd_pd512:872; FMA3_512: # %bb.0: # %bb873; FMA3_512-NEXT: vfmsubadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) -/+ zmm2874; FMA3_512-NEXT: retq875;876; FMA4-LABEL: buildvector_mul_subadd_pd512:877; FMA4: # %bb.0: # %bb878; FMA4-NEXT: vfmsubaddpd {{.*#+}} ymm0 = (ymm0 * ymm2) -/+ ymm4879; FMA4-NEXT: vfmsubaddpd {{.*#+}} ymm1 = (ymm1 * ymm3) -/+ ymm5880; FMA4-NEXT: retq881bb:882 %A = fmul contract <8 x double> %C, %D883 %A0 = extractelement <8 x double> %A, i32 0884 %B0 = extractelement <8 x double> %B, i32 0885 %sub0 = fadd contract double %A0, %B0886 %A2 = extractelement <8 x double> %A, i32 2887 %B2 = extractelement <8 x double> %B, i32 2888 %sub2 = fadd contract double %A2, %B2889 %A4 = extractelement <8 x double> %A, i32 4890 %B4 = extractelement <8 x double> %B, i32 4891 %sub4 = fadd contract double %A4, %B4892 %A6 = extractelement <8 x double> %A, i32 6893 %B6 = extractelement <8 x double> %B, i32 6894 %sub6 = fadd contract double %A6, %B6895 %A1 = extractelement <8 x double> %A, i32 1896 %B1 = extractelement <8 x double> %B, i32 1897 %add1 = fsub contract double %A1, %B1898 %A3 = extractelement <8 x double> %A, i32 3899 %B3 = extractelement <8 x double> %B, i32 3900 %add3 = fsub contract double %A3, %B3901 %A7 = extractelement <8 x double> %A, i32 7902 %B7 = extractelement <8 x double> %B, i32 7903 %add7 = fsub contract double %A7, %B7904 %vecinsert1 = insertelement <8 x double> undef, double %sub0, i32 0905 %vecinsert2 = insertelement <8 x double> %vecinsert1, double %add1, i32 1906 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 2907 %vecinsert4 = insertelement <8 x double> %vecinsert3, double %add3, i32 3908 %vecinsert5 = insertelement <8 x double> %vecinsert4, double %sub4, i32 4909 ; element 5 is undef910 %vecinsert7 = insertelement <8 x double> %vecinsert5, double %sub6, i32 6911 %vecinsert8 = insertelement <8 x double> %vecinsert7, double %add7, i32 7912 ret <8 x double> %vecinsert8913}914