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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK-SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX24; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512F,CHECK-ONLY-AVX512F5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512F,CHECK-SKX6 7declare i16 @llvm.umax.i16(i16, i16)8declare i64 @llvm.umin.i64(i64, i64)9 10declare <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float>, <4 x i32>)11 12define <4 x float> @fmul_pow2_4xfloat(<4 x i32> %i) {13; CHECK-SSE-LABEL: fmul_pow2_4xfloat:14; CHECK-SSE:       # %bb.0:15; CHECK-SSE-NEXT:    pslld $23, %xmm016; CHECK-SSE-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm017; CHECK-SSE-NEXT:    retq18;19; CHECK-AVX2-LABEL: fmul_pow2_4xfloat:20; CHECK-AVX2:       # %bb.0:21; CHECK-AVX2-NEXT:    vpslld $23, %xmm0, %xmm022; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]23; CHECK-AVX2-NEXT:    vpaddd %xmm1, %xmm0, %xmm024; CHECK-AVX2-NEXT:    retq25;26; CHECK-ONLY-AVX512F-LABEL: fmul_pow2_4xfloat:27; CHECK-ONLY-AVX512F:       # %bb.0:28; CHECK-ONLY-AVX512F-NEXT:    vpslld $23, %xmm0, %xmm029; CHECK-ONLY-AVX512F-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]30; CHECK-ONLY-AVX512F-NEXT:    vpaddd %xmm1, %xmm0, %xmm031; CHECK-ONLY-AVX512F-NEXT:    retq32;33; CHECK-SKX-LABEL: fmul_pow2_4xfloat:34; CHECK-SKX:       # %bb.0:35; CHECK-SKX-NEXT:    vpslld $23, %xmm0, %xmm036; CHECK-SKX-NEXT:    vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm037; CHECK-SKX-NEXT:    retq38  %p2 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %i39  %p2_f = uitofp <4 x i32> %p2 to <4 x float>40  %r = fmul <4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, %p2_f41  ret <4 x float> %r42}43 44define <4 x float> @fmul_pow2_ldexp_4xfloat(<4 x i32> %i) {45; CHECK-SSE-LABEL: fmul_pow2_ldexp_4xfloat:46; CHECK-SSE:       # %bb.0:47; CHECK-SSE-NEXT:    subq $56, %rsp48; CHECK-SSE-NEXT:    .cfi_def_cfa_offset 6449; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill50; CHECK-SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]51; CHECK-SSE-NEXT:    movd %xmm1, %edi52; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]53; CHECK-SSE-NEXT:    callq ldexpf@PLT54; CHECK-SSE-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill55; CHECK-SSE-NEXT:    pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload56; CHECK-SSE-NEXT:    # xmm0 = mem[2,3,2,3]57; CHECK-SSE-NEXT:    movd %xmm0, %edi58; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]59; CHECK-SSE-NEXT:    callq ldexpf@PLT60; CHECK-SSE-NEXT:    unpcklps (%rsp), %xmm0 # 16-byte Folded Reload61; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]62; CHECK-SSE-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill63; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload64; CHECK-SSE-NEXT:    movd %xmm0, %edi65; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]66; CHECK-SSE-NEXT:    callq ldexpf@PLT67; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill68; CHECK-SSE-NEXT:    pshufd $85, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload69; CHECK-SSE-NEXT:    # xmm0 = mem[1,1,1,1]70; CHECK-SSE-NEXT:    movd %xmm0, %edi71; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]72; CHECK-SSE-NEXT:    callq ldexpf@PLT73; CHECK-SSE-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload74; CHECK-SSE-NEXT:    unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]75; CHECK-SSE-NEXT:    unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload76; CHECK-SSE-NEXT:    # xmm1 = xmm1[0],mem[0]77; CHECK-SSE-NEXT:    movaps %xmm1, %xmm078; CHECK-SSE-NEXT:    addq $56, %rsp79; CHECK-SSE-NEXT:    .cfi_def_cfa_offset 880; CHECK-SSE-NEXT:    retq81;82; CHECK-AVX2-LABEL: fmul_pow2_ldexp_4xfloat:83; CHECK-AVX2:       # %bb.0:84; CHECK-AVX2-NEXT:    subq $40, %rsp85; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 4886; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill87; CHECK-AVX2-NEXT:    vextractps $1, %xmm0, %edi88; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]89; CHECK-AVX2-NEXT:    callq ldexpf@PLT90; CHECK-AVX2-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill91; CHECK-AVX2-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload92; CHECK-AVX2-NEXT:    vmovd %xmm0, %edi93; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]94; CHECK-AVX2-NEXT:    callq ldexpf@PLT95; CHECK-AVX2-NEXT:    vinsertps $16, (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload96; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[2,3]97; CHECK-AVX2-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill98; CHECK-AVX2-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload99; CHECK-AVX2-NEXT:    vextractps $2, %xmm0, %edi100; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]101; CHECK-AVX2-NEXT:    callq ldexpf@PLT102; CHECK-AVX2-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload103; CHECK-AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]104; CHECK-AVX2-NEXT:    vmovaps %xmm0, (%rsp) # 16-byte Spill105; CHECK-AVX2-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload106; CHECK-AVX2-NEXT:    vextractps $3, %xmm0, %edi107; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]108; CHECK-AVX2-NEXT:    callq ldexpf@PLT109; CHECK-AVX2-NEXT:    vmovaps (%rsp), %xmm1 # 16-byte Reload110; CHECK-AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]111; CHECK-AVX2-NEXT:    addq $40, %rsp112; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 8113; CHECK-AVX2-NEXT:    retq114;115; CHECK-ONLY-AVX512F-LABEL: fmul_pow2_ldexp_4xfloat:116; CHECK-ONLY-AVX512F:       # %bb.0:117; CHECK-ONLY-AVX512F-NEXT:    vbroadcastss {{.*#+}} xmm1 = [9.0E+0,9.0E+0,9.0E+0,9.0E+0]118; CHECK-ONLY-AVX512F-NEXT:    vmovaps %xmm0, %xmm0119; CHECK-ONLY-AVX512F-NEXT:    vscalefps %zmm0, %zmm1, %zmm0120; CHECK-ONLY-AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0121; CHECK-ONLY-AVX512F-NEXT:    vzeroupper122; CHECK-ONLY-AVX512F-NEXT:    retq123;124; CHECK-SKX-LABEL: fmul_pow2_ldexp_4xfloat:125; CHECK-SKX:       # %bb.0:126; CHECK-SKX-NEXT:    vcvtdq2ps %xmm0, %xmm0127; CHECK-SKX-NEXT:    vbroadcastss {{.*#+}} xmm1 = [9.0E+0,9.0E+0,9.0E+0,9.0E+0]128; CHECK-SKX-NEXT:    vscalefps %xmm0, %xmm1, %xmm0129; CHECK-SKX-NEXT:    retq130  %r = call <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, <4 x i32> %i)131  ret <4 x float> %r132}133 134define <4 x float> @fdiv_pow2_4xfloat(<4 x i32> %i) {135; CHECK-SSE-LABEL: fdiv_pow2_4xfloat:136; CHECK-SSE:       # %bb.0:137; CHECK-SSE-NEXT:    pslld $23, %xmm0138; CHECK-SSE-NEXT:    movdqa {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]139; CHECK-SSE-NEXT:    psubd %xmm0, %xmm1140; CHECK-SSE-NEXT:    movdqa %xmm1, %xmm0141; CHECK-SSE-NEXT:    retq142;143; CHECK-AVX-LABEL: fdiv_pow2_4xfloat:144; CHECK-AVX:       # %bb.0:145; CHECK-AVX-NEXT:    vpslld $23, %xmm0, %xmm0146; CHECK-AVX-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]147; CHECK-AVX-NEXT:    vpsubd %xmm0, %xmm1, %xmm0148; CHECK-AVX-NEXT:    retq149  %p2 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %i150  %p2_f = uitofp <4 x i32> %p2 to <4 x float>151  %r = fdiv <4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, %p2_f152  ret <4 x float> %r153}154 155declare <8 x half> @llvm.ldexp.v8f16.v8i16(<8 x half>, <8 x i16>)156 157define <8 x half> @fmul_pow2_8xhalf(<8 x i16> %i) {158; CHECK-SSE-LABEL: fmul_pow2_8xhalf:159; CHECK-SSE:       # %bb.0:160; CHECK-SSE-NEXT:    subq $104, %rsp161; CHECK-SSE-NEXT:    .cfi_def_cfa_offset 112162; CHECK-SSE-NEXT:    movdqa %xmm0, %xmm1163; CHECK-SSE-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]164; CHECK-SSE-NEXT:    pslld $23, %xmm1165; CHECK-SSE-NEXT:    movdqa {{.*#+}} xmm2 = [1065353216,1065353216,1065353216,1065353216]166; CHECK-SSE-NEXT:    paddd %xmm2, %xmm1167; CHECK-SSE-NEXT:    cvttps2dq %xmm1, %xmm1168; CHECK-SSE-NEXT:    movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill169; CHECK-SSE-NEXT:    pslld $16, %xmm1170; CHECK-SSE-NEXT:    movdqa %xmm1, (%rsp) # 16-byte Spill171; CHECK-SSE-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]172; CHECK-SSE-NEXT:    pslld $23, %xmm0173; CHECK-SSE-NEXT:    paddd %xmm2, %xmm0174; CHECK-SSE-NEXT:    cvttps2dq %xmm0, %xmm0175; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill176; CHECK-SSE-NEXT:    pslld $16, %xmm0177; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill178; CHECK-SSE-NEXT:    psrld $16, %xmm0179; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0180; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT181; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill182; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload183; CHECK-SSE-NEXT:    psrlq $48, %xmm0184; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0185; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT186; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill187; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload188; CHECK-SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero189; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0190; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT191; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill192; CHECK-SSE-NEXT:    xorps %xmm0, %xmm0193; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload194; CHECK-SSE-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]195; CHECK-SSE-NEXT:    cvtdq2ps %xmm1, %xmm0196; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT197; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill198; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload199; CHECK-SSE-NEXT:    psrld $16, %xmm0200; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0201; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT202; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill203; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload204; CHECK-SSE-NEXT:    psrlq $48, %xmm0205; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0206; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT207; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill208; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload209; CHECK-SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero210; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0211; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT212; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill213; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload214; CHECK-SSE-NEXT:    pxor %xmm1, %xmm1215; CHECK-SSE-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]216; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm0217; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT218; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT219; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0220; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT221; CHECK-SSE-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill222; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload223; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero224; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT225; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0226; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT227; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm1 # 16-byte Reload228; CHECK-SSE-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]229; CHECK-SSE-NEXT:    movdqa %xmm1, (%rsp) # 16-byte Spill230; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload231; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero232; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT233; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0234; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT235; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill236; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload237; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero238; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT239; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0240; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT241; CHECK-SSE-NEXT:    punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload242; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]243; CHECK-SSE-NEXT:    punpckldq (%rsp), %xmm0 # 16-byte Folded Reload244; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]245; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill246; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload247; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero248; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT249; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0250; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT251; CHECK-SSE-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill252; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload253; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero254; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT255; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0256; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT257; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm1 # 16-byte Reload258; CHECK-SSE-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]259; CHECK-SSE-NEXT:    movdqa %xmm1, (%rsp) # 16-byte Spill260; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload261; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero262; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT263; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0264; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT265; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill266; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload267; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero268; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT269; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0270; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT271; CHECK-SSE-NEXT:    punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload272; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]273; CHECK-SSE-NEXT:    punpckldq (%rsp), %xmm0 # 16-byte Folded Reload274; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]275; CHECK-SSE-NEXT:    punpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload276; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0]277; CHECK-SSE-NEXT:    addq $104, %rsp278; CHECK-SSE-NEXT:    .cfi_def_cfa_offset 8279; CHECK-SSE-NEXT:    retq280;281; CHECK-AVX2-LABEL: fmul_pow2_8xhalf:282; CHECK-AVX2:       # %bb.0:283; CHECK-AVX2-NEXT:    subq $120, %rsp284; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 128285; CHECK-AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero286; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]287; CHECK-AVX2-NEXT:    vpsllvd %ymm0, %ymm1, %ymm0288; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]289; CHECK-AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]290; CHECK-AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero291; CHECK-AVX2-NEXT:    vcvtdq2ps %ymm0, %ymm0292; CHECK-AVX2-NEXT:    vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill293; CHECK-AVX2-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]294; CHECK-AVX2-NEXT:    vzeroupper295; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT296; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill297; CHECK-AVX2-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload298; CHECK-AVX2-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0299; CHECK-AVX2-NEXT:    vzeroupper300; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT301; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill302; CHECK-AVX2-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload303; CHECK-AVX2-NEXT:    # xmm0 = mem[1,0]304; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT305; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill306; CHECK-AVX2-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload307; CHECK-AVX2-NEXT:    # xmm0 = mem[3,3,3,3]308; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT309; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill310; CHECK-AVX2-NEXT:    vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload311; CHECK-AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0312; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill313; CHECK-AVX2-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]314; CHECK-AVX2-NEXT:    vzeroupper315; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT316; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill317; CHECK-AVX2-NEXT:    vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload318; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT319; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill320; CHECK-AVX2-NEXT:    vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload321; CHECK-AVX2-NEXT:    # xmm0 = mem[1,0]322; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT323; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill324; CHECK-AVX2-NEXT:    vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload325; CHECK-AVX2-NEXT:    # xmm0 = mem[3,3,3,3]326; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT327; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT328; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0329; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT330; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill331; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload332; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero333; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT334; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0335; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT336; CHECK-AVX2-NEXT:    vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload337; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]338; CHECK-AVX2-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill339; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload340; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero341; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT342; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0343; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT344; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill345; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload346; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero347; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT348; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0349; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT350; CHECK-AVX2-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload351; CHECK-AVX2-NEXT:    vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]352; CHECK-AVX2-NEXT:    vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload353; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]354; CHECK-AVX2-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill355; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload356; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero357; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT358; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0359; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT360; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill361; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload362; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero363; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT364; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0365; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT366; CHECK-AVX2-NEXT:    vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload367; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]368; CHECK-AVX2-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill369; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload370; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero371; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT372; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0373; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT374; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill375; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload376; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero377; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT378; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0379; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT380; CHECK-AVX2-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload381; CHECK-AVX2-NEXT:    vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]382; CHECK-AVX2-NEXT:    vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload383; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]384; CHECK-AVX2-NEXT:    vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload385; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0]386; CHECK-AVX2-NEXT:    addq $120, %rsp387; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 8388; CHECK-AVX2-NEXT:    retq389;390; CHECK-ONLY-AVX512F-LABEL: fmul_pow2_8xhalf:391; CHECK-ONLY-AVX512F:       # %bb.0:392; CHECK-ONLY-AVX512F-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero393; CHECK-ONLY-AVX512F-NEXT:    vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]394; CHECK-ONLY-AVX512F-NEXT:    vpsllvd %ymm0, %ymm1, %ymm0395; CHECK-ONLY-AVX512F-NEXT:    vpxor %xmm1, %xmm1, %xmm1396; CHECK-ONLY-AVX512F-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]397; CHECK-ONLY-AVX512F-NEXT:    vcvtdq2ps %ymm0, %ymm0398; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %ymm0, %xmm0399; CHECK-ONLY-AVX512F-NEXT:    vcvtph2ps %xmm0, %ymm0400; CHECK-ONLY-AVX512F-NEXT:    vbroadcastss {{.*#+}} ymm1 = [8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3]401; CHECK-ONLY-AVX512F-NEXT:    vmulps %ymm1, %ymm0, %ymm0402; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %ymm0, %xmm0403; CHECK-ONLY-AVX512F-NEXT:    vzeroupper404; CHECK-ONLY-AVX512F-NEXT:    retq405;406; CHECK-SKX-LABEL: fmul_pow2_8xhalf:407; CHECK-SKX:       # %bb.0:408; CHECK-SKX-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1,1,1,1,1]409; CHECK-SKX-NEXT:    vpsllvw %xmm0, %xmm1, %xmm0410; CHECK-SKX-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero411; CHECK-SKX-NEXT:    vcvtdq2ps %ymm0, %ymm0412; CHECK-SKX-NEXT:    vcvtps2ph $4, %ymm0, %xmm0413; CHECK-SKX-NEXT:    vcvtph2ps %xmm0, %ymm0414; CHECK-SKX-NEXT:    vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0415; CHECK-SKX-NEXT:    vcvtps2ph $4, %ymm0, %xmm0416; CHECK-SKX-NEXT:    vzeroupper417; CHECK-SKX-NEXT:    retq418  %p2 = shl <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, %i419  %p2_f = uitofp <8 x i16> %p2 to <8 x half>420  %r = fmul <8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, %p2_f421  ret <8 x half> %r422}423 424define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {425; CHECK-SSE-LABEL: fmul_pow2_ldexp_8xhalf:426; CHECK-SSE:       # %bb.0:427; CHECK-SSE-NEXT:    subq $72, %rsp428; CHECK-SSE-NEXT:    .cfi_def_cfa_offset 80429; CHECK-SSE-NEXT:    movdqa %xmm0, (%rsp) # 16-byte Spill430; CHECK-SSE-NEXT:    pextrw $7, %xmm0, %eax431; CHECK-SSE-NEXT:    movswl %ax, %edi432; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]433; CHECK-SSE-NEXT:    callq ldexpf@PLT434; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT435; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill436; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload437; CHECK-SSE-NEXT:    pextrw $6, %xmm0, %eax438; CHECK-SSE-NEXT:    movswl %ax, %edi439; CHECK-SSE-NEXT:    movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]440; CHECK-SSE-NEXT:    callq ldexpf@PLT441; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT442; CHECK-SSE-NEXT:    punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload443; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]444; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill445; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload446; CHECK-SSE-NEXT:    pextrw $5, %xmm0, %eax447; CHECK-SSE-NEXT:    movswl %ax, %edi448; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]449; CHECK-SSE-NEXT:    callq ldexpf@PLT450; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT451; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill452; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload453; CHECK-SSE-NEXT:    pextrw $4, %xmm0, %eax454; CHECK-SSE-NEXT:    movswl %ax, %edi455; CHECK-SSE-NEXT:    movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]456; CHECK-SSE-NEXT:    callq ldexpf@PLT457; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT458; CHECK-SSE-NEXT:    punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload459; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]460; CHECK-SSE-NEXT:    punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload461; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]462; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill463; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload464; CHECK-SSE-NEXT:    pextrw $3, %xmm0, %eax465; CHECK-SSE-NEXT:    movswl %ax, %edi466; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]467; CHECK-SSE-NEXT:    callq ldexpf@PLT468; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT469; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill470; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload471; CHECK-SSE-NEXT:    pextrw $2, %xmm0, %eax472; CHECK-SSE-NEXT:    movswl %ax, %edi473; CHECK-SSE-NEXT:    movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]474; CHECK-SSE-NEXT:    callq ldexpf@PLT475; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT476; CHECK-SSE-NEXT:    punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload477; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]478; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill479; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload480; CHECK-SSE-NEXT:    pextrw $1, %xmm0, %eax481; CHECK-SSE-NEXT:    movswl %ax, %edi482; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]483; CHECK-SSE-NEXT:    callq ldexpf@PLT484; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT485; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill486; CHECK-SSE-NEXT:    movdqa (%rsp), %xmm0 # 16-byte Reload487; CHECK-SSE-NEXT:    movd %xmm0, %eax488; CHECK-SSE-NEXT:    movswl %ax, %edi489; CHECK-SSE-NEXT:    movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]490; CHECK-SSE-NEXT:    callq ldexpf@PLT491; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT492; CHECK-SSE-NEXT:    punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload493; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]494; CHECK-SSE-NEXT:    punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload495; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]496; CHECK-SSE-NEXT:    punpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload497; CHECK-SSE-NEXT:    # xmm0 = xmm0[0],mem[0]498; CHECK-SSE-NEXT:    addq $72, %rsp499; CHECK-SSE-NEXT:    .cfi_def_cfa_offset 8500; CHECK-SSE-NEXT:    retq501;502; CHECK-AVX2-LABEL: fmul_pow2_ldexp_8xhalf:503; CHECK-AVX2:       # %bb.0:504; CHECK-AVX2-NEXT:    subq $72, %rsp505; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 80506; CHECK-AVX2-NEXT:    vmovdqa %xmm0, (%rsp) # 16-byte Spill507; CHECK-AVX2-NEXT:    vpextrw $7, %xmm0, %eax508; CHECK-AVX2-NEXT:    movswl %ax, %edi509; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]510; CHECK-AVX2-NEXT:    callq ldexpf@PLT511; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT512; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill513; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload514; CHECK-AVX2-NEXT:    vpextrw $6, %xmm0, %eax515; CHECK-AVX2-NEXT:    movswl %ax, %edi516; CHECK-AVX2-NEXT:    vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]517; CHECK-AVX2-NEXT:    callq ldexpf@PLT518; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT519; CHECK-AVX2-NEXT:    vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload520; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]521; CHECK-AVX2-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill522; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload523; CHECK-AVX2-NEXT:    vpextrw $5, %xmm0, %eax524; CHECK-AVX2-NEXT:    movswl %ax, %edi525; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]526; CHECK-AVX2-NEXT:    callq ldexpf@PLT527; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT528; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill529; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload530; CHECK-AVX2-NEXT:    vpextrw $4, %xmm0, %eax531; CHECK-AVX2-NEXT:    movswl %ax, %edi532; CHECK-AVX2-NEXT:    vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]533; CHECK-AVX2-NEXT:    callq ldexpf@PLT534; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT535; CHECK-AVX2-NEXT:    vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload536; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]537; CHECK-AVX2-NEXT:    vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload538; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]539; CHECK-AVX2-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill540; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload541; CHECK-AVX2-NEXT:    vpextrw $3, %xmm0, %eax542; CHECK-AVX2-NEXT:    movswl %ax, %edi543; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]544; CHECK-AVX2-NEXT:    callq ldexpf@PLT545; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT546; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill547; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload548; CHECK-AVX2-NEXT:    vpextrw $2, %xmm0, %eax549; CHECK-AVX2-NEXT:    movswl %ax, %edi550; CHECK-AVX2-NEXT:    vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]551; CHECK-AVX2-NEXT:    callq ldexpf@PLT552; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT553; CHECK-AVX2-NEXT:    vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload554; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]555; CHECK-AVX2-NEXT:    vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill556; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload557; CHECK-AVX2-NEXT:    vpextrw $1, %xmm0, %eax558; CHECK-AVX2-NEXT:    movswl %ax, %edi559; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]560; CHECK-AVX2-NEXT:    callq ldexpf@PLT561; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT562; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill563; CHECK-AVX2-NEXT:    vmovdqa (%rsp), %xmm0 # 16-byte Reload564; CHECK-AVX2-NEXT:    vmovd %xmm0, %eax565; CHECK-AVX2-NEXT:    movswl %ax, %edi566; CHECK-AVX2-NEXT:    vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]567; CHECK-AVX2-NEXT:    callq ldexpf@PLT568; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT569; CHECK-AVX2-NEXT:    vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload570; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]571; CHECK-AVX2-NEXT:    vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload572; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]573; CHECK-AVX2-NEXT:    vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload574; CHECK-AVX2-NEXT:    # xmm0 = xmm0[0],mem[0]575; CHECK-AVX2-NEXT:    addq $72, %rsp576; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 8577; CHECK-AVX2-NEXT:    retq578;579; CHECK-AVX512F-LABEL: fmul_pow2_ldexp_8xhalf:580; CHECK-AVX512F:       # %bb.0:581; CHECK-AVX512F-NEXT:    vbroadcastss {{.*#+}} ymm1 = [8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3]582; CHECK-AVX512F-NEXT:    vpmovsxwd %xmm0, %ymm0583; CHECK-AVX512F-NEXT:    vscalefps %zmm0, %zmm1, %zmm0584; CHECK-AVX512F-NEXT:    vcvtps2ph $4, %ymm0, %xmm0585; CHECK-AVX512F-NEXT:    vzeroupper586; CHECK-AVX512F-NEXT:    retq587  %r = call <8 x half> @llvm.ldexp.v8f16.v8i16(<8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, <8 x i16> %i)588  ret <8 x half> %r589}590 591define <8 x half> @fdiv_pow2_8xhalf(<8 x i16> %i) {592; CHECK-SSE-LABEL: fdiv_pow2_8xhalf:593; CHECK-SSE:       # %bb.0:594; CHECK-SSE-NEXT:    psllw $10, %xmm0595; CHECK-SSE-NEXT:    movdqa {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]596; CHECK-SSE-NEXT:    psubw %xmm0, %xmm1597; CHECK-SSE-NEXT:    movdqa %xmm1, %xmm0598; CHECK-SSE-NEXT:    retq599;600; CHECK-AVX2-LABEL: fdiv_pow2_8xhalf:601; CHECK-AVX2:       # %bb.0:602; CHECK-AVX2-NEXT:    vpsllw $10, %xmm0, %xmm0603; CHECK-AVX2-NEXT:    vpbroadcastw {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]604; CHECK-AVX2-NEXT:    vpsubw %xmm0, %xmm1, %xmm0605; CHECK-AVX2-NEXT:    retq606;607; CHECK-ONLY-AVX512F-LABEL: fdiv_pow2_8xhalf:608; CHECK-ONLY-AVX512F:       # %bb.0:609; CHECK-ONLY-AVX512F-NEXT:    vpsllw $10, %xmm0, %xmm0610; CHECK-ONLY-AVX512F-NEXT:    vpbroadcastw {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]611; CHECK-ONLY-AVX512F-NEXT:    vpsubw %xmm0, %xmm1, %xmm0612; CHECK-ONLY-AVX512F-NEXT:    retq613;614; CHECK-SKX-LABEL: fdiv_pow2_8xhalf:615; CHECK-SKX:       # %bb.0:616; CHECK-SKX-NEXT:    vpsllw $10, %xmm0, %xmm0617; CHECK-SKX-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]618; CHECK-SKX-NEXT:    vpsubw %xmm0, %xmm1, %xmm0619; CHECK-SKX-NEXT:    retq620  %p2 = shl <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, %i621  %p2_f = uitofp <8 x i16> %p2 to <8 x half>622  %r = fdiv <8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, %p2_f623  ret <8 x half> %r624}625 626; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set627; in the original IR.628define double @fmul_pow_shl_cnt(i64 %cnt) nounwind {629; CHECK-SSE-LABEL: fmul_pow_shl_cnt:630; CHECK-SSE:       # %bb.0:631; CHECK-SSE-NEXT:    movzbl %dil, %eax632; CHECK-SSE-NEXT:    shlq $52, %rax633; CHECK-SSE-NEXT:    movabsq $4621256167635550208, %rcx # imm = 0x4022000000000000634; CHECK-SSE-NEXT:    addq %rax, %rcx635; CHECK-SSE-NEXT:    movq %rcx, %xmm0636; CHECK-SSE-NEXT:    retq637;638; CHECK-AVX-LABEL: fmul_pow_shl_cnt:639; CHECK-AVX:       # %bb.0:640; CHECK-AVX-NEXT:    movzbl %dil, %eax641; CHECK-AVX-NEXT:    shlq $52, %rax642; CHECK-AVX-NEXT:    movabsq $4621256167635550208, %rcx # imm = 0x4022000000000000643; CHECK-AVX-NEXT:    addq %rax, %rcx644; CHECK-AVX-NEXT:    vmovq %rcx, %xmm0645; CHECK-AVX-NEXT:    retq646  %shl = shl nuw i64 1, %cnt647  %conv = uitofp i64 %shl to double648  %mul = fmul double 9.000000e+00, %conv649  ret double %mul650}651 652; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set653; in the original IR.654define double @fmul_pow_shl_cnt2(i64 %cnt) nounwind {655; CHECK-SSE-LABEL: fmul_pow_shl_cnt2:656; CHECK-SSE:       # %bb.0:657; CHECK-SSE-NEXT:    movzbl %dil, %eax658; CHECK-SSE-NEXT:    incl %eax659; CHECK-SSE-NEXT:    shlq $52, %rax660; CHECK-SSE-NEXT:    movabsq $-4602115869219225600, %rcx # imm = 0xC022000000000000661; CHECK-SSE-NEXT:    addq %rax, %rcx662; CHECK-SSE-NEXT:    movq %rcx, %xmm0663; CHECK-SSE-NEXT:    retq664;665; CHECK-AVX-LABEL: fmul_pow_shl_cnt2:666; CHECK-AVX:       # %bb.0:667; CHECK-AVX-NEXT:    movzbl %dil, %eax668; CHECK-AVX-NEXT:    incl %eax669; CHECK-AVX-NEXT:    shlq $52, %rax670; CHECK-AVX-NEXT:    movabsq $-4602115869219225600, %rcx # imm = 0xC022000000000000671; CHECK-AVX-NEXT:    addq %rax, %rcx672; CHECK-AVX-NEXT:    vmovq %rcx, %xmm0673; CHECK-AVX-NEXT:    retq674  %shl = shl nuw i64 2, %cnt675  %conv = uitofp i64 %shl to double676  %mul = fmul double -9.000000e+00, %conv677  ret double %mul678}679 680; Make sure we do a movzbl of the input register.681define double @fmul_pow_shl_cnt3(i8 %cnt) nounwind {682; CHECK-SSE-LABEL: fmul_pow_shl_cnt3:683; CHECK-SSE:       # %bb.0:684; CHECK-SSE-NEXT:    movzbl %dil, %eax685; CHECK-SSE-NEXT:    shlq $52, %rax686; CHECK-SSE-NEXT:    movabsq $-4602115869219225600, %rcx # imm = 0xC022000000000000687; CHECK-SSE-NEXT:    addq %rax, %rcx688; CHECK-SSE-NEXT:    movq %rcx, %xmm0689; CHECK-SSE-NEXT:    retq690;691; CHECK-AVX-LABEL: fmul_pow_shl_cnt3:692; CHECK-AVX:       # %bb.0:693; CHECK-AVX-NEXT:    movzbl %dil, %eax694; CHECK-AVX-NEXT:    shlq $52, %rax695; CHECK-AVX-NEXT:    movabsq $-4602115869219225600, %rcx # imm = 0xC022000000000000696; CHECK-AVX-NEXT:    addq %rax, %rcx697; CHECK-AVX-NEXT:    vmovq %rcx, %xmm0698; CHECK-AVX-NEXT:    retq699  %zext_cnt = zext i8 %cnt to i64700  %shl = shl nuw i64 1, %zext_cnt701  %conv = uitofp i64 %shl to double702  %mul = fmul double -9.000000e+00, %conv703  ret double %mul704}705 706; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set707; in the original IR.708define float @fmul_pow_select(i32 %cnt, i1 %c) nounwind {709; CHECK-SSE-LABEL: fmul_pow_select:710; CHECK-SSE:       # %bb.0:711; CHECK-SSE-NEXT:    movzbl %dil, %eax712; CHECK-SSE-NEXT:    leal 1(%rax), %ecx713; CHECK-SSE-NEXT:    testb $1, %sil714; CHECK-SSE-NEXT:    cmovnel %eax, %ecx715; CHECK-SSE-NEXT:    shll $23, %ecx716; CHECK-SSE-NEXT:    addl $1091567616, %ecx # imm = 0x41100000717; CHECK-SSE-NEXT:    movd %ecx, %xmm0718; CHECK-SSE-NEXT:    retq719;720; CHECK-AVX-LABEL: fmul_pow_select:721; CHECK-AVX:       # %bb.0:722; CHECK-AVX-NEXT:    movzbl %dil, %eax723; CHECK-AVX-NEXT:    leal 1(%rax), %ecx724; CHECK-AVX-NEXT:    testb $1, %sil725; CHECK-AVX-NEXT:    cmovnel %eax, %ecx726; CHECK-AVX-NEXT:    shll $23, %ecx727; CHECK-AVX-NEXT:    addl $1091567616, %ecx # imm = 0x41100000728; CHECK-AVX-NEXT:    vmovd %ecx, %xmm0729; CHECK-AVX-NEXT:    retq730  %shl2 = shl nuw i32 2, %cnt731  %shl1 = shl nuw i32 1, %cnt732  %shl = select i1 %c, i32 %shl1, i32 %shl2733  %conv = uitofp i32 %shl to float734  %mul = fmul float 9.000000e+00, %conv735  ret float %mul736}737 738; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set739; in the original IR.740define float @fmul_fly_pow_mul_min_pow2(i64 %cnt) nounwind {741; CHECK-SSE-LABEL: fmul_fly_pow_mul_min_pow2:742; CHECK-SSE:       # %bb.0:743; CHECK-SSE-NEXT:    movzbl %dil, %eax744; CHECK-SSE-NEXT:    addl $3, %eax745; CHECK-SSE-NEXT:    cmpl $13, %eax746; CHECK-SSE-NEXT:    movl $13, %ecx747; CHECK-SSE-NEXT:    cmovbl %eax, %ecx748; CHECK-SSE-NEXT:    shll $23, %ecx749; CHECK-SSE-NEXT:    addl $1091567616, %ecx # imm = 0x41100000750; CHECK-SSE-NEXT:    movd %ecx, %xmm0751; CHECK-SSE-NEXT:    retq752;753; CHECK-AVX-LABEL: fmul_fly_pow_mul_min_pow2:754; CHECK-AVX:       # %bb.0:755; CHECK-AVX-NEXT:    movzbl %dil, %eax756; CHECK-AVX-NEXT:    addl $3, %eax757; CHECK-AVX-NEXT:    cmpl $13, %eax758; CHECK-AVX-NEXT:    movl $13, %ecx759; CHECK-AVX-NEXT:    cmovbl %eax, %ecx760; CHECK-AVX-NEXT:    shll $23, %ecx761; CHECK-AVX-NEXT:    addl $1091567616, %ecx # imm = 0x41100000762; CHECK-AVX-NEXT:    vmovd %ecx, %xmm0763; CHECK-AVX-NEXT:    retq764  %shl8 = shl nuw i64 8, %cnt765  %shl = call i64 @llvm.umin.i64(i64 %shl8, i64 8192)766  %conv = uitofp i64 %shl to float767  %mul = fmul float 9.000000e+00, %conv768  ret float %mul769}770 771; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set772; in the original IR.773define double @fmul_pow_mul_max_pow2(i16 %cnt) nounwind {774; CHECK-SSE-LABEL: fmul_pow_mul_max_pow2:775; CHECK-SSE:       # %bb.0:776; CHECK-SSE-NEXT:    movzbl %dil, %eax777; CHECK-SSE-NEXT:    leaq 1(%rax), %rcx778; CHECK-SSE-NEXT:    cmpq %rcx, %rax779; CHECK-SSE-NEXT:    cmovaq %rax, %rcx780; CHECK-SSE-NEXT:    shlq $52, %rcx781; CHECK-SSE-NEXT:    movabsq $4613937818241073152, %rax # imm = 0x4008000000000000782; CHECK-SSE-NEXT:    orq %rcx, %rax783; CHECK-SSE-NEXT:    movq %rax, %xmm0784; CHECK-SSE-NEXT:    retq785;786; CHECK-AVX-LABEL: fmul_pow_mul_max_pow2:787; CHECK-AVX:       # %bb.0:788; CHECK-AVX-NEXT:    movzbl %dil, %eax789; CHECK-AVX-NEXT:    leaq 1(%rax), %rcx790; CHECK-AVX-NEXT:    cmpq %rcx, %rax791; CHECK-AVX-NEXT:    cmovaq %rax, %rcx792; CHECK-AVX-NEXT:    shlq $52, %rcx793; CHECK-AVX-NEXT:    movabsq $4613937818241073152, %rax # imm = 0x4008000000000000794; CHECK-AVX-NEXT:    orq %rcx, %rax795; CHECK-AVX-NEXT:    vmovq %rax, %xmm0796; CHECK-AVX-NEXT:    retq797  %shl2 = shl nuw i16 2, %cnt798  %shl1 = shl nuw i16 1, %cnt799  %shl = call i16 @llvm.umax.i16(i16 %shl1, i16 %shl2)800  %conv = uitofp i16 %shl to double801  %mul = fmul double 3.000000e+00, %conv802  ret double %mul803}804 805define double @fmul_pow_shl_cnt_fail_maybe_non_pow2(i64 %v, i64 %cnt) nounwind {806; CHECK-SSE-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:807; CHECK-SSE:       # %bb.0:808; CHECK-SSE-NEXT:    movq %rsi, %rcx809; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $rcx810; CHECK-SSE-NEXT:    shlq %cl, %rdi811; CHECK-SSE-NEXT:    movq %rdi, %xmm1812; CHECK-SSE-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]813; CHECK-SSE-NEXT:    subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1814; CHECK-SSE-NEXT:    movapd %xmm1, %xmm0815; CHECK-SSE-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]816; CHECK-SSE-NEXT:    addsd %xmm1, %xmm0817; CHECK-SSE-NEXT:    mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0818; CHECK-SSE-NEXT:    retq819;820; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:821; CHECK-AVX2:       # %bb.0:822; CHECK-AVX2-NEXT:    movq %rsi, %rcx823; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $rcx824; CHECK-AVX2-NEXT:    shlq %cl, %rdi825; CHECK-AVX2-NEXT:    vmovq %rdi, %xmm0826; CHECK-AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]827; CHECK-AVX2-NEXT:    vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0828; CHECK-AVX2-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]829; CHECK-AVX2-NEXT:    vaddsd %xmm0, %xmm1, %xmm0830; CHECK-AVX2-NEXT:    vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0831; CHECK-AVX2-NEXT:    retq832;833; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:834; CHECK-ONLY-AVX512F:       # %bb.0:835; CHECK-ONLY-AVX512F-NEXT:    movq %rsi, %rcx836; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $rcx837; CHECK-ONLY-AVX512F-NEXT:    shlq %cl, %rdi838; CHECK-ONLY-AVX512F-NEXT:    vcvtusi2sd %rdi, %xmm15, %xmm0839; CHECK-ONLY-AVX512F-NEXT:    vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0840; CHECK-ONLY-AVX512F-NEXT:    retq841;842; CHECK-SKX-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:843; CHECK-SKX:       # %bb.0:844; CHECK-SKX-NEXT:    shlxq %rsi, %rdi, %rax845; CHECK-SKX-NEXT:    vcvtusi2sd %rax, %xmm15, %xmm0846; CHECK-SKX-NEXT:    vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0847; CHECK-SKX-NEXT:    retq848  %shl = shl nuw i64 %v, %cnt849  %conv = uitofp i64 %shl to double850  %mul = fmul double 9.000000e+00, %conv851  ret double %mul852}853 854define <2 x float> @fmul_pow_shl_cnt_vec_fail_expensive_cast(<2 x i64> %cnt) nounwind {855; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:856; CHECK-SSE:       # %bb.0:857; CHECK-SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]858; CHECK-SSE-NEXT:    movdqa {{.*#+}} xmm2 = [2,2]859; CHECK-SSE-NEXT:    movdqa %xmm2, %xmm3860; CHECK-SSE-NEXT:    psllq %xmm1, %xmm3861; CHECK-SSE-NEXT:    psllq %xmm0, %xmm2862; CHECK-SSE-NEXT:    movq %xmm2, %rax863; CHECK-SSE-NEXT:    xorps %xmm0, %xmm0864; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm0865; CHECK-SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[2,3,2,3]866; CHECK-SSE-NEXT:    movq %xmm1, %rax867; CHECK-SSE-NEXT:    xorps %xmm1, %xmm1868; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm1869; CHECK-SSE-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]870; CHECK-SSE-NEXT:    mulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0871; CHECK-SSE-NEXT:    retq872;873; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:874; CHECK-AVX2:       # %bb.0:875; CHECK-AVX2-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [2,2]876; CHECK-AVX2-NEXT:    vpsllvq %xmm0, %xmm1, %xmm0877; CHECK-AVX2-NEXT:    vpextrq $1, %xmm0, %rax878; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm1879; CHECK-AVX2-NEXT:    vmovq %xmm0, %rax880; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm0881; CHECK-AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero882; CHECK-AVX2-NEXT:    vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]883; CHECK-AVX2-NEXT:    vmulps %xmm1, %xmm0, %xmm0884; CHECK-AVX2-NEXT:    retq885;886; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:887; CHECK-ONLY-AVX512F:       # %bb.0:888; CHECK-ONLY-AVX512F-NEXT:    vpmovsxbq {{.*#+}} xmm1 = [2,2]889; CHECK-ONLY-AVX512F-NEXT:    vpsllvq %xmm0, %xmm1, %xmm0890; CHECK-ONLY-AVX512F-NEXT:    vpextrq $1, %xmm0, %rax891; CHECK-ONLY-AVX512F-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm1892; CHECK-ONLY-AVX512F-NEXT:    vmovq %xmm0, %rax893; CHECK-ONLY-AVX512F-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm0894; CHECK-ONLY-AVX512F-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero895; CHECK-ONLY-AVX512F-NEXT:    vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]896; CHECK-ONLY-AVX512F-NEXT:    vmulps %xmm1, %xmm0, %xmm0897; CHECK-ONLY-AVX512F-NEXT:    retq898;899; CHECK-SKX-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:900; CHECK-SKX:       # %bb.0:901; CHECK-SKX-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [2,2]902; CHECK-SKX-NEXT:    vpsllvq %xmm0, %xmm1, %xmm0903; CHECK-SKX-NEXT:    vcvtqq2ps %xmm0, %xmm0904; CHECK-SKX-NEXT:    vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0905; CHECK-SKX-NEXT:    retq906  %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt907  %conv = uitofp <2 x i64> %shl to <2 x float>908  %mul = fmul <2 x float> <float 15.000000e+00, float 15.000000e+00>, %conv909  ret <2 x float> %mul910}911 912define <2 x double> @fmul_pow_shl_cnt_vec(<2 x i64> %cnt) nounwind {913; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec:914; CHECK-SSE:       # %bb.0:915; CHECK-SSE-NEXT:    psllq $52, %xmm0916; CHECK-SSE-NEXT:    paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0917; CHECK-SSE-NEXT:    retq918;919; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec:920; CHECK-AVX2:       # %bb.0:921; CHECK-AVX2-NEXT:    vpsllq $52, %xmm0, %xmm0922; CHECK-AVX2-NEXT:    vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0923; CHECK-AVX2-NEXT:    retq924;925; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_vec:926; CHECK-ONLY-AVX512F:       # %bb.0:927; CHECK-ONLY-AVX512F-NEXT:    vpsllq $52, %xmm0, %xmm0928; CHECK-ONLY-AVX512F-NEXT:    vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0929; CHECK-ONLY-AVX512F-NEXT:    retq930;931; CHECK-SKX-LABEL: fmul_pow_shl_cnt_vec:932; CHECK-SKX:       # %bb.0:933; CHECK-SKX-NEXT:    vpsllq $52, %xmm0, %xmm0934; CHECK-SKX-NEXT:    vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0935; CHECK-SKX-NEXT:    retq936  %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt937  %conv = uitofp <2 x i64> %shl to <2 x double>938  %mul = fmul <2 x double> <double 15.000000e+00, double 15.000000e+00>, %conv939  ret <2 x double> %mul940}941 942define <4 x float> @fmul_pow_shl_cnt_vec_preserve_fma(<4 x i32> %cnt, <4 x float> %add) nounwind {943; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:944; CHECK-SSE:       # %bb.0:945; CHECK-SSE-NEXT:    pslld $23, %xmm0946; CHECK-SSE-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0947; CHECK-SSE-NEXT:    addps %xmm1, %xmm0948; CHECK-SSE-NEXT:    retq949;950; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:951; CHECK-AVX2:       # %bb.0:952; CHECK-AVX2-NEXT:    vpslld $23, %xmm0, %xmm0953; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]954; CHECK-AVX2-NEXT:    vpaddd %xmm2, %xmm0, %xmm0955; CHECK-AVX2-NEXT:    vaddps %xmm1, %xmm0, %xmm0956; CHECK-AVX2-NEXT:    retq957;958; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:959; CHECK-ONLY-AVX512F:       # %bb.0:960; CHECK-ONLY-AVX512F-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]961; CHECK-ONLY-AVX512F-NEXT:    vpsllvd %xmm0, %xmm2, %xmm0962; CHECK-ONLY-AVX512F-NEXT:    vcvtdq2ps %xmm0, %xmm2963; CHECK-ONLY-AVX512F-NEXT:    vbroadcastss {{.*#+}} xmm0 = [5.0E+0,5.0E+0,5.0E+0,5.0E+0]964; CHECK-ONLY-AVX512F-NEXT:    vfmadd213ps {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm1965; CHECK-ONLY-AVX512F-NEXT:    retq966;967; CHECK-SKX-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:968; CHECK-SKX:       # %bb.0:969; CHECK-SKX-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]970; CHECK-SKX-NEXT:    vpsllvd %xmm0, %xmm2, %xmm0971; CHECK-SKX-NEXT:    vcvtdq2ps %xmm0, %xmm0972; CHECK-SKX-NEXT:    vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1973; CHECK-SKX-NEXT:    retq974  %shl = shl nsw nuw <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %cnt975  %conv = uitofp <4 x i32> %shl to <4 x float>976  %mul = fmul contract <4 x float> <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>, %conv977  %res = fadd contract <4 x float> %mul, %add978  ret <4 x float> %res979}980 981define <4 x float> @fmul_pow_shl_cnt_vec_no_fma(<4 x i32> %cnt, <4 x float> %add) nounwind {982; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_no_fma:983; CHECK-SSE:       # %bb.0:984; CHECK-SSE-NEXT:    pslld $23, %xmm0985; CHECK-SSE-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0986; CHECK-SSE-NEXT:    addps %xmm1, %xmm0987; CHECK-SSE-NEXT:    retq988;989; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_no_fma:990; CHECK-AVX2:       # %bb.0:991; CHECK-AVX2-NEXT:    vpslld $23, %xmm0, %xmm0992; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]993; CHECK-AVX2-NEXT:    vpaddd %xmm2, %xmm0, %xmm0994; CHECK-AVX2-NEXT:    vaddps %xmm1, %xmm0, %xmm0995; CHECK-AVX2-NEXT:    retq996;997; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_vec_no_fma:998; CHECK-ONLY-AVX512F:       # %bb.0:999; CHECK-ONLY-AVX512F-NEXT:    vpslld $23, %xmm0, %xmm01000; CHECK-ONLY-AVX512F-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]1001; CHECK-ONLY-AVX512F-NEXT:    vpaddd %xmm2, %xmm0, %xmm01002; CHECK-ONLY-AVX512F-NEXT:    vaddps %xmm1, %xmm0, %xmm01003; CHECK-ONLY-AVX512F-NEXT:    retq1004;1005; CHECK-SKX-LABEL: fmul_pow_shl_cnt_vec_no_fma:1006; CHECK-SKX:       # %bb.0:1007; CHECK-SKX-NEXT:    vpslld $23, %xmm0, %xmm01008; CHECK-SKX-NEXT:    vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm01009; CHECK-SKX-NEXT:    vaddps %xmm1, %xmm0, %xmm01010; CHECK-SKX-NEXT:    retq1011  %shl = shl nsw nuw <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %cnt1012  %conv = uitofp <4 x i32> %shl to <4 x float>1013  %mul = fmul <4 x float> <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>, %conv1014  %res = fadd <4 x float> %mul, %add1015  ret <4 x float> %res1016}1017 1018define <2 x double> @fmul_pow_shl_cnt_vec_non_splat_todo(<2 x i64> %cnt) nounwind {1019; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_non_splat_todo:1020; CHECK-SSE:       # %bb.0:1021; CHECK-SSE-NEXT:    psllq $52, %xmm01022; CHECK-SSE-NEXT:    paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01023; CHECK-SSE-NEXT:    retq1024;1025; CHECK-AVX-LABEL: fmul_pow_shl_cnt_vec_non_splat_todo:1026; CHECK-AVX:       # %bb.0:1027; CHECK-AVX-NEXT:    vpsllq $52, %xmm0, %xmm01028; CHECK-AVX-NEXT:    vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01029; CHECK-AVX-NEXT:    retq1030  %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt1031  %conv = uitofp <2 x i64> %shl to <2 x double>1032  %mul = fmul <2 x double> <double 15.000000e+00, double 14.000000e+00>, %conv1033  ret <2 x double> %mul1034}1035 1036define <2 x double> @fmul_pow_shl_cnt_vec_non_splat2_todo(<2 x i64> %cnt) nounwind {1037; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_non_splat2_todo:1038; CHECK-SSE:       # %bb.0:1039; CHECK-SSE-NEXT:    psllq $52, %xmm01040; CHECK-SSE-NEXT:    paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01041; CHECK-SSE-NEXT:    retq1042;1043; CHECK-AVX-LABEL: fmul_pow_shl_cnt_vec_non_splat2_todo:1044; CHECK-AVX:       # %bb.0:1045; CHECK-AVX-NEXT:    vpsllq $52, %xmm0, %xmm01046; CHECK-AVX-NEXT:    vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01047; CHECK-AVX-NEXT:    retq1048  %shl = shl nsw nuw <2 x i64> <i64 2, i64 1>, %cnt1049  %conv = uitofp <2 x i64> %shl to <2 x double>1050  %mul = fmul <2 x double> <double 15.000000e+00, double 15.000000e+00>, %conv1051  ret <2 x double> %mul1052}1053 1054define <2 x half> @fmul_pow_shl_cnt_vec_fail_to_large(<2 x i16> %cnt) nounwind {1055; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:1056; CHECK-SSE:       # %bb.0:1057; CHECK-SSE-NEXT:    subq $40, %rsp1058; CHECK-SSE-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]1059; CHECK-SSE-NEXT:    pslld $23, %xmm01060; CHECK-SSE-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01061; CHECK-SSE-NEXT:    cvttps2dq %xmm0, %xmm01062; CHECK-SSE-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]1063; CHECK-SSE-NEXT:    pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,2,u,u,u,u,u,u]1064; CHECK-SSE-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1065; CHECK-SSE-NEXT:    psrld $16, %xmm01066; CHECK-SSE-NEXT:    cvtdq2ps %xmm0, %xmm01067; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1068; CHECK-SSE-NEXT:    movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1069; CHECK-SSE-NEXT:    xorps %xmm0, %xmm01070; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload1071; CHECK-SSE-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]1072; CHECK-SSE-NEXT:    cvtdq2ps %xmm1, %xmm01073; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1074; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT1075; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01076; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1077; CHECK-SSE-NEXT:    movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1078; CHECK-SSE-NEXT:    movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1079; CHECK-SSE-NEXT:    # xmm0 = mem[0],zero,zero,zero1080; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT1081; CHECK-SSE-NEXT:    mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01082; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1083; CHECK-SSE-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload1084; CHECK-SSE-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]1085; CHECK-SSE-NEXT:    movdqa %xmm1, %xmm01086; CHECK-SSE-NEXT:    addq $40, %rsp1087; CHECK-SSE-NEXT:    retq1088;1089; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:1090; CHECK-AVX2:       # %bb.0:1091; CHECK-AVX2-NEXT:    subq $56, %rsp1092; CHECK-AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2,2,2,2]1093; CHECK-AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero1094; CHECK-AVX2-NEXT:    vpsllvd %ymm0, %ymm1, %ymm01095; CHECK-AVX2-NEXT:    vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill1096; CHECK-AVX2-NEXT:    vpextrw $2, %xmm0, %eax1097; CHECK-AVX2-NEXT:    vcvtsi2ss %eax, %xmm15, %xmm01098; CHECK-AVX2-NEXT:    vzeroupper1099; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1100; CHECK-AVX2-NEXT:    vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1101; CHECK-AVX2-NEXT:    vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload1102; CHECK-AVX2-NEXT:    vpextrw $0, %xmm0, %eax1103; CHECK-AVX2-NEXT:    vcvtsi2ss %eax, %xmm15, %xmm01104; CHECK-AVX2-NEXT:    vzeroupper1105; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1106; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT1107; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01108; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1109; CHECK-AVX2-NEXT:    vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill1110; CHECK-AVX2-NEXT:    vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1111; CHECK-AVX2-NEXT:    # xmm0 = mem[0],zero,zero,zero1112; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT1113; CHECK-AVX2-NEXT:    vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01114; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1115; CHECK-AVX2-NEXT:    vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload1116; CHECK-AVX2-NEXT:    vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]1117; CHECK-AVX2-NEXT:    addq $56, %rsp1118; CHECK-AVX2-NEXT:    retq1119;1120; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:1121; CHECK-ONLY-AVX512F:       # %bb.0:1122; CHECK-ONLY-AVX512F-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2,2,2,2]1123; CHECK-ONLY-AVX512F-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero1124; CHECK-ONLY-AVX512F-NEXT:    vpsllvd %ymm0, %ymm1, %ymm01125; CHECK-ONLY-AVX512F-NEXT:    vpmovdw %zmm0, %ymm01126; CHECK-ONLY-AVX512F-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero1127; CHECK-ONLY-AVX512F-NEXT:    vcvtdq2ps %ymm0, %ymm01128; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %ymm0, %xmm01129; CHECK-ONLY-AVX512F-NEXT:    vcvtph2ps %xmm0, %ymm01130; CHECK-ONLY-AVX512F-NEXT:    vbroadcastss {{.*#+}} ymm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1]1131; CHECK-ONLY-AVX512F-NEXT:    vmulps %ymm1, %ymm0, %ymm01132; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %ymm0, %xmm01133; CHECK-ONLY-AVX512F-NEXT:    vzeroupper1134; CHECK-ONLY-AVX512F-NEXT:    retq1135;1136; CHECK-SKX-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:1137; CHECK-SKX:       # %bb.0:1138; CHECK-SKX-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2]1139; CHECK-SKX-NEXT:    vpsllvw %xmm0, %xmm1, %xmm01140; CHECK-SKX-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero1141; CHECK-SKX-NEXT:    vcvtdq2ps %ymm0, %ymm01142; CHECK-SKX-NEXT:    vcvtps2ph $4, %ymm0, %xmm01143; CHECK-SKX-NEXT:    vcvtph2ps %xmm0, %ymm01144; CHECK-SKX-NEXT:    vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm01145; CHECK-SKX-NEXT:    vcvtps2ph $4, %ymm0, %xmm01146; CHECK-SKX-NEXT:    vzeroupper1147; CHECK-SKX-NEXT:    retq1148  %shl = shl nsw nuw <2 x i16> <i16 2, i16 2>, %cnt1149  %conv = uitofp <2 x i16> %shl to <2 x half>1150  %mul = fmul <2 x half> <half 15.000000e+00, half 15.000000e+00>, %conv1151  ret <2 x half> %mul1152}1153 1154define double @fmul_pow_shl_cnt_fail_maybe_bad_exp(i64 %cnt) nounwind {1155; CHECK-SSE-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:1156; CHECK-SSE:       # %bb.0:1157; CHECK-SSE-NEXT:    movq %rdi, %rcx1158; CHECK-SSE-NEXT:    movl $1, %eax1159; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $rcx1160; CHECK-SSE-NEXT:    shlq %cl, %rax1161; CHECK-SSE-NEXT:    movq %rax, %xmm11162; CHECK-SSE-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]1163; CHECK-SSE-NEXT:    subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11164; CHECK-SSE-NEXT:    movapd %xmm1, %xmm01165; CHECK-SSE-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]1166; CHECK-SSE-NEXT:    addsd %xmm1, %xmm01167; CHECK-SSE-NEXT:    mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm01168; CHECK-SSE-NEXT:    retq1169;1170; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:1171; CHECK-AVX2:       # %bb.0:1172; CHECK-AVX2-NEXT:    movq %rdi, %rcx1173; CHECK-AVX2-NEXT:    movl $1, %eax1174; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $rcx1175; CHECK-AVX2-NEXT:    shlq %cl, %rax1176; CHECK-AVX2-NEXT:    vmovq %rax, %xmm01177; CHECK-AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]1178; CHECK-AVX2-NEXT:    vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01179; CHECK-AVX2-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]1180; CHECK-AVX2-NEXT:    vaddsd %xmm0, %xmm1, %xmm01181; CHECK-AVX2-NEXT:    vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01182; CHECK-AVX2-NEXT:    retq1183;1184; CHECK-ONLY-AVX512F-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:1185; CHECK-ONLY-AVX512F:       # %bb.0:1186; CHECK-ONLY-AVX512F-NEXT:    movq %rdi, %rcx1187; CHECK-ONLY-AVX512F-NEXT:    movl $1, %eax1188; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $rcx1189; CHECK-ONLY-AVX512F-NEXT:    shlq %cl, %rax1190; CHECK-ONLY-AVX512F-NEXT:    vcvtusi2sd %rax, %xmm15, %xmm01191; CHECK-ONLY-AVX512F-NEXT:    vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01192; CHECK-ONLY-AVX512F-NEXT:    retq1193;1194; CHECK-SKX-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:1195; CHECK-SKX:       # %bb.0:1196; CHECK-SKX-NEXT:    movl $1, %eax1197; CHECK-SKX-NEXT:    shlxq %rdi, %rax, %rax1198; CHECK-SKX-NEXT:    vcvtusi2sd %rax, %xmm15, %xmm01199; CHECK-SKX-NEXT:    vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm01200; CHECK-SKX-NEXT:    retq1201  %shl = shl nuw i64 1, %cnt1202  %conv = uitofp i64 %shl to double1203  %mul = fmul double 9.745314e+288, %conv1204  ret double %mul1205}1206 1207; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set1208; in the original IR.1209define double @fmul_pow_shl_cnt_safe(i16 %cnt) nounwind {1210; CHECK-SSE-LABEL: fmul_pow_shl_cnt_safe:1211; CHECK-SSE:       # %bb.0:1212; CHECK-SSE-NEXT:    movzbl %dil, %eax1213; CHECK-SSE-NEXT:    shlq $52, %rax1214; CHECK-SSE-NEXT:    movabsq $8930638061065157010, %rcx # imm = 0x7BEFFFFFFF5F39921215; CHECK-SSE-NEXT:    addq %rax, %rcx1216; CHECK-SSE-NEXT:    movq %rcx, %xmm01217; CHECK-SSE-NEXT:    retq1218;1219; CHECK-AVX-LABEL: fmul_pow_shl_cnt_safe:1220; CHECK-AVX:       # %bb.0:1221; CHECK-AVX-NEXT:    movzbl %dil, %eax1222; CHECK-AVX-NEXT:    shlq $52, %rax1223; CHECK-AVX-NEXT:    movabsq $8930638061065157010, %rcx # imm = 0x7BEFFFFFFF5F39921224; CHECK-AVX-NEXT:    addq %rax, %rcx1225; CHECK-AVX-NEXT:    vmovq %rcx, %xmm01226; CHECK-AVX-NEXT:    retq1227  %shl = shl nuw i16 1, %cnt1228  %conv = uitofp i16 %shl to double1229  %mul = fmul double 9.745314e+288, %conv1230  ret double %mul1231}1232 1233define <2 x double> @fdiv_pow_shl_cnt_vec(<2 x i64> %cnt) nounwind {1234; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_vec:1235; CHECK-SSE:       # %bb.0:1236; CHECK-SSE-NEXT:    psllq $52, %xmm01237; CHECK-SSE-NEXT:    movdqa {{.*#+}} xmm1 = [4607182418800017408,4607182418800017408]1238; CHECK-SSE-NEXT:    psubq %xmm0, %xmm11239; CHECK-SSE-NEXT:    movdqa %xmm1, %xmm01240; CHECK-SSE-NEXT:    retq1241;1242; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_vec:1243; CHECK-AVX:       # %bb.0:1244; CHECK-AVX-NEXT:    vpsllq $52, %xmm0, %xmm01245; CHECK-AVX-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [4607182418800017408,4607182418800017408]1246; CHECK-AVX-NEXT:    vpsubq %xmm0, %xmm1, %xmm01247; CHECK-AVX-NEXT:    retq1248  %shl = shl nuw <2 x i64> <i64 1, i64 1>, %cnt1249  %conv = uitofp <2 x i64> %shl to <2 x double>1250  %mul = fdiv <2 x double> <double 1.000000e+00, double 1.000000e+00>, %conv1251  ret <2 x double> %mul1252}1253 1254define <2 x float> @fdiv_pow_shl_cnt_vec_with_expensive_cast(<2 x i64> %cnt) nounwind {1255; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_vec_with_expensive_cast:1256; CHECK-SSE:       # %bb.0:1257; CHECK-SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]1258; CHECK-SSE-NEXT:    pslld $23, %xmm11259; CHECK-SSE-NEXT:    movdqa {{.*#+}} xmm0 = [1065353216,1065353216,u,u]1260; CHECK-SSE-NEXT:    psubd %xmm1, %xmm01261; CHECK-SSE-NEXT:    retq1262;1263; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_vec_with_expensive_cast:1264; CHECK-AVX:       # %bb.0:1265; CHECK-AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]1266; CHECK-AVX-NEXT:    vpslld $23, %xmm0, %xmm01267; CHECK-AVX-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [1065353216,1065353216,1065353216,1065353216]1268; CHECK-AVX-NEXT:    vpsubd %xmm0, %xmm1, %xmm01269; CHECK-AVX-NEXT:    retq1270  %shl = shl nuw <2 x i64> <i64 1, i64 1>, %cnt1271  %conv = uitofp <2 x i64> %shl to <2 x float>1272  %mul = fdiv <2 x float> <float 1.000000e+00, float 1.000000e+00>, %conv1273  ret <2 x float> %mul1274}1275 1276define float @fdiv_pow_shl_cnt_fail_maybe_z(i64 %cnt) nounwind {1277; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:1278; CHECK-SSE:       # %bb.0:1279; CHECK-SSE-NEXT:    movq %rdi, %rcx1280; CHECK-SSE-NEXT:    movl $8, %eax1281; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $rcx1282; CHECK-SSE-NEXT:    shlq %cl, %rax1283; CHECK-SSE-NEXT:    testq %rax, %rax1284; CHECK-SSE-NEXT:    js .LBB24_11285; CHECK-SSE-NEXT:  # %bb.2:1286; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm11287; CHECK-SSE-NEXT:    jmp .LBB24_31288; CHECK-SSE-NEXT:  .LBB24_1:1289; CHECK-SSE-NEXT:    shrq %rax1290; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm11291; CHECK-SSE-NEXT:    addss %xmm1, %xmm11292; CHECK-SSE-NEXT:  .LBB24_3:1293; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1294; CHECK-SSE-NEXT:    divss %xmm1, %xmm01295; CHECK-SSE-NEXT:    retq1296;1297; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:1298; CHECK-AVX2:       # %bb.0:1299; CHECK-AVX2-NEXT:    movq %rdi, %rcx1300; CHECK-AVX2-NEXT:    movl $8, %eax1301; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $rcx1302; CHECK-AVX2-NEXT:    shlq %cl, %rax1303; CHECK-AVX2-NEXT:    testq %rax, %rax1304; CHECK-AVX2-NEXT:    js .LBB24_11305; CHECK-AVX2-NEXT:  # %bb.2:1306; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01307; CHECK-AVX2-NEXT:    jmp .LBB24_31308; CHECK-AVX2-NEXT:  .LBB24_1:1309; CHECK-AVX2-NEXT:    shrq %rax1310; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01311; CHECK-AVX2-NEXT:    vaddss %xmm0, %xmm0, %xmm01312; CHECK-AVX2-NEXT:  .LBB24_3:1313; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1314; CHECK-AVX2-NEXT:    vdivss %xmm0, %xmm1, %xmm01315; CHECK-AVX2-NEXT:    retq1316;1317; CHECK-ONLY-AVX512F-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:1318; CHECK-ONLY-AVX512F:       # %bb.0:1319; CHECK-ONLY-AVX512F-NEXT:    movq %rdi, %rcx1320; CHECK-ONLY-AVX512F-NEXT:    movl $8, %eax1321; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $rcx1322; CHECK-ONLY-AVX512F-NEXT:    shlq %cl, %rax1323; CHECK-ONLY-AVX512F-NEXT:    vcvtusi2ss %rax, %xmm15, %xmm01324; CHECK-ONLY-AVX512F-NEXT:    vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1325; CHECK-ONLY-AVX512F-NEXT:    vdivss %xmm0, %xmm1, %xmm01326; CHECK-ONLY-AVX512F-NEXT:    retq1327;1328; CHECK-SKX-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:1329; CHECK-SKX:       # %bb.0:1330; CHECK-SKX-NEXT:    movl $8, %eax1331; CHECK-SKX-NEXT:    shlxq %rdi, %rax, %rax1332; CHECK-SKX-NEXT:    vcvtusi2ss %rax, %xmm15, %xmm01333; CHECK-SKX-NEXT:    vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1334; CHECK-SKX-NEXT:    vdivss %xmm0, %xmm1, %xmm01335; CHECK-SKX-NEXT:    retq1336  %shl = shl i64 8, %cnt1337  %conv = uitofp i64 %shl to float1338  %mul = fdiv float -9.000000e+00, %conv1339  ret float %mul1340}1341 1342define float @fdiv_pow_shl_cnt_fail_neg_int(i64 %cnt) nounwind {1343; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_neg_int:1344; CHECK-SSE:       # %bb.0:1345; CHECK-SSE-NEXT:    movq %rdi, %rcx1346; CHECK-SSE-NEXT:    movl $8, %eax1347; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $rcx1348; CHECK-SSE-NEXT:    shlq %cl, %rax1349; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm11350; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1351; CHECK-SSE-NEXT:    divss %xmm1, %xmm01352; CHECK-SSE-NEXT:    retq1353;1354; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_neg_int:1355; CHECK-AVX2:       # %bb.0:1356; CHECK-AVX2-NEXT:    movq %rdi, %rcx1357; CHECK-AVX2-NEXT:    movl $8, %eax1358; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $rcx1359; CHECK-AVX2-NEXT:    shlq %cl, %rax1360; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01361; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1362; CHECK-AVX2-NEXT:    vdivss %xmm0, %xmm1, %xmm01363; CHECK-AVX2-NEXT:    retq1364;1365; CHECK-ONLY-AVX512F-LABEL: fdiv_pow_shl_cnt_fail_neg_int:1366; CHECK-ONLY-AVX512F:       # %bb.0:1367; CHECK-ONLY-AVX512F-NEXT:    movq %rdi, %rcx1368; CHECK-ONLY-AVX512F-NEXT:    movl $8, %eax1369; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $rcx1370; CHECK-ONLY-AVX512F-NEXT:    shlq %cl, %rax1371; CHECK-ONLY-AVX512F-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01372; CHECK-ONLY-AVX512F-NEXT:    vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1373; CHECK-ONLY-AVX512F-NEXT:    vdivss %xmm0, %xmm1, %xmm01374; CHECK-ONLY-AVX512F-NEXT:    retq1375;1376; CHECK-SKX-LABEL: fdiv_pow_shl_cnt_fail_neg_int:1377; CHECK-SKX:       # %bb.0:1378; CHECK-SKX-NEXT:    movl $8, %eax1379; CHECK-SKX-NEXT:    shlxq %rdi, %rax, %rax1380; CHECK-SKX-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01381; CHECK-SKX-NEXT:    vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]1382; CHECK-SKX-NEXT:    vdivss %xmm0, %xmm1, %xmm01383; CHECK-SKX-NEXT:    retq1384  %shl = shl i64 8, %cnt1385  %conv = sitofp i64 %shl to float1386  %mul = fdiv float -9.000000e+00, %conv1387  ret float %mul1388}1389 1390define float @fdiv_pow_shl_cnt(i64 %cnt_in) nounwind {1391; CHECK-SSE-LABEL: fdiv_pow_shl_cnt:1392; CHECK-SSE:       # %bb.0:1393; CHECK-SSE-NEXT:    andl $31, %edi1394; CHECK-SSE-NEXT:    shll $23, %edi1395; CHECK-SSE-NEXT:    movl $-1115684864, %eax # imm = 0xBD8000001396; CHECK-SSE-NEXT:    subl %edi, %eax1397; CHECK-SSE-NEXT:    movd %eax, %xmm01398; CHECK-SSE-NEXT:    retq1399;1400; CHECK-AVX-LABEL: fdiv_pow_shl_cnt:1401; CHECK-AVX:       # %bb.0:1402; CHECK-AVX-NEXT:    andl $31, %edi1403; CHECK-AVX-NEXT:    shll $23, %edi1404; CHECK-AVX-NEXT:    movl $-1115684864, %eax # imm = 0xBD8000001405; CHECK-AVX-NEXT:    subl %edi, %eax1406; CHECK-AVX-NEXT:    vmovd %eax, %xmm01407; CHECK-AVX-NEXT:    retq1408  %cnt = and i64 %cnt_in, 311409  %shl = shl i64 8, %cnt1410  %conv = sitofp i64 %shl to float1411  %mul = fdiv float -0.500000e+00, %conv1412  ret float %mul1413}1414 1415define half @fdiv_pow_shl_cnt_fail_out_of_bounds(i32 %cnt) nounwind {1416; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:1417; CHECK-SSE:       # %bb.0:1418; CHECK-SSE-NEXT:    pushq %rax1419; CHECK-SSE-NEXT:    movl %edi, %ecx1420; CHECK-SSE-NEXT:    movl $1, %eax1421; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $ecx1422; CHECK-SSE-NEXT:    shll %cl, %eax1423; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm01424; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1425; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT1426; CHECK-SSE-NEXT:    movss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]1427; CHECK-SSE-NEXT:    divss %xmm0, %xmm11428; CHECK-SSE-NEXT:    movaps %xmm1, %xmm01429; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1430; CHECK-SSE-NEXT:    popq %rax1431; CHECK-SSE-NEXT:    retq1432;1433; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:1434; CHECK-AVX2:       # %bb.0:1435; CHECK-AVX2-NEXT:    pushq %rax1436; CHECK-AVX2-NEXT:    movl %edi, %ecx1437; CHECK-AVX2-NEXT:    movl $1, %eax1438; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $ecx1439; CHECK-AVX2-NEXT:    shll %cl, %eax1440; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01441; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1442; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT1443; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]1444; CHECK-AVX2-NEXT:    vdivss %xmm0, %xmm1, %xmm01445; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1446; CHECK-AVX2-NEXT:    popq %rax1447; CHECK-AVX2-NEXT:    retq1448;1449; CHECK-ONLY-AVX512F-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:1450; CHECK-ONLY-AVX512F:       # %bb.0:1451; CHECK-ONLY-AVX512F-NEXT:    movl %edi, %ecx1452; CHECK-ONLY-AVX512F-NEXT:    movl $1, %eax1453; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $ecx1454; CHECK-ONLY-AVX512F-NEXT:    shll %cl, %eax1455; CHECK-ONLY-AVX512F-NEXT:    vcvtusi2ss %eax, %xmm15, %xmm01456; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %xmm0, %xmm01457; CHECK-ONLY-AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm01458; CHECK-ONLY-AVX512F-NEXT:    vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]1459; CHECK-ONLY-AVX512F-NEXT:    vdivss %xmm0, %xmm1, %xmm01460; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %xmm0, %xmm01461; CHECK-ONLY-AVX512F-NEXT:    retq1462;1463; CHECK-SKX-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:1464; CHECK-SKX:       # %bb.0:1465; CHECK-SKX-NEXT:    movl $1, %eax1466; CHECK-SKX-NEXT:    shlxl %edi, %eax, %eax1467; CHECK-SKX-NEXT:    vcvtusi2ss %eax, %xmm15, %xmm01468; CHECK-SKX-NEXT:    vcvtps2ph $4, %xmm0, %xmm01469; CHECK-SKX-NEXT:    vcvtph2ps %xmm0, %xmm01470; CHECK-SKX-NEXT:    vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]1471; CHECK-SKX-NEXT:    vdivss %xmm0, %xmm1, %xmm01472; CHECK-SKX-NEXT:    vcvtps2ph $4, %xmm0, %xmm01473; CHECK-SKX-NEXT:    retq1474  %shl = shl nuw i32 1, %cnt1475  %conv = uitofp i32 %shl to half1476  %mul = fdiv half 0xH7000, %conv1477  ret half %mul1478}1479 1480define half @fdiv_pow_shl_cnt_in_bounds(i16 %cnt) nounwind {1481; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_in_bounds:1482; CHECK-SSE:       # %bb.0:1483; CHECK-SSE-NEXT:    shll $10, %edi1484; CHECK-SSE-NEXT:    movl $28672, %eax # imm = 0x70001485; CHECK-SSE-NEXT:    subl %edi, %eax1486; CHECK-SSE-NEXT:    pinsrw $0, %eax, %xmm01487; CHECK-SSE-NEXT:    retq1488;1489; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_in_bounds:1490; CHECK-AVX:       # %bb.0:1491; CHECK-AVX-NEXT:    shll $10, %edi1492; CHECK-AVX-NEXT:    movl $28672, %eax # imm = 0x70001493; CHECK-AVX-NEXT:    subl %edi, %eax1494; CHECK-AVX-NEXT:    vpinsrw $0, %eax, %xmm0, %xmm01495; CHECK-AVX-NEXT:    retq1496  %shl = shl nuw i16 1, %cnt1497  %conv = uitofp i16 %shl to half1498  %mul = fdiv half 0xH7000, %conv1499  ret half %mul1500}1501 1502define half @fdiv_pow_shl_cnt_in_bounds2(i16 %cnt) nounwind {1503; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_in_bounds2:1504; CHECK-SSE:       # %bb.0:1505; CHECK-SSE-NEXT:    shll $10, %edi1506; CHECK-SSE-NEXT:    movl $18432, %eax # imm = 0x48001507; CHECK-SSE-NEXT:    subl %edi, %eax1508; CHECK-SSE-NEXT:    pinsrw $0, %eax, %xmm01509; CHECK-SSE-NEXT:    retq1510;1511; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_in_bounds2:1512; CHECK-AVX:       # %bb.0:1513; CHECK-AVX-NEXT:    shll $10, %edi1514; CHECK-AVX-NEXT:    movl $18432, %eax # imm = 0x48001515; CHECK-AVX-NEXT:    subl %edi, %eax1516; CHECK-AVX-NEXT:    vpinsrw $0, %eax, %xmm0, %xmm01517; CHECK-AVX-NEXT:    retq1518  %shl = shl nuw i16 1, %cnt1519  %conv = uitofp i16 %shl to half1520  %mul = fdiv half 0xH4800, %conv1521  ret half %mul1522}1523 1524define half @fdiv_pow_shl_cnt_fail_out_of_bound2(i16 %cnt) nounwind {1525; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:1526; CHECK-SSE:       # %bb.0:1527; CHECK-SSE-NEXT:    pushq %rax1528; CHECK-SSE-NEXT:    movl %edi, %ecx1529; CHECK-SSE-NEXT:    movl $1, %eax1530; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $ecx1531; CHECK-SSE-NEXT:    shll %cl, %eax1532; CHECK-SSE-NEXT:    movzwl %ax, %eax1533; CHECK-SSE-NEXT:    cvtsi2ss %eax, %xmm01534; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1535; CHECK-SSE-NEXT:    callq __extendhfsf2@PLT1536; CHECK-SSE-NEXT:    movss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]1537; CHECK-SSE-NEXT:    divss %xmm0, %xmm11538; CHECK-SSE-NEXT:    movaps %xmm1, %xmm01539; CHECK-SSE-NEXT:    callq __truncsfhf2@PLT1540; CHECK-SSE-NEXT:    popq %rax1541; CHECK-SSE-NEXT:    retq1542;1543; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:1544; CHECK-AVX2:       # %bb.0:1545; CHECK-AVX2-NEXT:    pushq %rax1546; CHECK-AVX2-NEXT:    movl %edi, %ecx1547; CHECK-AVX2-NEXT:    movl $1, %eax1548; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $ecx1549; CHECK-AVX2-NEXT:    shll %cl, %eax1550; CHECK-AVX2-NEXT:    movzwl %ax, %eax1551; CHECK-AVX2-NEXT:    vcvtsi2ss %eax, %xmm15, %xmm01552; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1553; CHECK-AVX2-NEXT:    callq __extendhfsf2@PLT1554; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]1555; CHECK-AVX2-NEXT:    vdivss %xmm0, %xmm1, %xmm01556; CHECK-AVX2-NEXT:    callq __truncsfhf2@PLT1557; CHECK-AVX2-NEXT:    popq %rax1558; CHECK-AVX2-NEXT:    retq1559;1560; CHECK-ONLY-AVX512F-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:1561; CHECK-ONLY-AVX512F:       # %bb.0:1562; CHECK-ONLY-AVX512F-NEXT:    movl %edi, %ecx1563; CHECK-ONLY-AVX512F-NEXT:    movl $1, %eax1564; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $ecx1565; CHECK-ONLY-AVX512F-NEXT:    shll %cl, %eax1566; CHECK-ONLY-AVX512F-NEXT:    movzwl %ax, %eax1567; CHECK-ONLY-AVX512F-NEXT:    vcvtsi2ss %eax, %xmm15, %xmm01568; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %xmm0, %xmm01569; CHECK-ONLY-AVX512F-NEXT:    vcvtph2ps %xmm0, %xmm01570; CHECK-ONLY-AVX512F-NEXT:    vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]1571; CHECK-ONLY-AVX512F-NEXT:    vdivss %xmm0, %xmm1, %xmm01572; CHECK-ONLY-AVX512F-NEXT:    vcvtps2ph $4, %xmm0, %xmm01573; CHECK-ONLY-AVX512F-NEXT:    retq1574;1575; CHECK-SKX-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:1576; CHECK-SKX:       # %bb.0:1577; CHECK-SKX-NEXT:    movl $1, %eax1578; CHECK-SKX-NEXT:    shlxl %edi, %eax, %eax1579; CHECK-SKX-NEXT:    movzwl %ax, %eax1580; CHECK-SKX-NEXT:    vcvtsi2ss %eax, %xmm15, %xmm01581; CHECK-SKX-NEXT:    vcvtps2ph $4, %xmm0, %xmm01582; CHECK-SKX-NEXT:    vcvtph2ps %xmm0, %xmm01583; CHECK-SKX-NEXT:    vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]1584; CHECK-SKX-NEXT:    vdivss %xmm0, %xmm1, %xmm01585; CHECK-SKX-NEXT:    vcvtps2ph $4, %xmm0, %xmm01586; CHECK-SKX-NEXT:    retq1587  %shl = shl nuw i16 1, %cnt1588  %conv = uitofp i16 %shl to half1589  %mul = fdiv half 0xH4000, %conv1590  ret half %mul1591}1592 1593; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set1594; in the original IR.1595define double @fdiv_pow_shl_cnt32_to_dbl_okay(i32 %cnt) nounwind {1596; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_to_dbl_okay:1597; CHECK-SSE:       # %bb.0:1598; CHECK-SSE-NEXT:    movzbl %dil, %eax1599; CHECK-SSE-NEXT:    shlq $52, %rax1600; CHECK-SSE-NEXT:    movabsq $3936146074321813504, %rcx # imm = 0x36A00000000000001601; CHECK-SSE-NEXT:    subq %rax, %rcx1602; CHECK-SSE-NEXT:    movq %rcx, %xmm01603; CHECK-SSE-NEXT:    retq1604;1605; CHECK-AVX-LABEL: fdiv_pow_shl_cnt32_to_dbl_okay:1606; CHECK-AVX:       # %bb.0:1607; CHECK-AVX-NEXT:    movzbl %dil, %eax1608; CHECK-AVX-NEXT:    shlq $52, %rax1609; CHECK-AVX-NEXT:    movabsq $3936146074321813504, %rcx # imm = 0x36A00000000000001610; CHECK-AVX-NEXT:    subq %rax, %rcx1611; CHECK-AVX-NEXT:    vmovq %rcx, %xmm01612; CHECK-AVX-NEXT:    retq1613  %shl = shl nuw i32 1, %cnt1614  %conv = uitofp i32 %shl to double1615  %mul = fdiv double 0x36A0000000000000, %conv1616  ret double %mul1617}1618 1619define float @fdiv_pow_shl_cnt32_out_of_bounds2(i32 %cnt) nounwind {1620; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:1621; CHECK-SSE:       # %bb.0:1622; CHECK-SSE-NEXT:    movl %edi, %ecx1623; CHECK-SSE-NEXT:    movl $1, %eax1624; CHECK-SSE-NEXT:    # kill: def $cl killed $cl killed $ecx1625; CHECK-SSE-NEXT:    shll %cl, %eax1626; CHECK-SSE-NEXT:    cvtsi2ss %rax, %xmm11627; CHECK-SSE-NEXT:    movss {{.*#+}} xmm0 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]1628; CHECK-SSE-NEXT:    divss %xmm1, %xmm01629; CHECK-SSE-NEXT:    retq1630;1631; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:1632; CHECK-AVX2:       # %bb.0:1633; CHECK-AVX2-NEXT:    movl %edi, %ecx1634; CHECK-AVX2-NEXT:    movl $1, %eax1635; CHECK-AVX2-NEXT:    # kill: def $cl killed $cl killed $ecx1636; CHECK-AVX2-NEXT:    shll %cl, %eax1637; CHECK-AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm01638; CHECK-AVX2-NEXT:    vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]1639; CHECK-AVX2-NEXT:    vdivss %xmm0, %xmm1, %xmm01640; CHECK-AVX2-NEXT:    retq1641;1642; CHECK-ONLY-AVX512F-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:1643; CHECK-ONLY-AVX512F:       # %bb.0:1644; CHECK-ONLY-AVX512F-NEXT:    movl %edi, %ecx1645; CHECK-ONLY-AVX512F-NEXT:    movl $1, %eax1646; CHECK-ONLY-AVX512F-NEXT:    # kill: def $cl killed $cl killed $ecx1647; CHECK-ONLY-AVX512F-NEXT:    shll %cl, %eax1648; CHECK-ONLY-AVX512F-NEXT:    vcvtusi2ss %eax, %xmm15, %xmm01649; CHECK-ONLY-AVX512F-NEXT:    vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]1650; CHECK-ONLY-AVX512F-NEXT:    vdivss %xmm0, %xmm1, %xmm01651; CHECK-ONLY-AVX512F-NEXT:    retq1652;1653; CHECK-SKX-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:1654; CHECK-SKX:       # %bb.0:1655; CHECK-SKX-NEXT:    movl $1, %eax1656; CHECK-SKX-NEXT:    shlxl %edi, %eax, %eax1657; CHECK-SKX-NEXT:    vcvtusi2ss %eax, %xmm15, %xmm01658; CHECK-SKX-NEXT:    vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]1659; CHECK-SKX-NEXT:    vdivss %xmm0, %xmm1, %xmm01660; CHECK-SKX-NEXT:    retq1661  %shl = shl nuw i32 1, %cnt1662  %conv = uitofp i32 %shl to float1663  %mul = fdiv float 0x3a1fffff00000000, %conv1664  ret float %mul1665}1666 1667; FIXME: The movzbl is unnecessary. It would be UB for the upper bits to be set1668; in the original IR.1669define float @fdiv_pow_shl_cnt32_okay(i32 %cnt) nounwind {1670; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_okay:1671; CHECK-SSE:       # %bb.0:1672; CHECK-SSE-NEXT:    movzbl %dil, %eax1673; CHECK-SSE-NEXT:    shll $23, %eax1674; CHECK-SSE-NEXT:    movl $285212672, %ecx # imm = 0x110000001675; CHECK-SSE-NEXT:    subl %eax, %ecx1676; CHECK-SSE-NEXT:    movd %ecx, %xmm01677; CHECK-SSE-NEXT:    retq1678;1679; CHECK-AVX-LABEL: fdiv_pow_shl_cnt32_okay:1680; CHECK-AVX:       # %bb.0:1681; CHECK-AVX-NEXT:    movzbl %dil, %eax1682; CHECK-AVX-NEXT:    shll $23, %eax1683; CHECK-AVX-NEXT:    movl $285212672, %ecx # imm = 0x110000001684; CHECK-AVX-NEXT:    subl %eax, %ecx1685; CHECK-AVX-NEXT:    vmovd %ecx, %xmm01686; CHECK-AVX-NEXT:    retq1687  %shl = shl nuw i32 1, %cnt1688  %conv = uitofp i32 %shl to float1689  %mul = fdiv float 0x3a20000000000000, %conv1690  ret float %mul1691}1692 1693define x86_fp80 @pr128528(i1 %cond) {1694; CHECK-SSE-LABEL: pr128528:1695; CHECK-SSE:       # %bb.0:1696; CHECK-SSE-NEXT:    testb $1, %dil1697; CHECK-SSE-NEXT:    movl $8, %eax1698; CHECK-SSE-NEXT:    movl $1, %ecx1699; CHECK-SSE-NEXT:    cmovnel %eax, %ecx1700; CHECK-SSE-NEXT:    movl %ecx, -{{[0-9]+}}(%rsp)1701; CHECK-SSE-NEXT:    fildl -{{[0-9]+}}(%rsp)1702; CHECK-SSE-NEXT:    fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)1703; CHECK-SSE-NEXT:    retq1704;1705; CHECK-AVX-LABEL: pr128528:1706; CHECK-AVX:       # %bb.0:1707; CHECK-AVX-NEXT:    testb $1, %dil1708; CHECK-AVX-NEXT:    movl $8, %eax1709; CHECK-AVX-NEXT:    movl $1, %ecx1710; CHECK-AVX-NEXT:    cmovnel %eax, %ecx1711; CHECK-AVX-NEXT:    movl %ecx, -{{[0-9]+}}(%rsp)1712; CHECK-AVX-NEXT:    fildl -{{[0-9]+}}(%rsp)1713; CHECK-AVX-NEXT:    fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)1714; CHECK-AVX-NEXT:    retq1715  %sub9 = select i1 %cond, i32 8, i32 11716  %conv = uitofp i32 %sub9 to x86_fp801717  %mul = fmul x86_fp80 %conv, 0xK4007D0555555555558001718  ret x86_fp80 %mul1719}1720