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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s3 4; rdar://127211745; We should not fold movss into pshufd since pshufd expects m128 while movss6; loads from m32.7define void @sample_test(ptr %source, ptr %dest) nounwind {8; CHECK-LABEL: sample_test:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: subq $24, %rsp11; CHECK-NEXT: movq %rdi, {{[0-9]+}}(%rsp)12; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp)13; CHECK-NEXT: movq $0, (%rsp)14; CHECK-NEXT: xorps %xmm0, %xmm015; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]16; CHECK-NEXT: movlps %xmm0, (%rsp)17; CHECK-NEXT: movlps %xmm0, (%rsi)18; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax19; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero20; CHECK-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]21; CHECK-NEXT: callq ext@PLT22; CHECK-NEXT: addq $24, %rsp23; CHECK-NEXT: retq24entry:25 %source.addr = alloca ptr, align 826 %dest.addr = alloca ptr, align 827 %tmp = alloca <2 x float>, align 828 store ptr %source, ptr %source.addr, align 829 store ptr %dest, ptr %dest.addr, align 830 store <2 x float> zeroinitializer, ptr %tmp, align 831 %0 = load ptr, ptr %source.addr, align 832 %1 = load <4 x float>, ptr %0, align 1633 %2 = extractelement <4 x float> %1, i32 034 %3 = load <2 x float>, ptr %tmp, align 835 %4 = insertelement <2 x float> %3, float %2, i32 136 store <2 x float> %4, ptr %tmp, align 837 %5 = load <2 x float>, ptr %tmp, align 838 %6 = load ptr, ptr %dest.addr, align 839 store <2 x float> %5, ptr %6, align 840 %7 = load ptr, ptr %dest.addr, align 841 %8 = load <2 x float>, ptr %7, align 842 %vecext = extractelement <2 x float> %8, i32 043 %9 = load ptr, ptr %dest.addr, align 844 %10 = load <2 x float>, ptr %9, align 845 %vecext4 = extractelement <2 x float> %10, i32 146 call void @ext(float %vecext, float %vecext4)47 ret void48}49declare void @ext(float, float)50