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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=X644 5; Verify that the backend correctly folds a sign/zero extend of a vector where6; elements are all constant values or UNDEFs.7; The backend should be able to optimize all the test functions below into8; simple loads from constant pool of the result. That is because the resulting9; vector should be known at static time.10 11define <4 x i16> @test_sext_4i8_4i16() {12; X86-LABEL: test_sext_4i8_4i16:13; X86: # %bb.0:14; X86-NEXT: vmovsd {{.*#+}} xmm0 = [0,65535,2,65533,0,0,0,0]15; X86-NEXT: retl16;17; X64-LABEL: test_sext_4i8_4i16:18; X64: # %bb.0:19; X64-NEXT: vmovsd {{.*#+}} xmm0 = [0,65535,2,65533,0,0,0,0]20; X64-NEXT: retq21 %1 = insertelement <4 x i8> undef, i8 0, i32 022 %2 = insertelement <4 x i8> %1, i8 -1, i32 123 %3 = insertelement <4 x i8> %2, i8 2, i32 224 %4 = insertelement <4 x i8> %3, i8 -3, i32 325 %5 = sext <4 x i8> %4 to <4 x i16>26 ret <4 x i16> %527}28 29define <4 x i16> @test_sext_4i8_4i16_undef() {30; X86-LABEL: test_sext_4i8_4i16_undef:31; X86: # %bb.0:32; X86-NEXT: vmovsd {{.*#+}} xmm0 = [0,65535,0,65533,0,0,0,0]33; X86-NEXT: retl34;35; X64-LABEL: test_sext_4i8_4i16_undef:36; X64: # %bb.0:37; X64-NEXT: vmovsd {{.*#+}} xmm0 = [0,65535,0,65533,0,0,0,0]38; X64-NEXT: retq39 %1 = insertelement <4 x i8> undef, i8 undef, i32 040 %2 = insertelement <4 x i8> %1, i8 -1, i32 141 %3 = insertelement <4 x i8> %2, i8 undef, i32 242 %4 = insertelement <4 x i8> %3, i8 -3, i32 343 %5 = sext <4 x i8> %4 to <4 x i16>44 ret <4 x i16> %545}46 47define <4 x i32> @test_sext_4i8_4i32() {48; X86-LABEL: test_sext_4i8_4i32:49; X86: # %bb.0:50; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,2,4294967293]51; X86-NEXT: retl52;53; X64-LABEL: test_sext_4i8_4i32:54; X64: # %bb.0:55; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,2,4294967293]56; X64-NEXT: retq57 %1 = insertelement <4 x i8> undef, i8 0, i32 058 %2 = insertelement <4 x i8> %1, i8 -1, i32 159 %3 = insertelement <4 x i8> %2, i8 2, i32 260 %4 = insertelement <4 x i8> %3, i8 -3, i32 361 %5 = sext <4 x i8> %4 to <4 x i32>62 ret <4 x i32> %563}64 65define <4 x i32> @test_sext_4i8_4i32_undef() {66; X86-LABEL: test_sext_4i8_4i32_undef:67; X86: # %bb.0:68; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,0,4294967293]69; X86-NEXT: retl70;71; X64-LABEL: test_sext_4i8_4i32_undef:72; X64: # %bb.0:73; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,0,4294967293]74; X64-NEXT: retq75 %1 = insertelement <4 x i8> undef, i8 undef, i32 076 %2 = insertelement <4 x i8> %1, i8 -1, i32 177 %3 = insertelement <4 x i8> %2, i8 undef, i32 278 %4 = insertelement <4 x i8> %3, i8 -3, i32 379 %5 = sext <4 x i8> %4 to <4 x i32>80 ret <4 x i32> %581}82 83define <4 x i64> @test_sext_4i8_4i64() {84; X86-LABEL: test_sext_4i8_4i64:85; X86: # %bb.0:86; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,4294967295,4294967295,2,0,4294967293,4294967295]87; X86-NEXT: retl88;89; X64-LABEL: test_sext_4i8_4i64:90; X64: # %bb.0:91; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,18446744073709551615,2,18446744073709551613]92; X64-NEXT: retq93 %1 = insertelement <4 x i8> undef, i8 0, i32 094 %2 = insertelement <4 x i8> %1, i8 -1, i32 195 %3 = insertelement <4 x i8> %2, i8 2, i32 296 %4 = insertelement <4 x i8> %3, i8 -3, i32 397 %5 = sext <4 x i8> %4 to <4 x i64>98 ret <4 x i64> %599}100 101define <4 x i64> @test_sext_4i8_4i64_undef() {102; X86-LABEL: test_sext_4i8_4i64_undef:103; X86: # %bb.0:104; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,4294967295,4294967295,0,0,4294967293,4294967295]105; X86-NEXT: retl106;107; X64-LABEL: test_sext_4i8_4i64_undef:108; X64: # %bb.0:109; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,18446744073709551615,0,18446744073709551613]110; X64-NEXT: retq111 %1 = insertelement <4 x i8> undef, i8 undef, i32 0112 %2 = insertelement <4 x i8> %1, i8 -1, i32 1113 %3 = insertelement <4 x i8> %2, i8 undef, i32 2114 %4 = insertelement <4 x i8> %3, i8 -3, i32 3115 %5 = sext <4 x i8> %4 to <4 x i64>116 ret <4 x i64> %5117}118 119define <8 x i16> @test_sext_8i8_8i16() {120; X86-LABEL: test_sext_8i8_8i16:121; X86: # %bb.0:122; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,65535,2,65533,4,65531,6,65529]123; X86-NEXT: retl124;125; X64-LABEL: test_sext_8i8_8i16:126; X64: # %bb.0:127; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,65535,2,65533,4,65531,6,65529]128; X64-NEXT: retq129 %1 = insertelement <8 x i8> undef, i8 0, i32 0130 %2 = insertelement <8 x i8> %1, i8 -1, i32 1131 %3 = insertelement <8 x i8> %2, i8 2, i32 2132 %4 = insertelement <8 x i8> %3, i8 -3, i32 3133 %5 = insertelement <8 x i8> %4, i8 4, i32 4134 %6 = insertelement <8 x i8> %5, i8 -5, i32 5135 %7 = insertelement <8 x i8> %6, i8 6, i32 6136 %8 = insertelement <8 x i8> %7, i8 -7, i32 7137 %9 = sext <8 x i8> %8 to <8 x i16>138 ret <8 x i16> %9139}140 141define <8 x i32> @test_sext_8i8_8i32() {142; X86-LABEL: test_sext_8i8_8i32:143; X86: # %bb.0:144; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,4294967295,2,4294967293,4,4294967291,6,4294967289]145; X86-NEXT: retl146;147; X64-LABEL: test_sext_8i8_8i32:148; X64: # %bb.0:149; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,4294967295,2,4294967293,4,4294967291,6,4294967289]150; X64-NEXT: retq151 %1 = insertelement <8 x i8> undef, i8 0, i32 0152 %2 = insertelement <8 x i8> %1, i8 -1, i32 1153 %3 = insertelement <8 x i8> %2, i8 2, i32 2154 %4 = insertelement <8 x i8> %3, i8 -3, i32 3155 %5 = insertelement <8 x i8> %4, i8 4, i32 4156 %6 = insertelement <8 x i8> %5, i8 -5, i32 5157 %7 = insertelement <8 x i8> %6, i8 6, i32 6158 %8 = insertelement <8 x i8> %7, i8 -7, i32 7159 %9 = sext <8 x i8> %8 to <8 x i32>160 ret <8 x i32> %9161}162 163define <8 x i16> @test_sext_8i8_8i16_undef() {164; X86-LABEL: test_sext_8i8_8i16_undef:165; X86: # %bb.0:166; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,65535,0,65533,0,65531,0,65529]167; X86-NEXT: retl168;169; X64-LABEL: test_sext_8i8_8i16_undef:170; X64: # %bb.0:171; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,65535,0,65533,0,65531,0,65529]172; X64-NEXT: retq173 %1 = insertelement <8 x i8> undef, i8 undef, i32 0174 %2 = insertelement <8 x i8> %1, i8 -1, i32 1175 %3 = insertelement <8 x i8> %2, i8 undef, i32 2176 %4 = insertelement <8 x i8> %3, i8 -3, i32 3177 %5 = insertelement <8 x i8> %4, i8 undef, i32 4178 %6 = insertelement <8 x i8> %5, i8 -5, i32 5179 %7 = insertelement <8 x i8> %6, i8 undef, i32 6180 %8 = insertelement <8 x i8> %7, i8 -7, i32 7181 %9 = sext <8 x i8> %8 to <8 x i16>182 ret <8 x i16> %9183}184 185define <8 x i32> @test_sext_8i8_8i32_undef() {186; X86-LABEL: test_sext_8i8_8i32_undef:187; X86: # %bb.0:188; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,2,0,4,0,6,0]189; X86-NEXT: retl190;191; X64-LABEL: test_sext_8i8_8i32_undef:192; X64: # %bb.0:193; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,2,0,4,0,6,0]194; X64-NEXT: retq195 %1 = insertelement <8 x i8> undef, i8 0, i32 0196 %2 = insertelement <8 x i8> %1, i8 undef, i32 1197 %3 = insertelement <8 x i8> %2, i8 2, i32 2198 %4 = insertelement <8 x i8> %3, i8 undef, i32 3199 %5 = insertelement <8 x i8> %4, i8 4, i32 4200 %6 = insertelement <8 x i8> %5, i8 undef, i32 5201 %7 = insertelement <8 x i8> %6, i8 6, i32 6202 %8 = insertelement <8 x i8> %7, i8 undef, i32 7203 %9 = sext <8 x i8> %8 to <8 x i32>204 ret <8 x i32> %9205}206 207define <4 x i16> @test_zext_4i8_4i16() {208; X86-LABEL: test_zext_4i8_4i16:209; X86: # %bb.0:210; X86-NEXT: vmovsd {{.*#+}} xmm0 = [0,255,2,253,0,0,0,0]211; X86-NEXT: retl212;213; X64-LABEL: test_zext_4i8_4i16:214; X64: # %bb.0:215; X64-NEXT: vmovsd {{.*#+}} xmm0 = [0,255,2,253,0,0,0,0]216; X64-NEXT: retq217 %1 = insertelement <4 x i8> undef, i8 0, i32 0218 %2 = insertelement <4 x i8> %1, i8 -1, i32 1219 %3 = insertelement <4 x i8> %2, i8 2, i32 2220 %4 = insertelement <4 x i8> %3, i8 -3, i32 3221 %5 = zext <4 x i8> %4 to <4 x i16>222 ret <4 x i16> %5223}224 225define <4 x i32> @test_zext_4i8_4i32() {226; X86-LABEL: test_zext_4i8_4i32:227; X86: # %bb.0:228; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,255,2,253]229; X86-NEXT: retl230;231; X64-LABEL: test_zext_4i8_4i32:232; X64: # %bb.0:233; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,255,2,253]234; X64-NEXT: retq235 %1 = insertelement <4 x i8> undef, i8 0, i32 0236 %2 = insertelement <4 x i8> %1, i8 -1, i32 1237 %3 = insertelement <4 x i8> %2, i8 2, i32 2238 %4 = insertelement <4 x i8> %3, i8 -3, i32 3239 %5 = zext <4 x i8> %4 to <4 x i32>240 ret <4 x i32> %5241}242 243define <4 x i64> @test_zext_4i8_4i64() {244; X86-LABEL: test_zext_4i8_4i64:245; X86: # %bb.0:246; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,255,0,2,0,253,0]247; X86-NEXT: retl248;249; X64-LABEL: test_zext_4i8_4i64:250; X64: # %bb.0:251; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,255,2,253]252; X64-NEXT: retq253 %1 = insertelement <4 x i8> undef, i8 0, i32 0254 %2 = insertelement <4 x i8> %1, i8 -1, i32 1255 %3 = insertelement <4 x i8> %2, i8 2, i32 2256 %4 = insertelement <4 x i8> %3, i8 -3, i32 3257 %5 = zext <4 x i8> %4 to <4 x i64>258 ret <4 x i64> %5259}260 261define <4 x i16> @test_zext_4i8_4i16_undef() {262; X86-LABEL: test_zext_4i8_4i16_undef:263; X86: # %bb.0:264; X86-NEXT: vmovsd {{.*#+}} xmm0 = [0,255,0,253,0,0,0,0]265; X86-NEXT: retl266;267; X64-LABEL: test_zext_4i8_4i16_undef:268; X64: # %bb.0:269; X64-NEXT: vmovsd {{.*#+}} xmm0 = [0,255,0,253,0,0,0,0]270; X64-NEXT: retq271 %1 = insertelement <4 x i8> undef, i8 undef, i32 0272 %2 = insertelement <4 x i8> %1, i8 -1, i32 1273 %3 = insertelement <4 x i8> %2, i8 undef, i32 2274 %4 = insertelement <4 x i8> %3, i8 -3, i32 3275 %5 = zext <4 x i8> %4 to <4 x i16>276 ret <4 x i16> %5277}278 279define <4 x i32> @test_zext_4i8_4i32_undef() {280; X86-LABEL: test_zext_4i8_4i32_undef:281; X86: # %bb.0:282; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,0,2,0]283; X86-NEXT: retl284;285; X64-LABEL: test_zext_4i8_4i32_undef:286; X64: # %bb.0:287; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,0,2,0]288; X64-NEXT: retq289 %1 = insertelement <4 x i8> undef, i8 0, i32 0290 %2 = insertelement <4 x i8> %1, i8 undef, i32 1291 %3 = insertelement <4 x i8> %2, i8 2, i32 2292 %4 = insertelement <4 x i8> %3, i8 undef, i32 3293 %5 = zext <4 x i8> %4 to <4 x i32>294 ret <4 x i32> %5295}296 297define <4 x i64> @test_zext_4i8_4i64_undef() {298; X86-LABEL: test_zext_4i8_4i64_undef:299; X86: # %bb.0:300; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,255,0,2,0,0,0]301; X86-NEXT: retl302;303; X64-LABEL: test_zext_4i8_4i64_undef:304; X64: # %bb.0:305; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,255,2,0]306; X64-NEXT: retq307 %1 = insertelement <4 x i8> undef, i8 undef, i32 0308 %2 = insertelement <4 x i8> %1, i8 -1, i32 1309 %3 = insertelement <4 x i8> %2, i8 2, i32 2310 %4 = insertelement <4 x i8> %3, i8 undef, i32 3311 %5 = zext <4 x i8> %4 to <4 x i64>312 ret <4 x i64> %5313}314 315define <8 x i16> @test_zext_8i8_8i16() {316; X86-LABEL: test_zext_8i8_8i16:317; X86: # %bb.0:318; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,255,2,253,4,251,6,249]319; X86-NEXT: retl320;321; X64-LABEL: test_zext_8i8_8i16:322; X64: # %bb.0:323; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,255,2,253,4,251,6,249]324; X64-NEXT: retq325 %1 = insertelement <8 x i8> undef, i8 0, i32 0326 %2 = insertelement <8 x i8> %1, i8 -1, i32 1327 %3 = insertelement <8 x i8> %2, i8 2, i32 2328 %4 = insertelement <8 x i8> %3, i8 -3, i32 3329 %5 = insertelement <8 x i8> %4, i8 4, i32 4330 %6 = insertelement <8 x i8> %5, i8 -5, i32 5331 %7 = insertelement <8 x i8> %6, i8 6, i32 6332 %8 = insertelement <8 x i8> %7, i8 -7, i32 7333 %9 = zext <8 x i8> %8 to <8 x i16>334 ret <8 x i16> %9335}336 337define <8 x i32> @test_zext_8i8_8i32() {338; X86-LABEL: test_zext_8i8_8i32:339; X86: # %bb.0:340; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,255,2,253,4,251,6,249]341; X86-NEXT: retl342;343; X64-LABEL: test_zext_8i8_8i32:344; X64: # %bb.0:345; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,255,2,253,4,251,6,249]346; X64-NEXT: retq347 %1 = insertelement <8 x i8> undef, i8 0, i32 0348 %2 = insertelement <8 x i8> %1, i8 -1, i32 1349 %3 = insertelement <8 x i8> %2, i8 2, i32 2350 %4 = insertelement <8 x i8> %3, i8 -3, i32 3351 %5 = insertelement <8 x i8> %4, i8 4, i32 4352 %6 = insertelement <8 x i8> %5, i8 -5, i32 5353 %7 = insertelement <8 x i8> %6, i8 6, i32 6354 %8 = insertelement <8 x i8> %7, i8 -7, i32 7355 %9 = zext <8 x i8> %8 to <8 x i32>356 ret <8 x i32> %9357}358 359define <8 x i16> @test_zext_8i8_8i16_undef() {360; X86-LABEL: test_zext_8i8_8i16_undef:361; X86: # %bb.0:362; X86-NEXT: vmovaps {{.*#+}} xmm0 = [0,255,0,253,0,251,0,249]363; X86-NEXT: retl364;365; X64-LABEL: test_zext_8i8_8i16_undef:366; X64: # %bb.0:367; X64-NEXT: vmovaps {{.*#+}} xmm0 = [0,255,0,253,0,251,0,249]368; X64-NEXT: retq369 %1 = insertelement <8 x i8> undef, i8 undef, i32 0370 %2 = insertelement <8 x i8> %1, i8 -1, i32 1371 %3 = insertelement <8 x i8> %2, i8 undef, i32 2372 %4 = insertelement <8 x i8> %3, i8 -3, i32 3373 %5 = insertelement <8 x i8> %4, i8 undef, i32 4374 %6 = insertelement <8 x i8> %5, i8 -5, i32 5375 %7 = insertelement <8 x i8> %6, i8 undef, i32 6376 %8 = insertelement <8 x i8> %7, i8 -7, i32 7377 %9 = zext <8 x i8> %8 to <8 x i16>378 ret <8 x i16> %9379}380 381define <8 x i32> @test_zext_8i8_8i32_undef() {382; X86-LABEL: test_zext_8i8_8i32_undef:383; X86: # %bb.0:384; X86-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,2,253,4,0,6,0]385; X86-NEXT: retl386;387; X64-LABEL: test_zext_8i8_8i32_undef:388; X64: # %bb.0:389; X64-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,2,253,4,0,6,0]390; X64-NEXT: retq391 %1 = insertelement <8 x i8> undef, i8 0, i32 0392 %2 = insertelement <8 x i8> %1, i8 undef, i32 1393 %3 = insertelement <8 x i8> %2, i8 2, i32 2394 %4 = insertelement <8 x i8> %3, i8 -3, i32 3395 %5 = insertelement <8 x i8> %4, i8 4, i32 4396 %6 = insertelement <8 x i8> %5, i8 undef, i32 5397 %7 = insertelement <8 x i8> %6, i8 6, i32 6398 %8 = insertelement <8 x i8> %7, i8 undef, i32 7399 %9 = zext <8 x i8> %8 to <8 x i32>400 ret <8 x i32> %9401}402