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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=x86_64-- -run-pass=peephole-opt %s -o - | FileCheck %s3--- |4 define void @foldImmediate() { ret void }5...6---7# Check that immediates can be folded into ALU instructions.8name: foldImmediate9registers:10 - { id: 0, class: gr32 }11 - { id: 1, class: gr32 }12 - { id: 2, class: gr32 }13 - { id: 3, class: gr32 }14 - { id: 4, class: gr32 }15 - { id: 5, class: gr32 }16 - { id: 6, class: gr32 }17 - { id: 7, class: gr64 }18 - { id: 8, class: gr64 }19 - { id: 9, class: gr64 }20 - { id: 10, class: gr64 }21 - { id: 11, class: gr64 }22 - { id: 12, class: gr64 }23 - { id: 13, class: gr64 }24 - { id: 14, class: gr64 }25 - { id: 15, class: gr64 }26 - { id: 16, class: gr32 }27 - { id: 17, class: gr64 }28 - { id: 18, class: gr32 }29 30body: |31 bb.0:32 liveins: $rdi, $rsi33 34 ; CHECK-LABEL: name: foldImmediate35 ; CHECK: liveins: $rdi, $rsi36 ; CHECK-NEXT: {{ $}}37 ; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 8138 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi39 ; CHECK-NEXT: [[ADD32ri:%[0-9]+]]:gr32 = ADD32ri [[COPY]], 81, implicit-def $eflags40 ; CHECK-NEXT: NOOP implicit [[ADD32ri]]41 ; CHECK-NEXT: [[SUB32ri:%[0-9]+]]:gr32 = SUB32ri [[COPY]], 81, implicit-def $eflags42 ; CHECK-NEXT: NOOP implicit [[SUB32ri]]43 ; CHECK-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[COPY]], 81, implicit-def $eflags44 ; CHECK-NEXT: NOOP implicit [[AND32ri]]45 ; CHECK-NEXT: [[OR32ri:%[0-9]+]]:gr32 = OR32ri [[COPY]], 81, implicit-def $eflags46 ; CHECK-NEXT: NOOP implicit [[OR32ri]]47 ; CHECK-NEXT: [[XOR32ri:%[0-9]+]]:gr32 = XOR32ri [[COPY]], 81, implicit-def $eflags48 ; CHECK-NEXT: NOOP implicit [[XOR32ri]]49 ; CHECK-NEXT: TEST32ri [[COPY]], 81, implicit-def $eflags50 ; CHECK-NEXT: NOOP implicit $eflags51 ; CHECK-NEXT: CMP32ri [[COPY]], 81, implicit-def $eflags52 ; CHECK-NEXT: NOOP implicit $eflags53 ; CHECK-NEXT: [[ADC32ri:%[0-9]+]]:gr32 = ADC32ri [[COPY]], 81, implicit-def $eflags, implicit $eflags54 ; CHECK-NEXT: NOOP implicit [[ADC32ri]]55 ; CHECK-NEXT: [[SBB32ri:%[0-9]+]]:gr32 = SBB32ri [[COPY]], 81, implicit-def $eflags, implicit $eflags56 ; CHECK-NEXT: NOOP implicit [[SBB32ri]]57 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, killed [[MOV32ri]], %subreg.sub_32bit58 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi59 ; CHECK-NEXT: [[ADD64ri32_:%[0-9]+]]:gr64 = ADD64ri32 [[COPY1]], 81, implicit-def $eflags60 ; CHECK-NEXT: NOOP implicit [[ADD64ri32_]]61 ; CHECK-NEXT: [[SUB64ri32_:%[0-9]+]]:gr64 = SUB64ri32 [[COPY1]], 81, implicit-def $eflags62 ; CHECK-NEXT: NOOP implicit [[SUB64ri32_]]63 ; CHECK-NEXT: [[AND64ri32_:%[0-9]+]]:gr64 = AND64ri32 [[COPY1]], 81, implicit-def $eflags64 ; CHECK-NEXT: NOOP implicit [[AND64ri32_]]65 ; CHECK-NEXT: [[OR64ri32_:%[0-9]+]]:gr64 = OR64ri32 [[COPY1]], 81, implicit-def $eflags66 ; CHECK-NEXT: NOOP implicit [[OR64ri32_]]67 ; CHECK-NEXT: [[XOR64ri32_:%[0-9]+]]:gr64 = XOR64ri32 [[COPY1]], 81, implicit-def $eflags68 ; CHECK-NEXT: NOOP implicit [[XOR64ri32_]]69 ; CHECK-NEXT: [[MOV32ri64_:%[0-9]+]]:gr64 = MOV32ri64 8170 ; CHECK-NEXT: NOOP implicit [[MOV32ri64_]]71 ; CHECK-NEXT: TEST64ri32 [[COPY1]], 81, implicit-def $eflags72 ; CHECK-NEXT: NOOP implicit $eflags73 ; CHECK-NEXT: [[ADC64ri32_:%[0-9]+]]:gr64 = ADC64ri32 [[COPY1]], 81, implicit-def $eflags, implicit $eflags74 ; CHECK-NEXT: NOOP implicit [[ADC64ri32_]]75 ; CHECK-NEXT: [[SBB64ri32_:%[0-9]+]]:gr64 = SBB64ri32 [[COPY1]], 81, implicit-def $eflags, implicit $eflags76 ; CHECK-NEXT: NOOP implicit [[SBB64ri32_]]77 ; CHECK-NEXT: CMP64ri32 [[COPY1]], 81, implicit-def $eflags78 ; CHECK-NEXT: NOOP implicit $eflags79 ; CHECK-NEXT: CMP64rr [[SUBREG_TO_REG]], [[COPY1]], implicit-def $eflags80 ; CHECK-NEXT: NOOP implicit $eflags81 %0 = MOV32ri 8182 %1 = COPY $edi83 %2 = ADD32rr %0, %1, implicit-def $eflags84 NOOP implicit %285 86 %3 = SUB32rr %1, %0, implicit-def $eflags87 NOOP implicit %388 89 %4 = AND32rr %0, %1, implicit-def $eflags90 NOOP implicit %491 92 %5 = OR32rr %0, %1, implicit-def $eflags93 NOOP implicit %594 95 %6 = XOR32rr %0, %1, implicit-def $eflags96 NOOP implicit %697 98 TEST32rr %0, %1, implicit-def $eflags99 NOOP implicit $eflags100 101 CMP32rr %1, %0, implicit-def $eflags102 NOOP implicit $eflags103 104 %16 = ADC32rr %0, %1, implicit-def $eflags, implicit $eflags105 NOOP implicit %16106 107 %18 = SBB32rr %1, %0, implicit-def $eflags, implicit $eflags108 NOOP implicit %18109 110 %7 = SUBREG_TO_REG 0, killed %0:gr32, %subreg.sub_32bit111 %8 = COPY $rsi112 %9 = ADD64rr %7, %8, implicit-def $eflags113 NOOP implicit %9114 115 %10 = SUB64rr %8, %7, implicit-def $eflags116 NOOP implicit %10117 118 %11 = AND64rr %8, %7, implicit-def $eflags119 NOOP implicit %11120 121 %12 = OR64rr %8, %7, implicit-def $eflags122 NOOP implicit %12123 124 %13 = XOR64rr %8, %7, implicit-def $eflags125 NOOP implicit %13126 127 %14 = COPY %7128 NOOP implicit %14129 130 TEST64rr %8, %7, implicit-def $eflags131 NOOP implicit $eflags132 133 %15 = ADC64rr %8, %7, implicit-def $eflags, implicit $eflags134 NOOP implicit %15135 136 %17 = SBB64rr %8, %7, implicit-def $eflags, implicit $eflags137 NOOP implicit %17138 139 CMP64rr %8, %7, implicit-def $eflags140 NOOP implicit $eflags141 CMP64rr %7, %8, implicit-def $eflags142 NOOP implicit $eflags143...144