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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE4; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX25; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512,AVX512-VL6; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v4 -mattr=-avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512-NOVL7 8;9; fptosi -> sitofp10;11 12define double @scvtf64_i32(double %a0) {13; SSE-LABEL: scvtf64_i32:14; SSE: # %bb.0:15; SSE-NEXT: cvttpd2dq %xmm0, %xmm016; SSE-NEXT: cvtdq2pd %xmm0, %xmm017; SSE-NEXT: retq18;19; AVX-LABEL: scvtf64_i32:20; AVX: # %bb.0:21; AVX-NEXT: vcvttpd2dq %xmm0, %xmm022; AVX-NEXT: vcvtdq2pd %xmm0, %xmm023; AVX-NEXT: retq24 %ii = fptosi double %a0 to i3225 %ff = sitofp i32 %ii to double26 ret double %ff27}28 29define double @scvtf64_i64(double %a0) {30; SSE-LABEL: scvtf64_i64:31; SSE: # %bb.0:32; SSE-NEXT: cvttsd2si %xmm0, %rax33; SSE-NEXT: xorps %xmm0, %xmm034; SSE-NEXT: cvtsi2sd %rax, %xmm035; SSE-NEXT: retq36;37; AVX-LABEL: scvtf64_i64:38; AVX: # %bb.0:39; AVX-NEXT: vcvttsd2si %xmm0, %rax40; AVX-NEXT: vcvtsi2sd %rax, %xmm15, %xmm041; AVX-NEXT: retq42 %ii = fptosi double %a0 to i6443 %ff = sitofp i64 %ii to double44 ret double %ff45}46 47define float @scvtf32_i32(float %a0) {48; SSE-LABEL: scvtf32_i32:49; SSE: # %bb.0:50; SSE-NEXT: cvttps2dq %xmm0, %xmm051; SSE-NEXT: cvtdq2ps %xmm0, %xmm052; SSE-NEXT: retq53;54; AVX-LABEL: scvtf32_i32:55; AVX: # %bb.0:56; AVX-NEXT: vcvttps2dq %xmm0, %xmm057; AVX-NEXT: vcvtdq2ps %xmm0, %xmm058; AVX-NEXT: retq59 %ii = fptosi float %a0 to i3260 %ff = sitofp i32 %ii to float61 ret float %ff62}63 64define float @scvtf32_i64(float %a0) {65; SSE-LABEL: scvtf32_i64:66; SSE: # %bb.0:67; SSE-NEXT: cvttss2si %xmm0, %rax68; SSE-NEXT: xorps %xmm0, %xmm069; SSE-NEXT: cvtsi2ss %rax, %xmm070; SSE-NEXT: retq71;72; AVX-LABEL: scvtf32_i64:73; AVX: # %bb.0:74; AVX-NEXT: vcvttss2si %xmm0, %rax75; AVX-NEXT: vcvtsi2ss %rax, %xmm15, %xmm076; AVX-NEXT: retq77 %ii = fptosi float %a0 to i6478 %ff = sitofp i64 %ii to float79 ret float %ff80}81 82;83; fptoui -> uitofp84;85 86define double @ucvtf64_i32(double %a0) {87; SSE-LABEL: ucvtf64_i32:88; SSE: # %bb.0:89; SSE-NEXT: cvttsd2si %xmm0, %rax90; SSE-NEXT: movl %eax, %eax91; SSE-NEXT: xorps %xmm0, %xmm092; SSE-NEXT: cvtsi2sd %rax, %xmm093; SSE-NEXT: retq94;95; AVX2-LABEL: ucvtf64_i32:96; AVX2: # %bb.0:97; AVX2-NEXT: vcvttsd2si %xmm0, %rax98; AVX2-NEXT: movl %eax, %eax99; AVX2-NEXT: vcvtsi2sd %rax, %xmm15, %xmm0100; AVX2-NEXT: retq101;102; AVX512-LABEL: ucvtf64_i32:103; AVX512: # %bb.0:104; AVX512-NEXT: vcvttsd2usi %xmm0, %eax105; AVX512-NEXT: vcvtusi2sd %eax, %xmm15, %xmm0106; AVX512-NEXT: retq107 %ii = fptoui double %a0 to i32108 %ff = uitofp i32 %ii to double109 ret double %ff110}111 112define double @ucvtf64_i64(double %a0) {113; SSE-LABEL: ucvtf64_i64:114; SSE: # %bb.0:115; SSE-NEXT: cvttsd2si %xmm0, %rax116; SSE-NEXT: movq %rax, %rcx117; SSE-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0118; SSE-NEXT: cvttsd2si %xmm0, %rdx119; SSE-NEXT: sarq $63, %rcx120; SSE-NEXT: andq %rcx, %rdx121; SSE-NEXT: orq %rax, %rdx122; SSE-NEXT: movq %rdx, %xmm1123; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]124; SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1125; SSE-NEXT: movapd %xmm1, %xmm0126; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]127; SSE-NEXT: addsd %xmm1, %xmm0128; SSE-NEXT: retq129;130; AVX2-LABEL: ucvtf64_i64:131; AVX2: # %bb.0:132; AVX2-NEXT: vcvttsd2si %xmm0, %rax133; AVX2-NEXT: movq %rax, %rcx134; AVX2-NEXT: vsubsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0135; AVX2-NEXT: sarq $63, %rcx136; AVX2-NEXT: vcvttsd2si %xmm0, %rdx137; AVX2-NEXT: andq %rcx, %rdx138; AVX2-NEXT: orq %rax, %rdx139; AVX2-NEXT: vmovq %rdx, %xmm0140; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]141; AVX2-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0142; AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]143; AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm0144; AVX2-NEXT: retq145;146; AVX512-LABEL: ucvtf64_i64:147; AVX512: # %bb.0:148; AVX512-NEXT: vcvttsd2usi %xmm0, %rax149; AVX512-NEXT: vcvtusi2sd %rax, %xmm15, %xmm0150; AVX512-NEXT: retq151 %ii = fptoui double %a0 to i64152 %ff = uitofp i64 %ii to double153 ret double %ff154}155 156define float @ucvtf32_i32(float %a0) {157; SSE-LABEL: ucvtf32_i32:158; SSE: # %bb.0:159; SSE-NEXT: cvttss2si %xmm0, %rax160; SSE-NEXT: movl %eax, %eax161; SSE-NEXT: xorps %xmm0, %xmm0162; SSE-NEXT: cvtsi2ss %rax, %xmm0163; SSE-NEXT: retq164;165; AVX2-LABEL: ucvtf32_i32:166; AVX2: # %bb.0:167; AVX2-NEXT: vcvttss2si %xmm0, %rax168; AVX2-NEXT: movl %eax, %eax169; AVX2-NEXT: vcvtsi2ss %rax, %xmm15, %xmm0170; AVX2-NEXT: retq171;172; AVX512-LABEL: ucvtf32_i32:173; AVX512: # %bb.0:174; AVX512-NEXT: vcvttss2usi %xmm0, %eax175; AVX512-NEXT: vcvtusi2ss %eax, %xmm15, %xmm0176; AVX512-NEXT: retq177 %ii = fptoui float %a0 to i32178 %ff = uitofp i32 %ii to float179 ret float %ff180}181 182define float @ucvtf32_i64(float %a0) {183; SSE-LABEL: ucvtf32_i64:184; SSE: # %bb.0:185; SSE-NEXT: cvttss2si %xmm0, %rcx186; SSE-NEXT: movq %rcx, %rdx187; SSE-NEXT: sarq $63, %rdx188; SSE-NEXT: subss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0189; SSE-NEXT: cvttss2si %xmm0, %rax190; SSE-NEXT: andq %rdx, %rax191; SSE-NEXT: orq %rcx, %rax192; SSE-NEXT: js .LBB7_1193; SSE-NEXT: # %bb.2:194; SSE-NEXT: xorps %xmm0, %xmm0195; SSE-NEXT: cvtsi2ss %rax, %xmm0196; SSE-NEXT: retq197; SSE-NEXT: .LBB7_1:198; SSE-NEXT: movq %rax, %rcx199; SSE-NEXT: shrq %rcx200; SSE-NEXT: andl $1, %eax201; SSE-NEXT: orq %rcx, %rax202; SSE-NEXT: xorps %xmm0, %xmm0203; SSE-NEXT: cvtsi2ss %rax, %xmm0204; SSE-NEXT: addss %xmm0, %xmm0205; SSE-NEXT: retq206;207; AVX2-LABEL: ucvtf32_i64:208; AVX2: # %bb.0:209; AVX2-NEXT: vcvttss2si %xmm0, %rcx210; AVX2-NEXT: movq %rcx, %rdx211; AVX2-NEXT: sarq $63, %rdx212; AVX2-NEXT: vsubss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0213; AVX2-NEXT: vcvttss2si %xmm0, %rax214; AVX2-NEXT: andq %rdx, %rax215; AVX2-NEXT: orq %rcx, %rax216; AVX2-NEXT: js .LBB7_1217; AVX2-NEXT: # %bb.2:218; AVX2-NEXT: vcvtsi2ss %rax, %xmm15, %xmm0219; AVX2-NEXT: retq220; AVX2-NEXT: .LBB7_1:221; AVX2-NEXT: movq %rax, %rcx222; AVX2-NEXT: shrq %rcx223; AVX2-NEXT: andl $1, %eax224; AVX2-NEXT: orq %rcx, %rax225; AVX2-NEXT: vcvtsi2ss %rax, %xmm15, %xmm0226; AVX2-NEXT: vaddss %xmm0, %xmm0, %xmm0227; AVX2-NEXT: retq228;229; AVX512-LABEL: ucvtf32_i64:230; AVX512: # %bb.0:231; AVX512-NEXT: vcvttss2usi %xmm0, %rax232; AVX512-NEXT: vcvtusi2ss %rax, %xmm15, %xmm0233; AVX512-NEXT: retq234 %ii = fptoui float %a0 to i64235 %ff = uitofp i64 %ii to float236 ret float %ff237}238;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:239; AVX512-NOVL: {{.*}}240; AVX512-VL: {{.*}}241