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1; RUN: llc %s -O0 -fast-isel -regalloc=fast -mcpu=i386 -o -2; PR47673 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"5target triple = "i386-apple-darwin10"6 7define void @fn(x86_fp80 %x) nounwind ssp {8entry:9 %x.addr = alloca x86_fp80 ; <ptr> [#uses=5]10 store x86_fp80 %x, ptr %x.addr11 br i1 false, label %cond.true, label %cond.false12 13cond.true: ; preds = %entry14 %tmp = load x86_fp80, ptr %x.addr ; <x86_fp80> [#uses=1]15 %tmp1 = load x86_fp80, ptr %x.addr ; <x86_fp80> [#uses=1]16 %cmp = fcmp oeq x86_fp80 %tmp, %tmp1 ; <i1> [#uses=1]17 br i1 %cmp, label %if.then, label %if.end18 19cond.false: ; preds = %entry20 %tmp2 = load x86_fp80, ptr %x.addr ; <x86_fp80> [#uses=1]21 %tmp3 = load x86_fp80, ptr %x.addr ; <x86_fp80> [#uses=1]22 %cmp4 = fcmp une x86_fp80 %tmp2, %tmp3 ; <i1> [#uses=1]23 br i1 %cmp4, label %if.then, label %if.end24 25if.then: ; preds = %cond.false, %cond.true26 br label %if.end27 28if.end: ; preds = %if.then, %cond.false, %cond.true29 ret void30}31 32; PR1057533; This produces a FP0 = IMPLICIT_DEF instruction.34define void @__m_rankmerge_MOD_dindexmerge_(i1 %arg) nounwind {35entry:36 br label %"20"37 38"20": ; preds = %"23", %entry39 %0 = phi double [ undef, %entry ], [ %0, %"23" ]40 %1 = phi double [ 0.000000e+00, %entry ], [ %2, %"23" ]41 br i1 %arg, label %"21", label %"23"42 43"21": ; preds = %"20"44 ret void45 46"23": ; preds = %"20"47 %2 = select i1 undef, double %0, double %148 br label %"20"49}50