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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX5; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86-FP166; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64-FP167 8define i32 @test_f16_oeq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {9; SSE2-LABEL: test_f16_oeq_q:10; SSE2: # %bb.0:11; SSE2-NEXT: pushq %rbp12; SSE2-NEXT: pushq %rbx13; SSE2-NEXT: pushq %rax14; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill15; SSE2-NEXT: movl %esi, %ebx16; SSE2-NEXT: movl %edi, %ebp17; SSE2-NEXT: movaps %xmm1, %xmm018; SSE2-NEXT: callq __extendhfsf2@PLT19; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill20; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload21; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero22; SSE2-NEXT: callq __extendhfsf2@PLT23; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload24; SSE2-NEXT: cmovnel %ebx, %ebp25; SSE2-NEXT: cmovpl %ebx, %ebp26; SSE2-NEXT: movl %ebp, %eax27; SSE2-NEXT: addq $8, %rsp28; SSE2-NEXT: popq %rbx29; SSE2-NEXT: popq %rbp30; SSE2-NEXT: retq31;32; AVX-LABEL: test_f16_oeq_q:33; AVX: # %bb.0:34; AVX-NEXT: movl %edi, %eax35; AVX-NEXT: vpextrw $0, %xmm0, %ecx36; AVX-NEXT: vpextrw $0, %xmm1, %edx37; AVX-NEXT: movzwl %dx, %edx38; AVX-NEXT: vmovd %edx, %xmm039; AVX-NEXT: vcvtph2ps %xmm0, %xmm040; AVX-NEXT: movzwl %cx, %ecx41; AVX-NEXT: vmovd %ecx, %xmm142; AVX-NEXT: vcvtph2ps %xmm1, %xmm143; AVX-NEXT: vucomiss %xmm0, %xmm144; AVX-NEXT: cmovnel %esi, %eax45; AVX-NEXT: cmovpl %esi, %eax46; AVX-NEXT: retq47;48; X86-FP16-LABEL: test_f16_oeq_q:49; X86-FP16: # %bb.0:50; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero51; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm052; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax53; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx54; X86-FP16-NEXT: cmovnel %eax, %ecx55; X86-FP16-NEXT: cmovpl %eax, %ecx56; X86-FP16-NEXT: movl (%ecx), %eax57; X86-FP16-NEXT: retl58;59; X64-FP16-LABEL: test_f16_oeq_q:60; X64-FP16: # %bb.0:61; X64-FP16-NEXT: movl %edi, %eax62; X64-FP16-NEXT: vucomish %xmm1, %xmm063; X64-FP16-NEXT: cmovnel %esi, %eax64; X64-FP16-NEXT: cmovpl %esi, %eax65; X64-FP16-NEXT: retq66 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(67 half %f1, half %f2, metadata !"oeq",68 metadata !"fpexcept.strict") #069 %res = select i1 %cond, i32 %a, i32 %b70 ret i32 %res71}72 73define i32 @test_f16_ogt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {74; SSE2-LABEL: test_f16_ogt_q:75; SSE2: # %bb.0:76; SSE2-NEXT: pushq %rbp77; SSE2-NEXT: pushq %rbx78; SSE2-NEXT: pushq %rax79; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill80; SSE2-NEXT: movl %esi, %ebx81; SSE2-NEXT: movl %edi, %ebp82; SSE2-NEXT: movaps %xmm1, %xmm083; SSE2-NEXT: callq __extendhfsf2@PLT84; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill85; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload86; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero87; SSE2-NEXT: callq __extendhfsf2@PLT88; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload89; SSE2-NEXT: cmovbel %ebx, %ebp90; SSE2-NEXT: movl %ebp, %eax91; SSE2-NEXT: addq $8, %rsp92; SSE2-NEXT: popq %rbx93; SSE2-NEXT: popq %rbp94; SSE2-NEXT: retq95;96; AVX-LABEL: test_f16_ogt_q:97; AVX: # %bb.0:98; AVX-NEXT: movl %edi, %eax99; AVX-NEXT: vpextrw $0, %xmm0, %ecx100; AVX-NEXT: vpextrw $0, %xmm1, %edx101; AVX-NEXT: movzwl %dx, %edx102; AVX-NEXT: vmovd %edx, %xmm0103; AVX-NEXT: vcvtph2ps %xmm0, %xmm0104; AVX-NEXT: movzwl %cx, %ecx105; AVX-NEXT: vmovd %ecx, %xmm1106; AVX-NEXT: vcvtph2ps %xmm1, %xmm1107; AVX-NEXT: vucomiss %xmm0, %xmm1108; AVX-NEXT: cmovbel %esi, %eax109; AVX-NEXT: retq110;111; X86-FP16-LABEL: test_f16_ogt_q:112; X86-FP16: # %bb.0:113; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero114; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0115; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax116; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx117; X86-FP16-NEXT: cmoval %eax, %ecx118; X86-FP16-NEXT: movl (%ecx), %eax119; X86-FP16-NEXT: retl120;121; X64-FP16-LABEL: test_f16_ogt_q:122; X64-FP16: # %bb.0:123; X64-FP16-NEXT: movl %edi, %eax124; X64-FP16-NEXT: vucomish %xmm1, %xmm0125; X64-FP16-NEXT: cmovbel %esi, %eax126; X64-FP16-NEXT: retq127 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(128 half %f1, half %f2, metadata !"ogt",129 metadata !"fpexcept.strict") #0130 %res = select i1 %cond, i32 %a, i32 %b131 ret i32 %res132}133 134define i32 @test_f16_oge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {135; SSE2-LABEL: test_f16_oge_q:136; SSE2: # %bb.0:137; SSE2-NEXT: pushq %rbp138; SSE2-NEXT: pushq %rbx139; SSE2-NEXT: pushq %rax140; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill141; SSE2-NEXT: movl %esi, %ebx142; SSE2-NEXT: movl %edi, %ebp143; SSE2-NEXT: movaps %xmm1, %xmm0144; SSE2-NEXT: callq __extendhfsf2@PLT145; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill146; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload147; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero148; SSE2-NEXT: callq __extendhfsf2@PLT149; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload150; SSE2-NEXT: cmovbl %ebx, %ebp151; SSE2-NEXT: movl %ebp, %eax152; SSE2-NEXT: addq $8, %rsp153; SSE2-NEXT: popq %rbx154; SSE2-NEXT: popq %rbp155; SSE2-NEXT: retq156;157; AVX-LABEL: test_f16_oge_q:158; AVX: # %bb.0:159; AVX-NEXT: movl %edi, %eax160; AVX-NEXT: vpextrw $0, %xmm0, %ecx161; AVX-NEXT: vpextrw $0, %xmm1, %edx162; AVX-NEXT: movzwl %dx, %edx163; AVX-NEXT: vmovd %edx, %xmm0164; AVX-NEXT: vcvtph2ps %xmm0, %xmm0165; AVX-NEXT: movzwl %cx, %ecx166; AVX-NEXT: vmovd %ecx, %xmm1167; AVX-NEXT: vcvtph2ps %xmm1, %xmm1168; AVX-NEXT: vucomiss %xmm0, %xmm1169; AVX-NEXT: cmovbl %esi, %eax170; AVX-NEXT: retq171;172; X86-FP16-LABEL: test_f16_oge_q:173; X86-FP16: # %bb.0:174; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero175; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0176; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax177; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx178; X86-FP16-NEXT: cmovael %eax, %ecx179; X86-FP16-NEXT: movl (%ecx), %eax180; X86-FP16-NEXT: retl181;182; X64-FP16-LABEL: test_f16_oge_q:183; X64-FP16: # %bb.0:184; X64-FP16-NEXT: movl %edi, %eax185; X64-FP16-NEXT: vucomish %xmm1, %xmm0186; X64-FP16-NEXT: cmovbl %esi, %eax187; X64-FP16-NEXT: retq188 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(189 half %f1, half %f2, metadata !"oge",190 metadata !"fpexcept.strict") #0191 %res = select i1 %cond, i32 %a, i32 %b192 ret i32 %res193}194 195define i32 @test_f16_olt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {196; SSE2-LABEL: test_f16_olt_q:197; SSE2: # %bb.0:198; SSE2-NEXT: pushq %rbp199; SSE2-NEXT: pushq %rbx200; SSE2-NEXT: pushq %rax201; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill202; SSE2-NEXT: movl %esi, %ebx203; SSE2-NEXT: movl %edi, %ebp204; SSE2-NEXT: movaps %xmm1, %xmm0205; SSE2-NEXT: callq __extendhfsf2@PLT206; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill207; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload208; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero209; SSE2-NEXT: callq __extendhfsf2@PLT210; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload211; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero212; SSE2-NEXT: ucomiss %xmm0, %xmm1213; SSE2-NEXT: cmovbel %ebx, %ebp214; SSE2-NEXT: movl %ebp, %eax215; SSE2-NEXT: addq $8, %rsp216; SSE2-NEXT: popq %rbx217; SSE2-NEXT: popq %rbp218; SSE2-NEXT: retq219;220; AVX-LABEL: test_f16_olt_q:221; AVX: # %bb.0:222; AVX-NEXT: movl %edi, %eax223; AVX-NEXT: vpextrw $0, %xmm1, %ecx224; AVX-NEXT: vpextrw $0, %xmm0, %edx225; AVX-NEXT: movzwl %dx, %edx226; AVX-NEXT: vmovd %edx, %xmm0227; AVX-NEXT: vcvtph2ps %xmm0, %xmm0228; AVX-NEXT: movzwl %cx, %ecx229; AVX-NEXT: vmovd %ecx, %xmm1230; AVX-NEXT: vcvtph2ps %xmm1, %xmm1231; AVX-NEXT: vucomiss %xmm0, %xmm1232; AVX-NEXT: cmovbel %esi, %eax233; AVX-NEXT: retq234;235; X86-FP16-LABEL: test_f16_olt_q:236; X86-FP16: # %bb.0:237; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero238; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0239; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax240; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx241; X86-FP16-NEXT: cmoval %eax, %ecx242; X86-FP16-NEXT: movl (%ecx), %eax243; X86-FP16-NEXT: retl244;245; X64-FP16-LABEL: test_f16_olt_q:246; X64-FP16: # %bb.0:247; X64-FP16-NEXT: movl %edi, %eax248; X64-FP16-NEXT: vucomish %xmm0, %xmm1249; X64-FP16-NEXT: cmovbel %esi, %eax250; X64-FP16-NEXT: retq251 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(252 half %f1, half %f2, metadata !"olt",253 metadata !"fpexcept.strict") #0254 %res = select i1 %cond, i32 %a, i32 %b255 ret i32 %res256}257 258define i32 @test_f16_ole_q(i32 %a, i32 %b, half %f1, half %f2) #0 {259; SSE2-LABEL: test_f16_ole_q:260; SSE2: # %bb.0:261; SSE2-NEXT: pushq %rbp262; SSE2-NEXT: pushq %rbx263; SSE2-NEXT: pushq %rax264; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill265; SSE2-NEXT: movl %esi, %ebx266; SSE2-NEXT: movl %edi, %ebp267; SSE2-NEXT: movaps %xmm1, %xmm0268; SSE2-NEXT: callq __extendhfsf2@PLT269; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill270; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload271; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero272; SSE2-NEXT: callq __extendhfsf2@PLT273; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload274; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero275; SSE2-NEXT: ucomiss %xmm0, %xmm1276; SSE2-NEXT: cmovbl %ebx, %ebp277; SSE2-NEXT: movl %ebp, %eax278; SSE2-NEXT: addq $8, %rsp279; SSE2-NEXT: popq %rbx280; SSE2-NEXT: popq %rbp281; SSE2-NEXT: retq282;283; AVX-LABEL: test_f16_ole_q:284; AVX: # %bb.0:285; AVX-NEXT: movl %edi, %eax286; AVX-NEXT: vpextrw $0, %xmm1, %ecx287; AVX-NEXT: vpextrw $0, %xmm0, %edx288; AVX-NEXT: movzwl %dx, %edx289; AVX-NEXT: vmovd %edx, %xmm0290; AVX-NEXT: vcvtph2ps %xmm0, %xmm0291; AVX-NEXT: movzwl %cx, %ecx292; AVX-NEXT: vmovd %ecx, %xmm1293; AVX-NEXT: vcvtph2ps %xmm1, %xmm1294; AVX-NEXT: vucomiss %xmm0, %xmm1295; AVX-NEXT: cmovbl %esi, %eax296; AVX-NEXT: retq297;298; X86-FP16-LABEL: test_f16_ole_q:299; X86-FP16: # %bb.0:300; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero301; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0302; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax303; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx304; X86-FP16-NEXT: cmovael %eax, %ecx305; X86-FP16-NEXT: movl (%ecx), %eax306; X86-FP16-NEXT: retl307;308; X64-FP16-LABEL: test_f16_ole_q:309; X64-FP16: # %bb.0:310; X64-FP16-NEXT: movl %edi, %eax311; X64-FP16-NEXT: vucomish %xmm0, %xmm1312; X64-FP16-NEXT: cmovbl %esi, %eax313; X64-FP16-NEXT: retq314 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(315 half %f1, half %f2, metadata !"ole",316 metadata !"fpexcept.strict") #0317 %res = select i1 %cond, i32 %a, i32 %b318 ret i32 %res319}320 321define i32 @test_f16_one_q(i32 %a, i32 %b, half %f1, half %f2) #0 {322; SSE2-LABEL: test_f16_one_q:323; SSE2: # %bb.0:324; SSE2-NEXT: pushq %rbp325; SSE2-NEXT: pushq %rbx326; SSE2-NEXT: pushq %rax327; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill328; SSE2-NEXT: movl %esi, %ebx329; SSE2-NEXT: movl %edi, %ebp330; SSE2-NEXT: movaps %xmm1, %xmm0331; SSE2-NEXT: callq __extendhfsf2@PLT332; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill333; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload334; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero335; SSE2-NEXT: callq __extendhfsf2@PLT336; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload337; SSE2-NEXT: cmovel %ebx, %ebp338; SSE2-NEXT: movl %ebp, %eax339; SSE2-NEXT: addq $8, %rsp340; SSE2-NEXT: popq %rbx341; SSE2-NEXT: popq %rbp342; SSE2-NEXT: retq343;344; AVX-LABEL: test_f16_one_q:345; AVX: # %bb.0:346; AVX-NEXT: movl %edi, %eax347; AVX-NEXT: vpextrw $0, %xmm0, %ecx348; AVX-NEXT: vpextrw $0, %xmm1, %edx349; AVX-NEXT: movzwl %dx, %edx350; AVX-NEXT: vmovd %edx, %xmm0351; AVX-NEXT: vcvtph2ps %xmm0, %xmm0352; AVX-NEXT: movzwl %cx, %ecx353; AVX-NEXT: vmovd %ecx, %xmm1354; AVX-NEXT: vcvtph2ps %xmm1, %xmm1355; AVX-NEXT: vucomiss %xmm0, %xmm1356; AVX-NEXT: cmovel %esi, %eax357; AVX-NEXT: retq358;359; X86-FP16-LABEL: test_f16_one_q:360; X86-FP16: # %bb.0:361; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero362; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0363; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax364; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx365; X86-FP16-NEXT: cmovnel %eax, %ecx366; X86-FP16-NEXT: movl (%ecx), %eax367; X86-FP16-NEXT: retl368;369; X64-FP16-LABEL: test_f16_one_q:370; X64-FP16: # %bb.0:371; X64-FP16-NEXT: movl %edi, %eax372; X64-FP16-NEXT: vucomish %xmm1, %xmm0373; X64-FP16-NEXT: cmovel %esi, %eax374; X64-FP16-NEXT: retq375 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(376 half %f1, half %f2, metadata !"one",377 metadata !"fpexcept.strict") #0378 %res = select i1 %cond, i32 %a, i32 %b379 ret i32 %res380}381 382define i32 @test_f16_ord_q(i32 %a, i32 %b, half %f1, half %f2) #0 {383; SSE2-LABEL: test_f16_ord_q:384; SSE2: # %bb.0:385; SSE2-NEXT: pushq %rbp386; SSE2-NEXT: pushq %rbx387; SSE2-NEXT: pushq %rax388; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill389; SSE2-NEXT: movl %esi, %ebx390; SSE2-NEXT: movl %edi, %ebp391; SSE2-NEXT: movaps %xmm1, %xmm0392; SSE2-NEXT: callq __extendhfsf2@PLT393; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill394; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload395; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero396; SSE2-NEXT: callq __extendhfsf2@PLT397; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload398; SSE2-NEXT: cmovpl %ebx, %ebp399; SSE2-NEXT: movl %ebp, %eax400; SSE2-NEXT: addq $8, %rsp401; SSE2-NEXT: popq %rbx402; SSE2-NEXT: popq %rbp403; SSE2-NEXT: retq404;405; AVX-LABEL: test_f16_ord_q:406; AVX: # %bb.0:407; AVX-NEXT: movl %edi, %eax408; AVX-NEXT: vpextrw $0, %xmm0, %ecx409; AVX-NEXT: vpextrw $0, %xmm1, %edx410; AVX-NEXT: movzwl %dx, %edx411; AVX-NEXT: vmovd %edx, %xmm0412; AVX-NEXT: vcvtph2ps %xmm0, %xmm0413; AVX-NEXT: movzwl %cx, %ecx414; AVX-NEXT: vmovd %ecx, %xmm1415; AVX-NEXT: vcvtph2ps %xmm1, %xmm1416; AVX-NEXT: vucomiss %xmm0, %xmm1417; AVX-NEXT: cmovpl %esi, %eax418; AVX-NEXT: retq419;420; X86-FP16-LABEL: test_f16_ord_q:421; X86-FP16: # %bb.0:422; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero423; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0424; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax425; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx426; X86-FP16-NEXT: cmovnpl %eax, %ecx427; X86-FP16-NEXT: movl (%ecx), %eax428; X86-FP16-NEXT: retl429;430; X64-FP16-LABEL: test_f16_ord_q:431; X64-FP16: # %bb.0:432; X64-FP16-NEXT: movl %edi, %eax433; X64-FP16-NEXT: vucomish %xmm1, %xmm0434; X64-FP16-NEXT: cmovpl %esi, %eax435; X64-FP16-NEXT: retq436 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(437 half %f1, half %f2, metadata !"ord",438 metadata !"fpexcept.strict") #0439 %res = select i1 %cond, i32 %a, i32 %b440 ret i32 %res441}442 443define i32 @test_f16_ueq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {444; SSE2-LABEL: test_f16_ueq_q:445; SSE2: # %bb.0:446; SSE2-NEXT: pushq %rbp447; SSE2-NEXT: pushq %rbx448; SSE2-NEXT: pushq %rax449; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill450; SSE2-NEXT: movl %esi, %ebx451; SSE2-NEXT: movl %edi, %ebp452; SSE2-NEXT: movaps %xmm1, %xmm0453; SSE2-NEXT: callq __extendhfsf2@PLT454; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill455; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload456; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero457; SSE2-NEXT: callq __extendhfsf2@PLT458; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload459; SSE2-NEXT: cmovnel %ebx, %ebp460; SSE2-NEXT: movl %ebp, %eax461; SSE2-NEXT: addq $8, %rsp462; SSE2-NEXT: popq %rbx463; SSE2-NEXT: popq %rbp464; SSE2-NEXT: retq465;466; AVX-LABEL: test_f16_ueq_q:467; AVX: # %bb.0:468; AVX-NEXT: movl %edi, %eax469; AVX-NEXT: vpextrw $0, %xmm0, %ecx470; AVX-NEXT: vpextrw $0, %xmm1, %edx471; AVX-NEXT: movzwl %dx, %edx472; AVX-NEXT: vmovd %edx, %xmm0473; AVX-NEXT: vcvtph2ps %xmm0, %xmm0474; AVX-NEXT: movzwl %cx, %ecx475; AVX-NEXT: vmovd %ecx, %xmm1476; AVX-NEXT: vcvtph2ps %xmm1, %xmm1477; AVX-NEXT: vucomiss %xmm0, %xmm1478; AVX-NEXT: cmovnel %esi, %eax479; AVX-NEXT: retq480;481; X86-FP16-LABEL: test_f16_ueq_q:482; X86-FP16: # %bb.0:483; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero484; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0485; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax486; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx487; X86-FP16-NEXT: cmovel %eax, %ecx488; X86-FP16-NEXT: movl (%ecx), %eax489; X86-FP16-NEXT: retl490;491; X64-FP16-LABEL: test_f16_ueq_q:492; X64-FP16: # %bb.0:493; X64-FP16-NEXT: movl %edi, %eax494; X64-FP16-NEXT: vucomish %xmm1, %xmm0495; X64-FP16-NEXT: cmovnel %esi, %eax496; X64-FP16-NEXT: retq497 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(498 half %f1, half %f2, metadata !"ueq",499 metadata !"fpexcept.strict") #0500 %res = select i1 %cond, i32 %a, i32 %b501 ret i32 %res502}503 504define i32 @test_f16_ugt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {505; SSE2-LABEL: test_f16_ugt_q:506; SSE2: # %bb.0:507; SSE2-NEXT: pushq %rbp508; SSE2-NEXT: pushq %rbx509; SSE2-NEXT: pushq %rax510; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill511; SSE2-NEXT: movl %esi, %ebx512; SSE2-NEXT: movl %edi, %ebp513; SSE2-NEXT: movaps %xmm1, %xmm0514; SSE2-NEXT: callq __extendhfsf2@PLT515; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill516; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload517; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero518; SSE2-NEXT: callq __extendhfsf2@PLT519; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload520; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero521; SSE2-NEXT: ucomiss %xmm0, %xmm1522; SSE2-NEXT: cmovael %ebx, %ebp523; SSE2-NEXT: movl %ebp, %eax524; SSE2-NEXT: addq $8, %rsp525; SSE2-NEXT: popq %rbx526; SSE2-NEXT: popq %rbp527; SSE2-NEXT: retq528;529; AVX-LABEL: test_f16_ugt_q:530; AVX: # %bb.0:531; AVX-NEXT: movl %edi, %eax532; AVX-NEXT: vpextrw $0, %xmm1, %ecx533; AVX-NEXT: vpextrw $0, %xmm0, %edx534; AVX-NEXT: movzwl %dx, %edx535; AVX-NEXT: vmovd %edx, %xmm0536; AVX-NEXT: vcvtph2ps %xmm0, %xmm0537; AVX-NEXT: movzwl %cx, %ecx538; AVX-NEXT: vmovd %ecx, %xmm1539; AVX-NEXT: vcvtph2ps %xmm1, %xmm1540; AVX-NEXT: vucomiss %xmm0, %xmm1541; AVX-NEXT: cmovael %esi, %eax542; AVX-NEXT: retq543;544; X86-FP16-LABEL: test_f16_ugt_q:545; X86-FP16: # %bb.0:546; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero547; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0548; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax549; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx550; X86-FP16-NEXT: cmovbl %eax, %ecx551; X86-FP16-NEXT: movl (%ecx), %eax552; X86-FP16-NEXT: retl553;554; X64-FP16-LABEL: test_f16_ugt_q:555; X64-FP16: # %bb.0:556; X64-FP16-NEXT: movl %edi, %eax557; X64-FP16-NEXT: vucomish %xmm0, %xmm1558; X64-FP16-NEXT: cmovael %esi, %eax559; X64-FP16-NEXT: retq560 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(561 half %f1, half %f2, metadata !"ugt",562 metadata !"fpexcept.strict") #0563 %res = select i1 %cond, i32 %a, i32 %b564 ret i32 %res565}566 567define i32 @test_f16_uge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {568; SSE2-LABEL: test_f16_uge_q:569; SSE2: # %bb.0:570; SSE2-NEXT: pushq %rbp571; SSE2-NEXT: pushq %rbx572; SSE2-NEXT: pushq %rax573; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill574; SSE2-NEXT: movl %esi, %ebx575; SSE2-NEXT: movl %edi, %ebp576; SSE2-NEXT: movaps %xmm1, %xmm0577; SSE2-NEXT: callq __extendhfsf2@PLT578; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill579; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload580; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero581; SSE2-NEXT: callq __extendhfsf2@PLT582; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload583; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero584; SSE2-NEXT: ucomiss %xmm0, %xmm1585; SSE2-NEXT: cmoval %ebx, %ebp586; SSE2-NEXT: movl %ebp, %eax587; SSE2-NEXT: addq $8, %rsp588; SSE2-NEXT: popq %rbx589; SSE2-NEXT: popq %rbp590; SSE2-NEXT: retq591;592; AVX-LABEL: test_f16_uge_q:593; AVX: # %bb.0:594; AVX-NEXT: movl %edi, %eax595; AVX-NEXT: vpextrw $0, %xmm1, %ecx596; AVX-NEXT: vpextrw $0, %xmm0, %edx597; AVX-NEXT: movzwl %dx, %edx598; AVX-NEXT: vmovd %edx, %xmm0599; AVX-NEXT: vcvtph2ps %xmm0, %xmm0600; AVX-NEXT: movzwl %cx, %ecx601; AVX-NEXT: vmovd %ecx, %xmm1602; AVX-NEXT: vcvtph2ps %xmm1, %xmm1603; AVX-NEXT: vucomiss %xmm0, %xmm1604; AVX-NEXT: cmoval %esi, %eax605; AVX-NEXT: retq606;607; X86-FP16-LABEL: test_f16_uge_q:608; X86-FP16: # %bb.0:609; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero610; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0611; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax612; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx613; X86-FP16-NEXT: cmovbel %eax, %ecx614; X86-FP16-NEXT: movl (%ecx), %eax615; X86-FP16-NEXT: retl616;617; X64-FP16-LABEL: test_f16_uge_q:618; X64-FP16: # %bb.0:619; X64-FP16-NEXT: movl %edi, %eax620; X64-FP16-NEXT: vucomish %xmm0, %xmm1621; X64-FP16-NEXT: cmoval %esi, %eax622; X64-FP16-NEXT: retq623 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(624 half %f1, half %f2, metadata !"uge",625 metadata !"fpexcept.strict") #0626 %res = select i1 %cond, i32 %a, i32 %b627 ret i32 %res628}629 630define i32 @test_f16_ult_q(i32 %a, i32 %b, half %f1, half %f2) #0 {631; SSE2-LABEL: test_f16_ult_q:632; SSE2: # %bb.0:633; SSE2-NEXT: pushq %rbp634; SSE2-NEXT: pushq %rbx635; SSE2-NEXT: pushq %rax636; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill637; SSE2-NEXT: movl %esi, %ebx638; SSE2-NEXT: movl %edi, %ebp639; SSE2-NEXT: movaps %xmm1, %xmm0640; SSE2-NEXT: callq __extendhfsf2@PLT641; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill642; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload643; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero644; SSE2-NEXT: callq __extendhfsf2@PLT645; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload646; SSE2-NEXT: cmovael %ebx, %ebp647; SSE2-NEXT: movl %ebp, %eax648; SSE2-NEXT: addq $8, %rsp649; SSE2-NEXT: popq %rbx650; SSE2-NEXT: popq %rbp651; SSE2-NEXT: retq652;653; AVX-LABEL: test_f16_ult_q:654; AVX: # %bb.0:655; AVX-NEXT: movl %edi, %eax656; AVX-NEXT: vpextrw $0, %xmm0, %ecx657; AVX-NEXT: vpextrw $0, %xmm1, %edx658; AVX-NEXT: movzwl %dx, %edx659; AVX-NEXT: vmovd %edx, %xmm0660; AVX-NEXT: vcvtph2ps %xmm0, %xmm0661; AVX-NEXT: movzwl %cx, %ecx662; AVX-NEXT: vmovd %ecx, %xmm1663; AVX-NEXT: vcvtph2ps %xmm1, %xmm1664; AVX-NEXT: vucomiss %xmm0, %xmm1665; AVX-NEXT: cmovael %esi, %eax666; AVX-NEXT: retq667;668; X86-FP16-LABEL: test_f16_ult_q:669; X86-FP16: # %bb.0:670; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero671; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0672; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax673; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx674; X86-FP16-NEXT: cmovbl %eax, %ecx675; X86-FP16-NEXT: movl (%ecx), %eax676; X86-FP16-NEXT: retl677;678; X64-FP16-LABEL: test_f16_ult_q:679; X64-FP16: # %bb.0:680; X64-FP16-NEXT: movl %edi, %eax681; X64-FP16-NEXT: vucomish %xmm1, %xmm0682; X64-FP16-NEXT: cmovael %esi, %eax683; X64-FP16-NEXT: retq684 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(685 half %f1, half %f2, metadata !"ult",686 metadata !"fpexcept.strict") #0687 %res = select i1 %cond, i32 %a, i32 %b688 ret i32 %res689}690 691define i32 @test_f16_ule_q(i32 %a, i32 %b, half %f1, half %f2) #0 {692; SSE2-LABEL: test_f16_ule_q:693; SSE2: # %bb.0:694; SSE2-NEXT: pushq %rbp695; SSE2-NEXT: pushq %rbx696; SSE2-NEXT: pushq %rax697; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill698; SSE2-NEXT: movl %esi, %ebx699; SSE2-NEXT: movl %edi, %ebp700; SSE2-NEXT: movaps %xmm1, %xmm0701; SSE2-NEXT: callq __extendhfsf2@PLT702; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill703; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload704; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero705; SSE2-NEXT: callq __extendhfsf2@PLT706; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload707; SSE2-NEXT: cmoval %ebx, %ebp708; SSE2-NEXT: movl %ebp, %eax709; SSE2-NEXT: addq $8, %rsp710; SSE2-NEXT: popq %rbx711; SSE2-NEXT: popq %rbp712; SSE2-NEXT: retq713;714; AVX-LABEL: test_f16_ule_q:715; AVX: # %bb.0:716; AVX-NEXT: movl %edi, %eax717; AVX-NEXT: vpextrw $0, %xmm0, %ecx718; AVX-NEXT: vpextrw $0, %xmm1, %edx719; AVX-NEXT: movzwl %dx, %edx720; AVX-NEXT: vmovd %edx, %xmm0721; AVX-NEXT: vcvtph2ps %xmm0, %xmm0722; AVX-NEXT: movzwl %cx, %ecx723; AVX-NEXT: vmovd %ecx, %xmm1724; AVX-NEXT: vcvtph2ps %xmm1, %xmm1725; AVX-NEXT: vucomiss %xmm0, %xmm1726; AVX-NEXT: cmoval %esi, %eax727; AVX-NEXT: retq728;729; X86-FP16-LABEL: test_f16_ule_q:730; X86-FP16: # %bb.0:731; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero732; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0733; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax734; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx735; X86-FP16-NEXT: cmovbel %eax, %ecx736; X86-FP16-NEXT: movl (%ecx), %eax737; X86-FP16-NEXT: retl738;739; X64-FP16-LABEL: test_f16_ule_q:740; X64-FP16: # %bb.0:741; X64-FP16-NEXT: movl %edi, %eax742; X64-FP16-NEXT: vucomish %xmm1, %xmm0743; X64-FP16-NEXT: cmoval %esi, %eax744; X64-FP16-NEXT: retq745 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(746 half %f1, half %f2, metadata !"ule",747 metadata !"fpexcept.strict") #0748 %res = select i1 %cond, i32 %a, i32 %b749 ret i32 %res750}751 752define i32 @test_f16_une_q(i32 %a, i32 %b, half %f1, half %f2) #0 {753; SSE2-LABEL: test_f16_une_q:754; SSE2: # %bb.0:755; SSE2-NEXT: pushq %rbp756; SSE2-NEXT: pushq %rbx757; SSE2-NEXT: pushq %rax758; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill759; SSE2-NEXT: movl %esi, %ebx760; SSE2-NEXT: movl %edi, %ebp761; SSE2-NEXT: movaps %xmm1, %xmm0762; SSE2-NEXT: callq __extendhfsf2@PLT763; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill764; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload765; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero766; SSE2-NEXT: callq __extendhfsf2@PLT767; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload768; SSE2-NEXT: cmovnel %ebp, %ebx769; SSE2-NEXT: cmovpl %ebp, %ebx770; SSE2-NEXT: movl %ebx, %eax771; SSE2-NEXT: addq $8, %rsp772; SSE2-NEXT: popq %rbx773; SSE2-NEXT: popq %rbp774; SSE2-NEXT: retq775;776; AVX-LABEL: test_f16_une_q:777; AVX: # %bb.0:778; AVX-NEXT: movl %esi, %eax779; AVX-NEXT: vpextrw $0, %xmm0, %ecx780; AVX-NEXT: vpextrw $0, %xmm1, %edx781; AVX-NEXT: movzwl %dx, %edx782; AVX-NEXT: vmovd %edx, %xmm0783; AVX-NEXT: vcvtph2ps %xmm0, %xmm0784; AVX-NEXT: movzwl %cx, %ecx785; AVX-NEXT: vmovd %ecx, %xmm1786; AVX-NEXT: vcvtph2ps %xmm1, %xmm1787; AVX-NEXT: vucomiss %xmm0, %xmm1788; AVX-NEXT: cmovnel %edi, %eax789; AVX-NEXT: cmovpl %edi, %eax790; AVX-NEXT: retq791;792; X86-FP16-LABEL: test_f16_une_q:793; X86-FP16: # %bb.0:794; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero795; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0796; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax797; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx798; X86-FP16-NEXT: cmovnel %eax, %ecx799; X86-FP16-NEXT: cmovpl %eax, %ecx800; X86-FP16-NEXT: movl (%ecx), %eax801; X86-FP16-NEXT: retl802;803; X64-FP16-LABEL: test_f16_une_q:804; X64-FP16: # %bb.0:805; X64-FP16-NEXT: movl %esi, %eax806; X64-FP16-NEXT: vucomish %xmm1, %xmm0807; X64-FP16-NEXT: cmovnel %edi, %eax808; X64-FP16-NEXT: cmovpl %edi, %eax809; X64-FP16-NEXT: retq810 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(811 half %f1, half %f2, metadata !"une",812 metadata !"fpexcept.strict") #0813 %res = select i1 %cond, i32 %a, i32 %b814 ret i32 %res815}816 817define i32 @test_f16_uno_q(i32 %a, i32 %b, half %f1, half %f2) #0 {818; SSE2-LABEL: test_f16_uno_q:819; SSE2: # %bb.0:820; SSE2-NEXT: pushq %rbp821; SSE2-NEXT: pushq %rbx822; SSE2-NEXT: pushq %rax823; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill824; SSE2-NEXT: movl %esi, %ebx825; SSE2-NEXT: movl %edi, %ebp826; SSE2-NEXT: movaps %xmm1, %xmm0827; SSE2-NEXT: callq __extendhfsf2@PLT828; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill829; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload830; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero831; SSE2-NEXT: callq __extendhfsf2@PLT832; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload833; SSE2-NEXT: cmovnpl %ebx, %ebp834; SSE2-NEXT: movl %ebp, %eax835; SSE2-NEXT: addq $8, %rsp836; SSE2-NEXT: popq %rbx837; SSE2-NEXT: popq %rbp838; SSE2-NEXT: retq839;840; AVX-LABEL: test_f16_uno_q:841; AVX: # %bb.0:842; AVX-NEXT: movl %edi, %eax843; AVX-NEXT: vpextrw $0, %xmm0, %ecx844; AVX-NEXT: vpextrw $0, %xmm1, %edx845; AVX-NEXT: movzwl %dx, %edx846; AVX-NEXT: vmovd %edx, %xmm0847; AVX-NEXT: vcvtph2ps %xmm0, %xmm0848; AVX-NEXT: movzwl %cx, %ecx849; AVX-NEXT: vmovd %ecx, %xmm1850; AVX-NEXT: vcvtph2ps %xmm1, %xmm1851; AVX-NEXT: vucomiss %xmm0, %xmm1852; AVX-NEXT: cmovnpl %esi, %eax853; AVX-NEXT: retq854;855; X86-FP16-LABEL: test_f16_uno_q:856; X86-FP16: # %bb.0:857; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero858; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm0859; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax860; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx861; X86-FP16-NEXT: cmovpl %eax, %ecx862; X86-FP16-NEXT: movl (%ecx), %eax863; X86-FP16-NEXT: retl864;865; X64-FP16-LABEL: test_f16_uno_q:866; X64-FP16: # %bb.0:867; X64-FP16-NEXT: movl %edi, %eax868; X64-FP16-NEXT: vucomish %xmm1, %xmm0869; X64-FP16-NEXT: cmovnpl %esi, %eax870; X64-FP16-NEXT: retq871 %cond = call i1 @llvm.experimental.constrained.fcmp.f16(872 half %f1, half %f2, metadata !"uno",873 metadata !"fpexcept.strict") #0874 %res = select i1 %cond, i32 %a, i32 %b875 ret i32 %res876}877 878define i32 @test_f16_oeq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {879; SSE2-LABEL: test_f16_oeq_s:880; SSE2: # %bb.0:881; SSE2-NEXT: pushq %rbp882; SSE2-NEXT: pushq %rbx883; SSE2-NEXT: pushq %rax884; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill885; SSE2-NEXT: movl %esi, %ebx886; SSE2-NEXT: movl %edi, %ebp887; SSE2-NEXT: movaps %xmm1, %xmm0888; SSE2-NEXT: callq __extendhfsf2@PLT889; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill890; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload891; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero892; SSE2-NEXT: callq __extendhfsf2@PLT893; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload894; SSE2-NEXT: cmovnel %ebx, %ebp895; SSE2-NEXT: cmovpl %ebx, %ebp896; SSE2-NEXT: movl %ebp, %eax897; SSE2-NEXT: addq $8, %rsp898; SSE2-NEXT: popq %rbx899; SSE2-NEXT: popq %rbp900; SSE2-NEXT: retq901;902; AVX-LABEL: test_f16_oeq_s:903; AVX: # %bb.0:904; AVX-NEXT: movl %edi, %eax905; AVX-NEXT: vpextrw $0, %xmm0, %ecx906; AVX-NEXT: vpextrw $0, %xmm1, %edx907; AVX-NEXT: movzwl %dx, %edx908; AVX-NEXT: vmovd %edx, %xmm0909; AVX-NEXT: vcvtph2ps %xmm0, %xmm0910; AVX-NEXT: movzwl %cx, %ecx911; AVX-NEXT: vmovd %ecx, %xmm1912; AVX-NEXT: vcvtph2ps %xmm1, %xmm1913; AVX-NEXT: vcomiss %xmm0, %xmm1914; AVX-NEXT: cmovnel %esi, %eax915; AVX-NEXT: cmovpl %esi, %eax916; AVX-NEXT: retq917;918; X86-FP16-LABEL: test_f16_oeq_s:919; X86-FP16: # %bb.0:920; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero921; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0922; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax923; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx924; X86-FP16-NEXT: cmovnel %eax, %ecx925; X86-FP16-NEXT: cmovpl %eax, %ecx926; X86-FP16-NEXT: movl (%ecx), %eax927; X86-FP16-NEXT: retl928;929; X64-FP16-LABEL: test_f16_oeq_s:930; X64-FP16: # %bb.0:931; X64-FP16-NEXT: movl %edi, %eax932; X64-FP16-NEXT: vcomish %xmm1, %xmm0933; X64-FP16-NEXT: cmovnel %esi, %eax934; X64-FP16-NEXT: cmovpl %esi, %eax935; X64-FP16-NEXT: retq936 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(937 half %f1, half %f2, metadata !"oeq",938 metadata !"fpexcept.strict") #0939 %res = select i1 %cond, i32 %a, i32 %b940 ret i32 %res941}942 943define i32 @test_f16_ogt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {944; SSE2-LABEL: test_f16_ogt_s:945; SSE2: # %bb.0:946; SSE2-NEXT: pushq %rbp947; SSE2-NEXT: pushq %rbx948; SSE2-NEXT: pushq %rax949; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill950; SSE2-NEXT: movl %esi, %ebx951; SSE2-NEXT: movl %edi, %ebp952; SSE2-NEXT: movaps %xmm1, %xmm0953; SSE2-NEXT: callq __extendhfsf2@PLT954; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill955; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload956; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero957; SSE2-NEXT: callq __extendhfsf2@PLT958; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload959; SSE2-NEXT: cmovbel %ebx, %ebp960; SSE2-NEXT: movl %ebp, %eax961; SSE2-NEXT: addq $8, %rsp962; SSE2-NEXT: popq %rbx963; SSE2-NEXT: popq %rbp964; SSE2-NEXT: retq965;966; AVX-LABEL: test_f16_ogt_s:967; AVX: # %bb.0:968; AVX-NEXT: movl %edi, %eax969; AVX-NEXT: vpextrw $0, %xmm0, %ecx970; AVX-NEXT: vpextrw $0, %xmm1, %edx971; AVX-NEXT: movzwl %dx, %edx972; AVX-NEXT: vmovd %edx, %xmm0973; AVX-NEXT: vcvtph2ps %xmm0, %xmm0974; AVX-NEXT: movzwl %cx, %ecx975; AVX-NEXT: vmovd %ecx, %xmm1976; AVX-NEXT: vcvtph2ps %xmm1, %xmm1977; AVX-NEXT: vcomiss %xmm0, %xmm1978; AVX-NEXT: cmovbel %esi, %eax979; AVX-NEXT: retq980;981; X86-FP16-LABEL: test_f16_ogt_s:982; X86-FP16: # %bb.0:983; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero984; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm0985; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax986; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx987; X86-FP16-NEXT: cmoval %eax, %ecx988; X86-FP16-NEXT: movl (%ecx), %eax989; X86-FP16-NEXT: retl990;991; X64-FP16-LABEL: test_f16_ogt_s:992; X64-FP16: # %bb.0:993; X64-FP16-NEXT: movl %edi, %eax994; X64-FP16-NEXT: vcomish %xmm1, %xmm0995; X64-FP16-NEXT: cmovbel %esi, %eax996; X64-FP16-NEXT: retq997 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(998 half %f1, half %f2, metadata !"ogt",999 metadata !"fpexcept.strict") #01000 %res = select i1 %cond, i32 %a, i32 %b1001 ret i32 %res1002}1003 1004define i32 @test_f16_oge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1005; SSE2-LABEL: test_f16_oge_s:1006; SSE2: # %bb.0:1007; SSE2-NEXT: pushq %rbp1008; SSE2-NEXT: pushq %rbx1009; SSE2-NEXT: pushq %rax1010; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1011; SSE2-NEXT: movl %esi, %ebx1012; SSE2-NEXT: movl %edi, %ebp1013; SSE2-NEXT: movaps %xmm1, %xmm01014; SSE2-NEXT: callq __extendhfsf2@PLT1015; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1016; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1017; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1018; SSE2-NEXT: callq __extendhfsf2@PLT1019; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1020; SSE2-NEXT: cmovbl %ebx, %ebp1021; SSE2-NEXT: movl %ebp, %eax1022; SSE2-NEXT: addq $8, %rsp1023; SSE2-NEXT: popq %rbx1024; SSE2-NEXT: popq %rbp1025; SSE2-NEXT: retq1026;1027; AVX-LABEL: test_f16_oge_s:1028; AVX: # %bb.0:1029; AVX-NEXT: movl %edi, %eax1030; AVX-NEXT: vpextrw $0, %xmm0, %ecx1031; AVX-NEXT: vpextrw $0, %xmm1, %edx1032; AVX-NEXT: movzwl %dx, %edx1033; AVX-NEXT: vmovd %edx, %xmm01034; AVX-NEXT: vcvtph2ps %xmm0, %xmm01035; AVX-NEXT: movzwl %cx, %ecx1036; AVX-NEXT: vmovd %ecx, %xmm11037; AVX-NEXT: vcvtph2ps %xmm1, %xmm11038; AVX-NEXT: vcomiss %xmm0, %xmm11039; AVX-NEXT: cmovbl %esi, %eax1040; AVX-NEXT: retq1041;1042; X86-FP16-LABEL: test_f16_oge_s:1043; X86-FP16: # %bb.0:1044; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1045; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01046; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1047; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1048; X86-FP16-NEXT: cmovael %eax, %ecx1049; X86-FP16-NEXT: movl (%ecx), %eax1050; X86-FP16-NEXT: retl1051;1052; X64-FP16-LABEL: test_f16_oge_s:1053; X64-FP16: # %bb.0:1054; X64-FP16-NEXT: movl %edi, %eax1055; X64-FP16-NEXT: vcomish %xmm1, %xmm01056; X64-FP16-NEXT: cmovbl %esi, %eax1057; X64-FP16-NEXT: retq1058 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1059 half %f1, half %f2, metadata !"oge",1060 metadata !"fpexcept.strict") #01061 %res = select i1 %cond, i32 %a, i32 %b1062 ret i32 %res1063}1064 1065define i32 @test_f16_olt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1066; SSE2-LABEL: test_f16_olt_s:1067; SSE2: # %bb.0:1068; SSE2-NEXT: pushq %rbp1069; SSE2-NEXT: pushq %rbx1070; SSE2-NEXT: pushq %rax1071; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1072; SSE2-NEXT: movl %esi, %ebx1073; SSE2-NEXT: movl %edi, %ebp1074; SSE2-NEXT: movaps %xmm1, %xmm01075; SSE2-NEXT: callq __extendhfsf2@PLT1076; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1077; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1078; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1079; SSE2-NEXT: callq __extendhfsf2@PLT1080; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload1081; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero1082; SSE2-NEXT: comiss %xmm0, %xmm11083; SSE2-NEXT: cmovbel %ebx, %ebp1084; SSE2-NEXT: movl %ebp, %eax1085; SSE2-NEXT: addq $8, %rsp1086; SSE2-NEXT: popq %rbx1087; SSE2-NEXT: popq %rbp1088; SSE2-NEXT: retq1089;1090; AVX-LABEL: test_f16_olt_s:1091; AVX: # %bb.0:1092; AVX-NEXT: movl %edi, %eax1093; AVX-NEXT: vpextrw $0, %xmm1, %ecx1094; AVX-NEXT: vpextrw $0, %xmm0, %edx1095; AVX-NEXT: movzwl %dx, %edx1096; AVX-NEXT: vmovd %edx, %xmm01097; AVX-NEXT: vcvtph2ps %xmm0, %xmm01098; AVX-NEXT: movzwl %cx, %ecx1099; AVX-NEXT: vmovd %ecx, %xmm11100; AVX-NEXT: vcvtph2ps %xmm1, %xmm11101; AVX-NEXT: vcomiss %xmm0, %xmm11102; AVX-NEXT: cmovbel %esi, %eax1103; AVX-NEXT: retq1104;1105; X86-FP16-LABEL: test_f16_olt_s:1106; X86-FP16: # %bb.0:1107; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1108; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01109; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1110; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1111; X86-FP16-NEXT: cmoval %eax, %ecx1112; X86-FP16-NEXT: movl (%ecx), %eax1113; X86-FP16-NEXT: retl1114;1115; X64-FP16-LABEL: test_f16_olt_s:1116; X64-FP16: # %bb.0:1117; X64-FP16-NEXT: movl %edi, %eax1118; X64-FP16-NEXT: vcomish %xmm0, %xmm11119; X64-FP16-NEXT: cmovbel %esi, %eax1120; X64-FP16-NEXT: retq1121 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1122 half %f1, half %f2, metadata !"olt",1123 metadata !"fpexcept.strict") #01124 %res = select i1 %cond, i32 %a, i32 %b1125 ret i32 %res1126}1127 1128define i32 @test_f16_ole_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1129; SSE2-LABEL: test_f16_ole_s:1130; SSE2: # %bb.0:1131; SSE2-NEXT: pushq %rbp1132; SSE2-NEXT: pushq %rbx1133; SSE2-NEXT: pushq %rax1134; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1135; SSE2-NEXT: movl %esi, %ebx1136; SSE2-NEXT: movl %edi, %ebp1137; SSE2-NEXT: movaps %xmm1, %xmm01138; SSE2-NEXT: callq __extendhfsf2@PLT1139; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1140; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1141; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1142; SSE2-NEXT: callq __extendhfsf2@PLT1143; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload1144; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero1145; SSE2-NEXT: comiss %xmm0, %xmm11146; SSE2-NEXT: cmovbl %ebx, %ebp1147; SSE2-NEXT: movl %ebp, %eax1148; SSE2-NEXT: addq $8, %rsp1149; SSE2-NEXT: popq %rbx1150; SSE2-NEXT: popq %rbp1151; SSE2-NEXT: retq1152;1153; AVX-LABEL: test_f16_ole_s:1154; AVX: # %bb.0:1155; AVX-NEXT: movl %edi, %eax1156; AVX-NEXT: vpextrw $0, %xmm1, %ecx1157; AVX-NEXT: vpextrw $0, %xmm0, %edx1158; AVX-NEXT: movzwl %dx, %edx1159; AVX-NEXT: vmovd %edx, %xmm01160; AVX-NEXT: vcvtph2ps %xmm0, %xmm01161; AVX-NEXT: movzwl %cx, %ecx1162; AVX-NEXT: vmovd %ecx, %xmm11163; AVX-NEXT: vcvtph2ps %xmm1, %xmm11164; AVX-NEXT: vcomiss %xmm0, %xmm11165; AVX-NEXT: cmovbl %esi, %eax1166; AVX-NEXT: retq1167;1168; X86-FP16-LABEL: test_f16_ole_s:1169; X86-FP16: # %bb.0:1170; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1171; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01172; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1173; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1174; X86-FP16-NEXT: cmovael %eax, %ecx1175; X86-FP16-NEXT: movl (%ecx), %eax1176; X86-FP16-NEXT: retl1177;1178; X64-FP16-LABEL: test_f16_ole_s:1179; X64-FP16: # %bb.0:1180; X64-FP16-NEXT: movl %edi, %eax1181; X64-FP16-NEXT: vcomish %xmm0, %xmm11182; X64-FP16-NEXT: cmovbl %esi, %eax1183; X64-FP16-NEXT: retq1184 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1185 half %f1, half %f2, metadata !"ole",1186 metadata !"fpexcept.strict") #01187 %res = select i1 %cond, i32 %a, i32 %b1188 ret i32 %res1189}1190 1191define i32 @test_f16_one_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1192; SSE2-LABEL: test_f16_one_s:1193; SSE2: # %bb.0:1194; SSE2-NEXT: pushq %rbp1195; SSE2-NEXT: pushq %rbx1196; SSE2-NEXT: pushq %rax1197; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1198; SSE2-NEXT: movl %esi, %ebx1199; SSE2-NEXT: movl %edi, %ebp1200; SSE2-NEXT: movaps %xmm1, %xmm01201; SSE2-NEXT: callq __extendhfsf2@PLT1202; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1203; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1204; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1205; SSE2-NEXT: callq __extendhfsf2@PLT1206; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1207; SSE2-NEXT: cmovel %ebx, %ebp1208; SSE2-NEXT: movl %ebp, %eax1209; SSE2-NEXT: addq $8, %rsp1210; SSE2-NEXT: popq %rbx1211; SSE2-NEXT: popq %rbp1212; SSE2-NEXT: retq1213;1214; AVX-LABEL: test_f16_one_s:1215; AVX: # %bb.0:1216; AVX-NEXT: movl %edi, %eax1217; AVX-NEXT: vpextrw $0, %xmm0, %ecx1218; AVX-NEXT: vpextrw $0, %xmm1, %edx1219; AVX-NEXT: movzwl %dx, %edx1220; AVX-NEXT: vmovd %edx, %xmm01221; AVX-NEXT: vcvtph2ps %xmm0, %xmm01222; AVX-NEXT: movzwl %cx, %ecx1223; AVX-NEXT: vmovd %ecx, %xmm11224; AVX-NEXT: vcvtph2ps %xmm1, %xmm11225; AVX-NEXT: vcomiss %xmm0, %xmm11226; AVX-NEXT: cmovel %esi, %eax1227; AVX-NEXT: retq1228;1229; X86-FP16-LABEL: test_f16_one_s:1230; X86-FP16: # %bb.0:1231; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1232; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01233; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1234; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1235; X86-FP16-NEXT: cmovnel %eax, %ecx1236; X86-FP16-NEXT: movl (%ecx), %eax1237; X86-FP16-NEXT: retl1238;1239; X64-FP16-LABEL: test_f16_one_s:1240; X64-FP16: # %bb.0:1241; X64-FP16-NEXT: movl %edi, %eax1242; X64-FP16-NEXT: vcomish %xmm1, %xmm01243; X64-FP16-NEXT: cmovel %esi, %eax1244; X64-FP16-NEXT: retq1245 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1246 half %f1, half %f2, metadata !"one",1247 metadata !"fpexcept.strict") #01248 %res = select i1 %cond, i32 %a, i32 %b1249 ret i32 %res1250}1251 1252define i32 @test_f16_ord_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1253; SSE2-LABEL: test_f16_ord_s:1254; SSE2: # %bb.0:1255; SSE2-NEXT: pushq %rbp1256; SSE2-NEXT: pushq %rbx1257; SSE2-NEXT: pushq %rax1258; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1259; SSE2-NEXT: movl %esi, %ebx1260; SSE2-NEXT: movl %edi, %ebp1261; SSE2-NEXT: movaps %xmm1, %xmm01262; SSE2-NEXT: callq __extendhfsf2@PLT1263; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1264; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1265; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1266; SSE2-NEXT: callq __extendhfsf2@PLT1267; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1268; SSE2-NEXT: cmovpl %ebx, %ebp1269; SSE2-NEXT: movl %ebp, %eax1270; SSE2-NEXT: addq $8, %rsp1271; SSE2-NEXT: popq %rbx1272; SSE2-NEXT: popq %rbp1273; SSE2-NEXT: retq1274;1275; AVX-LABEL: test_f16_ord_s:1276; AVX: # %bb.0:1277; AVX-NEXT: movl %edi, %eax1278; AVX-NEXT: vpextrw $0, %xmm0, %ecx1279; AVX-NEXT: vpextrw $0, %xmm1, %edx1280; AVX-NEXT: movzwl %dx, %edx1281; AVX-NEXT: vmovd %edx, %xmm01282; AVX-NEXT: vcvtph2ps %xmm0, %xmm01283; AVX-NEXT: movzwl %cx, %ecx1284; AVX-NEXT: vmovd %ecx, %xmm11285; AVX-NEXT: vcvtph2ps %xmm1, %xmm11286; AVX-NEXT: vcomiss %xmm0, %xmm11287; AVX-NEXT: cmovpl %esi, %eax1288; AVX-NEXT: retq1289;1290; X86-FP16-LABEL: test_f16_ord_s:1291; X86-FP16: # %bb.0:1292; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1293; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01294; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1295; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1296; X86-FP16-NEXT: cmovnpl %eax, %ecx1297; X86-FP16-NEXT: movl (%ecx), %eax1298; X86-FP16-NEXT: retl1299;1300; X64-FP16-LABEL: test_f16_ord_s:1301; X64-FP16: # %bb.0:1302; X64-FP16-NEXT: movl %edi, %eax1303; X64-FP16-NEXT: vcomish %xmm1, %xmm01304; X64-FP16-NEXT: cmovpl %esi, %eax1305; X64-FP16-NEXT: retq1306 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1307 half %f1, half %f2, metadata !"ord",1308 metadata !"fpexcept.strict") #01309 %res = select i1 %cond, i32 %a, i32 %b1310 ret i32 %res1311}1312 1313define i32 @test_f16_ueq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1314; SSE2-LABEL: test_f16_ueq_s:1315; SSE2: # %bb.0:1316; SSE2-NEXT: pushq %rbp1317; SSE2-NEXT: pushq %rbx1318; SSE2-NEXT: pushq %rax1319; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1320; SSE2-NEXT: movl %esi, %ebx1321; SSE2-NEXT: movl %edi, %ebp1322; SSE2-NEXT: movaps %xmm1, %xmm01323; SSE2-NEXT: callq __extendhfsf2@PLT1324; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1325; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1326; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1327; SSE2-NEXT: callq __extendhfsf2@PLT1328; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1329; SSE2-NEXT: cmovnel %ebx, %ebp1330; SSE2-NEXT: movl %ebp, %eax1331; SSE2-NEXT: addq $8, %rsp1332; SSE2-NEXT: popq %rbx1333; SSE2-NEXT: popq %rbp1334; SSE2-NEXT: retq1335;1336; AVX-LABEL: test_f16_ueq_s:1337; AVX: # %bb.0:1338; AVX-NEXT: movl %edi, %eax1339; AVX-NEXT: vpextrw $0, %xmm0, %ecx1340; AVX-NEXT: vpextrw $0, %xmm1, %edx1341; AVX-NEXT: movzwl %dx, %edx1342; AVX-NEXT: vmovd %edx, %xmm01343; AVX-NEXT: vcvtph2ps %xmm0, %xmm01344; AVX-NEXT: movzwl %cx, %ecx1345; AVX-NEXT: vmovd %ecx, %xmm11346; AVX-NEXT: vcvtph2ps %xmm1, %xmm11347; AVX-NEXT: vcomiss %xmm0, %xmm11348; AVX-NEXT: cmovnel %esi, %eax1349; AVX-NEXT: retq1350;1351; X86-FP16-LABEL: test_f16_ueq_s:1352; X86-FP16: # %bb.0:1353; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1354; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01355; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1356; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1357; X86-FP16-NEXT: cmovel %eax, %ecx1358; X86-FP16-NEXT: movl (%ecx), %eax1359; X86-FP16-NEXT: retl1360;1361; X64-FP16-LABEL: test_f16_ueq_s:1362; X64-FP16: # %bb.0:1363; X64-FP16-NEXT: movl %edi, %eax1364; X64-FP16-NEXT: vcomish %xmm1, %xmm01365; X64-FP16-NEXT: cmovnel %esi, %eax1366; X64-FP16-NEXT: retq1367 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1368 half %f1, half %f2, metadata !"ueq",1369 metadata !"fpexcept.strict") #01370 %res = select i1 %cond, i32 %a, i32 %b1371 ret i32 %res1372}1373 1374define i32 @test_f16_ugt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1375; SSE2-LABEL: test_f16_ugt_s:1376; SSE2: # %bb.0:1377; SSE2-NEXT: pushq %rbp1378; SSE2-NEXT: pushq %rbx1379; SSE2-NEXT: pushq %rax1380; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1381; SSE2-NEXT: movl %esi, %ebx1382; SSE2-NEXT: movl %edi, %ebp1383; SSE2-NEXT: movaps %xmm1, %xmm01384; SSE2-NEXT: callq __extendhfsf2@PLT1385; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1386; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1387; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1388; SSE2-NEXT: callq __extendhfsf2@PLT1389; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload1390; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero1391; SSE2-NEXT: comiss %xmm0, %xmm11392; SSE2-NEXT: cmovael %ebx, %ebp1393; SSE2-NEXT: movl %ebp, %eax1394; SSE2-NEXT: addq $8, %rsp1395; SSE2-NEXT: popq %rbx1396; SSE2-NEXT: popq %rbp1397; SSE2-NEXT: retq1398;1399; AVX-LABEL: test_f16_ugt_s:1400; AVX: # %bb.0:1401; AVX-NEXT: movl %edi, %eax1402; AVX-NEXT: vpextrw $0, %xmm1, %ecx1403; AVX-NEXT: vpextrw $0, %xmm0, %edx1404; AVX-NEXT: movzwl %dx, %edx1405; AVX-NEXT: vmovd %edx, %xmm01406; AVX-NEXT: vcvtph2ps %xmm0, %xmm01407; AVX-NEXT: movzwl %cx, %ecx1408; AVX-NEXT: vmovd %ecx, %xmm11409; AVX-NEXT: vcvtph2ps %xmm1, %xmm11410; AVX-NEXT: vcomiss %xmm0, %xmm11411; AVX-NEXT: cmovael %esi, %eax1412; AVX-NEXT: retq1413;1414; X86-FP16-LABEL: test_f16_ugt_s:1415; X86-FP16: # %bb.0:1416; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1417; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01418; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1419; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1420; X86-FP16-NEXT: cmovbl %eax, %ecx1421; X86-FP16-NEXT: movl (%ecx), %eax1422; X86-FP16-NEXT: retl1423;1424; X64-FP16-LABEL: test_f16_ugt_s:1425; X64-FP16: # %bb.0:1426; X64-FP16-NEXT: movl %edi, %eax1427; X64-FP16-NEXT: vcomish %xmm0, %xmm11428; X64-FP16-NEXT: cmovael %esi, %eax1429; X64-FP16-NEXT: retq1430 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1431 half %f1, half %f2, metadata !"ugt",1432 metadata !"fpexcept.strict") #01433 %res = select i1 %cond, i32 %a, i32 %b1434 ret i32 %res1435}1436 1437define i32 @test_f16_uge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1438; SSE2-LABEL: test_f16_uge_s:1439; SSE2: # %bb.0:1440; SSE2-NEXT: pushq %rbp1441; SSE2-NEXT: pushq %rbx1442; SSE2-NEXT: pushq %rax1443; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1444; SSE2-NEXT: movl %esi, %ebx1445; SSE2-NEXT: movl %edi, %ebp1446; SSE2-NEXT: movaps %xmm1, %xmm01447; SSE2-NEXT: callq __extendhfsf2@PLT1448; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1449; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1450; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1451; SSE2-NEXT: callq __extendhfsf2@PLT1452; SSE2-NEXT: movss (%rsp), %xmm1 # 4-byte Reload1453; SSE2-NEXT: # xmm1 = mem[0],zero,zero,zero1454; SSE2-NEXT: comiss %xmm0, %xmm11455; SSE2-NEXT: cmoval %ebx, %ebp1456; SSE2-NEXT: movl %ebp, %eax1457; SSE2-NEXT: addq $8, %rsp1458; SSE2-NEXT: popq %rbx1459; SSE2-NEXT: popq %rbp1460; SSE2-NEXT: retq1461;1462; AVX-LABEL: test_f16_uge_s:1463; AVX: # %bb.0:1464; AVX-NEXT: movl %edi, %eax1465; AVX-NEXT: vpextrw $0, %xmm1, %ecx1466; AVX-NEXT: vpextrw $0, %xmm0, %edx1467; AVX-NEXT: movzwl %dx, %edx1468; AVX-NEXT: vmovd %edx, %xmm01469; AVX-NEXT: vcvtph2ps %xmm0, %xmm01470; AVX-NEXT: movzwl %cx, %ecx1471; AVX-NEXT: vmovd %ecx, %xmm11472; AVX-NEXT: vcvtph2ps %xmm1, %xmm11473; AVX-NEXT: vcomiss %xmm0, %xmm11474; AVX-NEXT: cmoval %esi, %eax1475; AVX-NEXT: retq1476;1477; X86-FP16-LABEL: test_f16_uge_s:1478; X86-FP16: # %bb.0:1479; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1480; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01481; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1482; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1483; X86-FP16-NEXT: cmovbel %eax, %ecx1484; X86-FP16-NEXT: movl (%ecx), %eax1485; X86-FP16-NEXT: retl1486;1487; X64-FP16-LABEL: test_f16_uge_s:1488; X64-FP16: # %bb.0:1489; X64-FP16-NEXT: movl %edi, %eax1490; X64-FP16-NEXT: vcomish %xmm0, %xmm11491; X64-FP16-NEXT: cmoval %esi, %eax1492; X64-FP16-NEXT: retq1493 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1494 half %f1, half %f2, metadata !"uge",1495 metadata !"fpexcept.strict") #01496 %res = select i1 %cond, i32 %a, i32 %b1497 ret i32 %res1498}1499 1500define i32 @test_f16_ult_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1501; SSE2-LABEL: test_f16_ult_s:1502; SSE2: # %bb.0:1503; SSE2-NEXT: pushq %rbp1504; SSE2-NEXT: pushq %rbx1505; SSE2-NEXT: pushq %rax1506; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1507; SSE2-NEXT: movl %esi, %ebx1508; SSE2-NEXT: movl %edi, %ebp1509; SSE2-NEXT: movaps %xmm1, %xmm01510; SSE2-NEXT: callq __extendhfsf2@PLT1511; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1512; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1513; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1514; SSE2-NEXT: callq __extendhfsf2@PLT1515; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1516; SSE2-NEXT: cmovael %ebx, %ebp1517; SSE2-NEXT: movl %ebp, %eax1518; SSE2-NEXT: addq $8, %rsp1519; SSE2-NEXT: popq %rbx1520; SSE2-NEXT: popq %rbp1521; SSE2-NEXT: retq1522;1523; AVX-LABEL: test_f16_ult_s:1524; AVX: # %bb.0:1525; AVX-NEXT: movl %edi, %eax1526; AVX-NEXT: vpextrw $0, %xmm0, %ecx1527; AVX-NEXT: vpextrw $0, %xmm1, %edx1528; AVX-NEXT: movzwl %dx, %edx1529; AVX-NEXT: vmovd %edx, %xmm01530; AVX-NEXT: vcvtph2ps %xmm0, %xmm01531; AVX-NEXT: movzwl %cx, %ecx1532; AVX-NEXT: vmovd %ecx, %xmm11533; AVX-NEXT: vcvtph2ps %xmm1, %xmm11534; AVX-NEXT: vcomiss %xmm0, %xmm11535; AVX-NEXT: cmovael %esi, %eax1536; AVX-NEXT: retq1537;1538; X86-FP16-LABEL: test_f16_ult_s:1539; X86-FP16: # %bb.0:1540; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1541; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01542; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1543; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1544; X86-FP16-NEXT: cmovbl %eax, %ecx1545; X86-FP16-NEXT: movl (%ecx), %eax1546; X86-FP16-NEXT: retl1547;1548; X64-FP16-LABEL: test_f16_ult_s:1549; X64-FP16: # %bb.0:1550; X64-FP16-NEXT: movl %edi, %eax1551; X64-FP16-NEXT: vcomish %xmm1, %xmm01552; X64-FP16-NEXT: cmovael %esi, %eax1553; X64-FP16-NEXT: retq1554 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1555 half %f1, half %f2, metadata !"ult",1556 metadata !"fpexcept.strict") #01557 %res = select i1 %cond, i32 %a, i32 %b1558 ret i32 %res1559}1560 1561define i32 @test_f16_ule_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1562; SSE2-LABEL: test_f16_ule_s:1563; SSE2: # %bb.0:1564; SSE2-NEXT: pushq %rbp1565; SSE2-NEXT: pushq %rbx1566; SSE2-NEXT: pushq %rax1567; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1568; SSE2-NEXT: movl %esi, %ebx1569; SSE2-NEXT: movl %edi, %ebp1570; SSE2-NEXT: movaps %xmm1, %xmm01571; SSE2-NEXT: callq __extendhfsf2@PLT1572; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1573; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1574; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1575; SSE2-NEXT: callq __extendhfsf2@PLT1576; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1577; SSE2-NEXT: cmoval %ebx, %ebp1578; SSE2-NEXT: movl %ebp, %eax1579; SSE2-NEXT: addq $8, %rsp1580; SSE2-NEXT: popq %rbx1581; SSE2-NEXT: popq %rbp1582; SSE2-NEXT: retq1583;1584; AVX-LABEL: test_f16_ule_s:1585; AVX: # %bb.0:1586; AVX-NEXT: movl %edi, %eax1587; AVX-NEXT: vpextrw $0, %xmm0, %ecx1588; AVX-NEXT: vpextrw $0, %xmm1, %edx1589; AVX-NEXT: movzwl %dx, %edx1590; AVX-NEXT: vmovd %edx, %xmm01591; AVX-NEXT: vcvtph2ps %xmm0, %xmm01592; AVX-NEXT: movzwl %cx, %ecx1593; AVX-NEXT: vmovd %ecx, %xmm11594; AVX-NEXT: vcvtph2ps %xmm1, %xmm11595; AVX-NEXT: vcomiss %xmm0, %xmm11596; AVX-NEXT: cmoval %esi, %eax1597; AVX-NEXT: retq1598;1599; X86-FP16-LABEL: test_f16_ule_s:1600; X86-FP16: # %bb.0:1601; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1602; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01603; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1604; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1605; X86-FP16-NEXT: cmovbel %eax, %ecx1606; X86-FP16-NEXT: movl (%ecx), %eax1607; X86-FP16-NEXT: retl1608;1609; X64-FP16-LABEL: test_f16_ule_s:1610; X64-FP16: # %bb.0:1611; X64-FP16-NEXT: movl %edi, %eax1612; X64-FP16-NEXT: vcomish %xmm1, %xmm01613; X64-FP16-NEXT: cmoval %esi, %eax1614; X64-FP16-NEXT: retq1615 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1616 half %f1, half %f2, metadata !"ule",1617 metadata !"fpexcept.strict") #01618 %res = select i1 %cond, i32 %a, i32 %b1619 ret i32 %res1620}1621 1622define i32 @test_f16_une_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1623; SSE2-LABEL: test_f16_une_s:1624; SSE2: # %bb.0:1625; SSE2-NEXT: pushq %rbp1626; SSE2-NEXT: pushq %rbx1627; SSE2-NEXT: pushq %rax1628; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1629; SSE2-NEXT: movl %esi, %ebx1630; SSE2-NEXT: movl %edi, %ebp1631; SSE2-NEXT: movaps %xmm1, %xmm01632; SSE2-NEXT: callq __extendhfsf2@PLT1633; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1634; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1635; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1636; SSE2-NEXT: callq __extendhfsf2@PLT1637; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1638; SSE2-NEXT: cmovnel %ebp, %ebx1639; SSE2-NEXT: cmovpl %ebp, %ebx1640; SSE2-NEXT: movl %ebx, %eax1641; SSE2-NEXT: addq $8, %rsp1642; SSE2-NEXT: popq %rbx1643; SSE2-NEXT: popq %rbp1644; SSE2-NEXT: retq1645;1646; AVX-LABEL: test_f16_une_s:1647; AVX: # %bb.0:1648; AVX-NEXT: movl %esi, %eax1649; AVX-NEXT: vpextrw $0, %xmm0, %ecx1650; AVX-NEXT: vpextrw $0, %xmm1, %edx1651; AVX-NEXT: movzwl %dx, %edx1652; AVX-NEXT: vmovd %edx, %xmm01653; AVX-NEXT: vcvtph2ps %xmm0, %xmm01654; AVX-NEXT: movzwl %cx, %ecx1655; AVX-NEXT: vmovd %ecx, %xmm11656; AVX-NEXT: vcvtph2ps %xmm1, %xmm11657; AVX-NEXT: vcomiss %xmm0, %xmm11658; AVX-NEXT: cmovnel %edi, %eax1659; AVX-NEXT: cmovpl %edi, %eax1660; AVX-NEXT: retq1661;1662; X86-FP16-LABEL: test_f16_une_s:1663; X86-FP16: # %bb.0:1664; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1665; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01666; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1667; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1668; X86-FP16-NEXT: cmovnel %eax, %ecx1669; X86-FP16-NEXT: cmovpl %eax, %ecx1670; X86-FP16-NEXT: movl (%ecx), %eax1671; X86-FP16-NEXT: retl1672;1673; X64-FP16-LABEL: test_f16_une_s:1674; X64-FP16: # %bb.0:1675; X64-FP16-NEXT: movl %esi, %eax1676; X64-FP16-NEXT: vcomish %xmm1, %xmm01677; X64-FP16-NEXT: cmovnel %edi, %eax1678; X64-FP16-NEXT: cmovpl %edi, %eax1679; X64-FP16-NEXT: retq1680 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1681 half %f1, half %f2, metadata !"une",1682 metadata !"fpexcept.strict") #01683 %res = select i1 %cond, i32 %a, i32 %b1684 ret i32 %res1685}1686 1687define i32 @test_f16_uno_s(i32 %a, i32 %b, half %f1, half %f2) #0 {1688; SSE2-LABEL: test_f16_uno_s:1689; SSE2: # %bb.0:1690; SSE2-NEXT: pushq %rbp1691; SSE2-NEXT: pushq %rbx1692; SSE2-NEXT: pushq %rax1693; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1694; SSE2-NEXT: movl %esi, %ebx1695; SSE2-NEXT: movl %edi, %ebp1696; SSE2-NEXT: movaps %xmm1, %xmm01697; SSE2-NEXT: callq __extendhfsf2@PLT1698; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1699; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1700; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1701; SSE2-NEXT: callq __extendhfsf2@PLT1702; SSE2-NEXT: comiss (%rsp), %xmm0 # 4-byte Folded Reload1703; SSE2-NEXT: cmovnpl %ebx, %ebp1704; SSE2-NEXT: movl %ebp, %eax1705; SSE2-NEXT: addq $8, %rsp1706; SSE2-NEXT: popq %rbx1707; SSE2-NEXT: popq %rbp1708; SSE2-NEXT: retq1709;1710; AVX-LABEL: test_f16_uno_s:1711; AVX: # %bb.0:1712; AVX-NEXT: movl %edi, %eax1713; AVX-NEXT: vpextrw $0, %xmm0, %ecx1714; AVX-NEXT: vpextrw $0, %xmm1, %edx1715; AVX-NEXT: movzwl %dx, %edx1716; AVX-NEXT: vmovd %edx, %xmm01717; AVX-NEXT: vcvtph2ps %xmm0, %xmm01718; AVX-NEXT: movzwl %cx, %ecx1719; AVX-NEXT: vmovd %ecx, %xmm11720; AVX-NEXT: vcvtph2ps %xmm1, %xmm11721; AVX-NEXT: vcomiss %xmm0, %xmm11722; AVX-NEXT: cmovnpl %esi, %eax1723; AVX-NEXT: retq1724;1725; X86-FP16-LABEL: test_f16_uno_s:1726; X86-FP16: # %bb.0:1727; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1728; X86-FP16-NEXT: vcomish {{[0-9]+}}(%esp), %xmm01729; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %eax1730; X86-FP16-NEXT: leal {{[0-9]+}}(%esp), %ecx1731; X86-FP16-NEXT: cmovpl %eax, %ecx1732; X86-FP16-NEXT: movl (%ecx), %eax1733; X86-FP16-NEXT: retl1734;1735; X64-FP16-LABEL: test_f16_uno_s:1736; X64-FP16: # %bb.0:1737; X64-FP16-NEXT: movl %edi, %eax1738; X64-FP16-NEXT: vcomish %xmm1, %xmm01739; X64-FP16-NEXT: cmovnpl %esi, %eax1740; X64-FP16-NEXT: retq1741 %cond = call i1 @llvm.experimental.constrained.fcmps.f16(1742 half %f1, half %f2, metadata !"uno",1743 metadata !"fpexcept.strict") #01744 %res = select i1 %cond, i32 %a, i32 %b1745 ret i32 %res1746}1747 1748define void @foo(half %0, half %1) #0 {1749; SSE2-LABEL: foo:1750; SSE2: # %bb.0:1751; SSE2-NEXT: pushq %rax1752; SSE2-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill1753; SSE2-NEXT: movaps %xmm1, %xmm01754; SSE2-NEXT: callq __extendhfsf2@PLT1755; SSE2-NEXT: movss %xmm0, (%rsp) # 4-byte Spill1756; SSE2-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload1757; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero1758; SSE2-NEXT: callq __extendhfsf2@PLT1759; SSE2-NEXT: ucomiss (%rsp), %xmm0 # 4-byte Folded Reload1760; SSE2-NEXT: jbe .LBB28_11761; SSE2-NEXT: # %bb.2:1762; SSE2-NEXT: popq %rax1763; SSE2-NEXT: jmp bar@PLT # TAILCALL1764; SSE2-NEXT: .LBB28_1:1765; SSE2-NEXT: popq %rax1766; SSE2-NEXT: retq1767;1768; AVX-LABEL: foo:1769; AVX: # %bb.0:1770; AVX-NEXT: vpextrw $0, %xmm0, %eax1771; AVX-NEXT: vpextrw $0, %xmm1, %ecx1772; AVX-NEXT: movzwl %cx, %ecx1773; AVX-NEXT: vmovd %ecx, %xmm01774; AVX-NEXT: vcvtph2ps %xmm0, %xmm01775; AVX-NEXT: movzwl %ax, %eax1776; AVX-NEXT: vmovd %eax, %xmm11777; AVX-NEXT: vcvtph2ps %xmm1, %xmm11778; AVX-NEXT: vucomiss %xmm0, %xmm11779; AVX-NEXT: ja bar@PLT # TAILCALL1780; AVX-NEXT: # %bb.1:1781; AVX-NEXT: retq1782;1783; X86-FP16-LABEL: foo:1784; X86-FP16: # %bb.0:1785; X86-FP16-NEXT: vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero1786; X86-FP16-NEXT: vucomish {{[0-9]+}}(%esp), %xmm01787; X86-FP16-NEXT: ja bar@PLT # TAILCALL1788; X86-FP16-NEXT: # %bb.1:1789; X86-FP16-NEXT: retl1790;1791; X64-FP16-LABEL: foo:1792; X64-FP16: # %bb.0:1793; X64-FP16-NEXT: vucomish %xmm1, %xmm01794; X64-FP16-NEXT: ja bar@PLT # TAILCALL1795; X64-FP16-NEXT: # %bb.1:1796; X64-FP16-NEXT: retq1797 %3 = call i1 @llvm.experimental.constrained.fcmp.f16( half %0, half %1, metadata !"ogt", metadata !"fpexcept.strict") #01798 br i1 %3, label %4, label %51799 18004: ; preds = %21801 tail call void @bar() #01802 br label %51803 18045: ; preds = %4, %21805 ret void1806}1807declare void @bar()1808 1809attributes #0 = { strictfp nounwind }1810 1811declare i1 @llvm.experimental.constrained.fcmp.f16(half, half, metadata, metadata)1812declare i1 @llvm.experimental.constrained.fcmps.f16(half, half, metadata, metadata)1813