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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX5125; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X866; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X647 8declare half @llvm.experimental.constrained.sitofp.f16.i1(i1, metadata, metadata)9declare half @llvm.experimental.constrained.sitofp.f16.i8(i8, metadata, metadata)10declare half @llvm.experimental.constrained.sitofp.f16.i16(i16, metadata, metadata)11declare half @llvm.experimental.constrained.sitofp.f16.i32(i32, metadata, metadata)12declare half @llvm.experimental.constrained.sitofp.f16.i64(i64, metadata, metadata)13declare half @llvm.experimental.constrained.uitofp.f16.i1(i1, metadata, metadata)14declare half @llvm.experimental.constrained.uitofp.f16.i8(i8, metadata, metadata)15declare half @llvm.experimental.constrained.uitofp.f16.i16(i16, metadata, metadata)16declare half @llvm.experimental.constrained.uitofp.f16.i32(i32, metadata, metadata)17declare half @llvm.experimental.constrained.uitofp.f16.i64(i64, metadata, metadata)18 19define half @sitofp_i1tof16(i1 %x) #0 {20; SSE2-LABEL: sitofp_i1tof16:21; SSE2: # %bb.0:22; SSE2-NEXT: pushq %rax23; SSE2-NEXT: andb $1, %dil24; SSE2-NEXT: negb %dil25; SSE2-NEXT: movsbl %dil, %eax26; SSE2-NEXT: cvtsi2ss %eax, %xmm027; SSE2-NEXT: callq __truncsfhf2@PLT28; SSE2-NEXT: popq %rax29; SSE2-NEXT: retq30;31; AVX-LABEL: sitofp_i1tof16:32; AVX: # %bb.0:33; AVX-NEXT: andb $1, %dil34; AVX-NEXT: negb %dil35; AVX-NEXT: movsbl %dil, %eax36; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm037; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm138; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]39; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm040; AVX-NEXT: retq41;42; X86-LABEL: sitofp_i1tof16:43; X86: # %bb.0:44; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax45; X86-NEXT: andb $1, %al46; X86-NEXT: negb %al47; X86-NEXT: movsbl %al, %eax48; X86-NEXT: vcvtsi2sh %eax, %xmm7, %xmm049; X86-NEXT: retl50;51; X64-LABEL: sitofp_i1tof16:52; X64: # %bb.0:53; X64-NEXT: andb $1, %dil54; X64-NEXT: negb %dil55; X64-NEXT: movsbl %dil, %eax56; X64-NEXT: vcvtsi2sh %eax, %xmm31, %xmm057; X64-NEXT: retq58 %result = call half @llvm.experimental.constrained.sitofp.f16.i1(i1 %x,59 metadata !"round.dynamic",60 metadata !"fpexcept.strict") #061 ret half %result62}63 64define half @sitofp_i8tof16(i8 %x) #0 {65; SSE2-LABEL: sitofp_i8tof16:66; SSE2: # %bb.0:67; SSE2-NEXT: pushq %rax68; SSE2-NEXT: movsbl %dil, %eax69; SSE2-NEXT: cvtsi2ss %eax, %xmm070; SSE2-NEXT: callq __truncsfhf2@PLT71; SSE2-NEXT: popq %rax72; SSE2-NEXT: retq73;74; AVX-LABEL: sitofp_i8tof16:75; AVX: # %bb.0:76; AVX-NEXT: movsbl %dil, %eax77; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm078; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm179; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]80; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm081; AVX-NEXT: retq82;83; X86-LABEL: sitofp_i8tof16:84; X86: # %bb.0:85; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax86; X86-NEXT: vcvtsi2sh %eax, %xmm7, %xmm087; X86-NEXT: retl88;89; X64-LABEL: sitofp_i8tof16:90; X64: # %bb.0:91; X64-NEXT: movsbl %dil, %eax92; X64-NEXT: vcvtsi2sh %eax, %xmm31, %xmm093; X64-NEXT: retq94 %result = call half @llvm.experimental.constrained.sitofp.f16.i8(i8 %x,95 metadata !"round.dynamic",96 metadata !"fpexcept.strict") #097 ret half %result98}99 100define half @sitofp_i16tof16(i16 %x) #0 {101; SSE2-LABEL: sitofp_i16tof16:102; SSE2: # %bb.0:103; SSE2-NEXT: pushq %rax104; SSE2-NEXT: movswl %di, %eax105; SSE2-NEXT: cvtsi2ss %eax, %xmm0106; SSE2-NEXT: callq __truncsfhf2@PLT107; SSE2-NEXT: popq %rax108; SSE2-NEXT: retq109;110; AVX-LABEL: sitofp_i16tof16:111; AVX: # %bb.0:112; AVX-NEXT: movswl %di, %eax113; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm0114; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1115; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]116; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0117; AVX-NEXT: retq118;119; X86-LABEL: sitofp_i16tof16:120; X86: # %bb.0:121; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax122; X86-NEXT: vcvtsi2sh %eax, %xmm7, %xmm0123; X86-NEXT: retl124;125; X64-LABEL: sitofp_i16tof16:126; X64: # %bb.0:127; X64-NEXT: movswl %di, %eax128; X64-NEXT: vcvtsi2sh %eax, %xmm31, %xmm0129; X64-NEXT: retq130 %result = call half @llvm.experimental.constrained.sitofp.f16.i16(i16 %x,131 metadata !"round.dynamic",132 metadata !"fpexcept.strict") #0133 ret half %result134}135 136define half @sitofp_i32tof16(i32 %x) #0 {137; SSE2-LABEL: sitofp_i32tof16:138; SSE2: # %bb.0:139; SSE2-NEXT: pushq %rax140; SSE2-NEXT: cvtsi2ss %edi, %xmm0141; SSE2-NEXT: callq __truncsfhf2@PLT142; SSE2-NEXT: popq %rax143; SSE2-NEXT: retq144;145; AVX-LABEL: sitofp_i32tof16:146; AVX: # %bb.0:147; AVX-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0148; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1149; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]150; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0151; AVX-NEXT: retq152;153; X86-LABEL: sitofp_i32tof16:154; X86: # %bb.0:155; X86-NEXT: vcvtsi2shl {{[0-9]+}}(%esp), %xmm7, %xmm0156; X86-NEXT: retl157;158; X64-LABEL: sitofp_i32tof16:159; X64: # %bb.0:160; X64-NEXT: vcvtsi2sh %edi, %xmm31, %xmm0161; X64-NEXT: retq162 %result = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %x,163 metadata !"round.dynamic",164 metadata !"fpexcept.strict") #0165 ret half %result166}167 168define half @sitofp_i64tof16(i64 %x) #0 {169; SSE2-LABEL: sitofp_i64tof16:170; SSE2: # %bb.0:171; SSE2-NEXT: pushq %rax172; SSE2-NEXT: cvtsi2ss %rdi, %xmm0173; SSE2-NEXT: callq __truncsfhf2@PLT174; SSE2-NEXT: popq %rax175; SSE2-NEXT: retq176;177; AVX-LABEL: sitofp_i64tof16:178; AVX: # %bb.0:179; AVX-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm0180; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1181; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]182; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0183; AVX-NEXT: retq184;185; X86-LABEL: sitofp_i64tof16:186; X86: # %bb.0:187; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero188; X86-NEXT: vcvtqq2ph %xmm0, %xmm0189; X86-NEXT: retl190;191; X64-LABEL: sitofp_i64tof16:192; X64: # %bb.0:193; X64-NEXT: vcvtsi2sh %rdi, %xmm31, %xmm0194; X64-NEXT: retq195 %result = call half @llvm.experimental.constrained.sitofp.f16.i64(i64 %x,196 metadata !"round.dynamic",197 metadata !"fpexcept.strict") #0198 ret half %result199}200 201define half @uitofp_i1tof16(i1 %x) #0 {202; SSE2-LABEL: uitofp_i1tof16:203; SSE2: # %bb.0:204; SSE2-NEXT: pushq %rax205; SSE2-NEXT: andl $1, %edi206; SSE2-NEXT: cvtsi2ss %edi, %xmm0207; SSE2-NEXT: callq __truncsfhf2@PLT208; SSE2-NEXT: popq %rax209; SSE2-NEXT: retq210;211; AVX-LABEL: uitofp_i1tof16:212; AVX: # %bb.0:213; AVX-NEXT: andl $1, %edi214; AVX-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0215; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1216; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]217; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0218; AVX-NEXT: retq219;220; X86-LABEL: uitofp_i1tof16:221; X86: # %bb.0:222; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax223; X86-NEXT: andb $1, %al224; X86-NEXT: movzbl %al, %eax225; X86-NEXT: vcvtsi2sh %eax, %xmm7, %xmm0226; X86-NEXT: retl227;228; X64-LABEL: uitofp_i1tof16:229; X64: # %bb.0:230; X64-NEXT: andl $1, %edi231; X64-NEXT: vcvtsi2sh %edi, %xmm31, %xmm0232; X64-NEXT: retq233 %result = call half @llvm.experimental.constrained.uitofp.f16.i1(i1 %x,234 metadata !"round.dynamic",235 metadata !"fpexcept.strict") #0236 ret half %result237}238 239define half @uitofp_i8tof16(i8 %x) #0 {240; SSE2-LABEL: uitofp_i8tof16:241; SSE2: # %bb.0:242; SSE2-NEXT: pushq %rax243; SSE2-NEXT: movzbl %dil, %eax244; SSE2-NEXT: cvtsi2ss %eax, %xmm0245; SSE2-NEXT: callq __truncsfhf2@PLT246; SSE2-NEXT: popq %rax247; SSE2-NEXT: retq248;249; AVX-LABEL: uitofp_i8tof16:250; AVX: # %bb.0:251; AVX-NEXT: movzbl %dil, %eax252; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm0253; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1254; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]255; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0256; AVX-NEXT: retq257;258; X86-LABEL: uitofp_i8tof16:259; X86: # %bb.0:260; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax261; X86-NEXT: vcvtsi2sh %eax, %xmm7, %xmm0262; X86-NEXT: retl263;264; X64-LABEL: uitofp_i8tof16:265; X64: # %bb.0:266; X64-NEXT: movzbl %dil, %eax267; X64-NEXT: vcvtsi2sh %eax, %xmm31, %xmm0268; X64-NEXT: retq269 %result = call half @llvm.experimental.constrained.uitofp.f16.i8(i8 %x,270 metadata !"round.dynamic",271 metadata !"fpexcept.strict") #0272 ret half %result273}274 275define half @uitofp_i16tof16(i16 %x) #0 {276; SSE2-LABEL: uitofp_i16tof16:277; SSE2: # %bb.0:278; SSE2-NEXT: pushq %rax279; SSE2-NEXT: movzwl %di, %eax280; SSE2-NEXT: cvtsi2ss %eax, %xmm0281; SSE2-NEXT: callq __truncsfhf2@PLT282; SSE2-NEXT: popq %rax283; SSE2-NEXT: retq284;285; AVX-LABEL: uitofp_i16tof16:286; AVX: # %bb.0:287; AVX-NEXT: movzwl %di, %eax288; AVX-NEXT: vcvtsi2ss %eax, %xmm15, %xmm0289; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1290; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]291; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0292; AVX-NEXT: retq293;294; X86-LABEL: uitofp_i16tof16:295; X86: # %bb.0:296; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax297; X86-NEXT: vcvtsi2sh %eax, %xmm7, %xmm0298; X86-NEXT: retl299;300; X64-LABEL: uitofp_i16tof16:301; X64: # %bb.0:302; X64-NEXT: movzwl %di, %eax303; X64-NEXT: vcvtsi2sh %eax, %xmm31, %xmm0304; X64-NEXT: retq305 %result = call half @llvm.experimental.constrained.uitofp.f16.i16(i16 %x,306 metadata !"round.dynamic",307 metadata !"fpexcept.strict") #0308 ret half %result309}310 311define half @uitofp_i32tof16(i32 %x) #0 {312; SSE2-LABEL: uitofp_i32tof16:313; SSE2: # %bb.0:314; SSE2-NEXT: pushq %rax315; SSE2-NEXT: movl %edi, %eax316; SSE2-NEXT: cvtsi2ss %rax, %xmm0317; SSE2-NEXT: callq __truncsfhf2@PLT318; SSE2-NEXT: popq %rax319; SSE2-NEXT: retq320;321; F16C-LABEL: uitofp_i32tof16:322; F16C: # %bb.0:323; F16C-NEXT: movl %edi, %eax324; F16C-NEXT: vcvtsi2ss %rax, %xmm15, %xmm0325; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1326; F16C-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]327; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0328; F16C-NEXT: retq329;330; AVX512-LABEL: uitofp_i32tof16:331; AVX512: # %bb.0:332; AVX512-NEXT: vcvtusi2ss %edi, %xmm15, %xmm0333; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1334; AVX512-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]335; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0336; AVX512-NEXT: retq337;338; X86-LABEL: uitofp_i32tof16:339; X86: # %bb.0:340; X86-NEXT: vcvtusi2shl {{[0-9]+}}(%esp), %xmm7, %xmm0341; X86-NEXT: retl342;343; X64-LABEL: uitofp_i32tof16:344; X64: # %bb.0:345; X64-NEXT: vcvtusi2sh %edi, %xmm31, %xmm0346; X64-NEXT: retq347 %result = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %x,348 metadata !"round.dynamic",349 metadata !"fpexcept.strict") #0350 ret half %result351}352 353define half @uitofp_i64tof16(i64 %x) #0 {354; SSE2-LABEL: uitofp_i64tof16:355; SSE2: # %bb.0:356; SSE2-NEXT: movq %rdi, %rax357; SSE2-NEXT: shrq %rax358; SSE2-NEXT: movl %edi, %ecx359; SSE2-NEXT: andl $1, %ecx360; SSE2-NEXT: orq %rax, %rcx361; SSE2-NEXT: testq %rdi, %rdi362; SSE2-NEXT: cmovnsq %rdi, %rcx363; SSE2-NEXT: cvtsi2ss %rcx, %xmm1364; SSE2-NEXT: movaps %xmm1, %xmm0365; SSE2-NEXT: addss %xmm1, %xmm0366; SSE2-NEXT: js .LBB9_2367; SSE2-NEXT: # %bb.1:368; SSE2-NEXT: movaps %xmm1, %xmm0369; SSE2-NEXT: .LBB9_2:370; SSE2-NEXT: pushq %rax371; SSE2-NEXT: callq __truncsfhf2@PLT372; SSE2-NEXT: popq %rax373; SSE2-NEXT: retq374;375; F16C-LABEL: uitofp_i64tof16:376; F16C: # %bb.0:377; F16C-NEXT: movq %rdi, %rax378; F16C-NEXT: shrq %rax379; F16C-NEXT: movl %edi, %ecx380; F16C-NEXT: andl $1, %ecx381; F16C-NEXT: orq %rax, %rcx382; F16C-NEXT: testq %rdi, %rdi383; F16C-NEXT: cmovnsq %rdi, %rcx384; F16C-NEXT: vcvtsi2ss %rcx, %xmm15, %xmm0385; F16C-NEXT: jns .LBB9_2386; F16C-NEXT: # %bb.1:387; F16C-NEXT: vaddss %xmm0, %xmm0, %xmm0388; F16C-NEXT: .LBB9_2:389; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1390; F16C-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]391; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0392; F16C-NEXT: retq393;394; AVX512-LABEL: uitofp_i64tof16:395; AVX512: # %bb.0:396; AVX512-NEXT: vcvtusi2ss %rdi, %xmm15, %xmm0397; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1398; AVX512-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]399; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0400; AVX512-NEXT: retq401;402; X86-LABEL: uitofp_i64tof16:403; X86: # %bb.0:404; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero405; X86-NEXT: vcvtuqq2ph %xmm0, %xmm0406; X86-NEXT: retl407;408; X64-LABEL: uitofp_i64tof16:409; X64: # %bb.0:410; X64-NEXT: vcvtusi2sh %rdi, %xmm31, %xmm0411; X64-NEXT: retq412 %result = call half @llvm.experimental.constrained.uitofp.f16.i64(i64 %x,413 metadata !"round.dynamic",414 metadata !"fpexcept.strict") #0415 ret half %result416}417 418attributes #0 = { strictfp nounwind }419