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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefix=SSE41-X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefix=SSE41-X644; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-X865; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-X646; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX-X867; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX-X648 9declare float @llvm.experimental.constrained.ceil.f32(float, metadata)10declare double @llvm.experimental.constrained.ceil.f64(double, metadata)11declare float @llvm.experimental.constrained.floor.f32(float, metadata)12declare double @llvm.experimental.constrained.floor.f64(double, metadata)13declare float @llvm.experimental.constrained.trunc.f32(float, metadata)14declare double @llvm.experimental.constrained.trunc.f64(double, metadata)15declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)16declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)17declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)18declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)19declare float @llvm.experimental.constrained.round.f32(float, metadata)20declare double @llvm.experimental.constrained.round.f64(double, metadata)21declare float @llvm.experimental.constrained.roundeven.f32(float, metadata)22declare double @llvm.experimental.constrained.roundeven.f64(double, metadata)23 24define float @fceil32(float %f) #0 {25; SSE41-X86-LABEL: fceil32:26; SSE41-X86: # %bb.0:27; SSE41-X86-NEXT: pushl %eax28; SSE41-X86-NEXT: .cfi_def_cfa_offset 829; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero30; SSE41-X86-NEXT: roundss $10, %xmm0, %xmm031; SSE41-X86-NEXT: movss %xmm0, (%esp)32; SSE41-X86-NEXT: flds (%esp)33; SSE41-X86-NEXT: wait34; SSE41-X86-NEXT: popl %eax35; SSE41-X86-NEXT: .cfi_def_cfa_offset 436; SSE41-X86-NEXT: retl37;38; SSE41-X64-LABEL: fceil32:39; SSE41-X64: # %bb.0:40; SSE41-X64-NEXT: roundss $10, %xmm0, %xmm041; SSE41-X64-NEXT: retq42;43; AVX-X86-LABEL: fceil32:44; AVX-X86: # %bb.0:45; AVX-X86-NEXT: pushl %eax46; AVX-X86-NEXT: .cfi_def_cfa_offset 847; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero48; AVX-X86-NEXT: vroundss $10, %xmm0, %xmm0, %xmm049; AVX-X86-NEXT: vmovss %xmm0, (%esp)50; AVX-X86-NEXT: flds (%esp)51; AVX-X86-NEXT: wait52; AVX-X86-NEXT: popl %eax53; AVX-X86-NEXT: .cfi_def_cfa_offset 454; AVX-X86-NEXT: retl55;56; AVX-X64-LABEL: fceil32:57; AVX-X64: # %bb.0:58; AVX-X64-NEXT: vroundss $10, %xmm0, %xmm0, %xmm059; AVX-X64-NEXT: retq60 %res = call float @llvm.experimental.constrained.ceil.f32(61 float %f, metadata !"fpexcept.strict") #062 ret float %res63}64 65define double @fceilf64(double %f) #0 {66; SSE41-X86-LABEL: fceilf64:67; SSE41-X86: # %bb.0:68; SSE41-X86-NEXT: pushl %ebp69; SSE41-X86-NEXT: .cfi_def_cfa_offset 870; SSE41-X86-NEXT: .cfi_offset %ebp, -871; SSE41-X86-NEXT: movl %esp, %ebp72; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp73; SSE41-X86-NEXT: andl $-8, %esp74; SSE41-X86-NEXT: subl $8, %esp75; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero76; SSE41-X86-NEXT: roundsd $10, %xmm0, %xmm077; SSE41-X86-NEXT: movsd %xmm0, (%esp)78; SSE41-X86-NEXT: fldl (%esp)79; SSE41-X86-NEXT: wait80; SSE41-X86-NEXT: movl %ebp, %esp81; SSE41-X86-NEXT: popl %ebp82; SSE41-X86-NEXT: .cfi_def_cfa %esp, 483; SSE41-X86-NEXT: retl84;85; SSE41-X64-LABEL: fceilf64:86; SSE41-X64: # %bb.0:87; SSE41-X64-NEXT: roundsd $10, %xmm0, %xmm088; SSE41-X64-NEXT: retq89;90; AVX-X86-LABEL: fceilf64:91; AVX-X86: # %bb.0:92; AVX-X86-NEXT: pushl %ebp93; AVX-X86-NEXT: .cfi_def_cfa_offset 894; AVX-X86-NEXT: .cfi_offset %ebp, -895; AVX-X86-NEXT: movl %esp, %ebp96; AVX-X86-NEXT: .cfi_def_cfa_register %ebp97; AVX-X86-NEXT: andl $-8, %esp98; AVX-X86-NEXT: subl $8, %esp99; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero100; AVX-X86-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0101; AVX-X86-NEXT: vmovsd %xmm0, (%esp)102; AVX-X86-NEXT: fldl (%esp)103; AVX-X86-NEXT: wait104; AVX-X86-NEXT: movl %ebp, %esp105; AVX-X86-NEXT: popl %ebp106; AVX-X86-NEXT: .cfi_def_cfa %esp, 4107; AVX-X86-NEXT: retl108;109; AVX-X64-LABEL: fceilf64:110; AVX-X64: # %bb.0:111; AVX-X64-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0112; AVX-X64-NEXT: retq113 %res = call double @llvm.experimental.constrained.ceil.f64(114 double %f, metadata !"fpexcept.strict") #0115 ret double %res116}117 118define float @ffloor32(float %f) #0 {119; SSE41-X86-LABEL: ffloor32:120; SSE41-X86: # %bb.0:121; SSE41-X86-NEXT: pushl %eax122; SSE41-X86-NEXT: .cfi_def_cfa_offset 8123; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero124; SSE41-X86-NEXT: roundss $9, %xmm0, %xmm0125; SSE41-X86-NEXT: movss %xmm0, (%esp)126; SSE41-X86-NEXT: flds (%esp)127; SSE41-X86-NEXT: wait128; SSE41-X86-NEXT: popl %eax129; SSE41-X86-NEXT: .cfi_def_cfa_offset 4130; SSE41-X86-NEXT: retl131;132; SSE41-X64-LABEL: ffloor32:133; SSE41-X64: # %bb.0:134; SSE41-X64-NEXT: roundss $9, %xmm0, %xmm0135; SSE41-X64-NEXT: retq136;137; AVX-X86-LABEL: ffloor32:138; AVX-X86: # %bb.0:139; AVX-X86-NEXT: pushl %eax140; AVX-X86-NEXT: .cfi_def_cfa_offset 8141; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero142; AVX-X86-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0143; AVX-X86-NEXT: vmovss %xmm0, (%esp)144; AVX-X86-NEXT: flds (%esp)145; AVX-X86-NEXT: wait146; AVX-X86-NEXT: popl %eax147; AVX-X86-NEXT: .cfi_def_cfa_offset 4148; AVX-X86-NEXT: retl149;150; AVX-X64-LABEL: ffloor32:151; AVX-X64: # %bb.0:152; AVX-X64-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0153; AVX-X64-NEXT: retq154 %res = call float @llvm.experimental.constrained.floor.f32(155 float %f, metadata !"fpexcept.strict") #0156 ret float %res157}158 159define double @ffloorf64(double %f) #0 {160; SSE41-X86-LABEL: ffloorf64:161; SSE41-X86: # %bb.0:162; SSE41-X86-NEXT: pushl %ebp163; SSE41-X86-NEXT: .cfi_def_cfa_offset 8164; SSE41-X86-NEXT: .cfi_offset %ebp, -8165; SSE41-X86-NEXT: movl %esp, %ebp166; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp167; SSE41-X86-NEXT: andl $-8, %esp168; SSE41-X86-NEXT: subl $8, %esp169; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero170; SSE41-X86-NEXT: roundsd $9, %xmm0, %xmm0171; SSE41-X86-NEXT: movsd %xmm0, (%esp)172; SSE41-X86-NEXT: fldl (%esp)173; SSE41-X86-NEXT: wait174; SSE41-X86-NEXT: movl %ebp, %esp175; SSE41-X86-NEXT: popl %ebp176; SSE41-X86-NEXT: .cfi_def_cfa %esp, 4177; SSE41-X86-NEXT: retl178;179; SSE41-X64-LABEL: ffloorf64:180; SSE41-X64: # %bb.0:181; SSE41-X64-NEXT: roundsd $9, %xmm0, %xmm0182; SSE41-X64-NEXT: retq183;184; AVX-X86-LABEL: ffloorf64:185; AVX-X86: # %bb.0:186; AVX-X86-NEXT: pushl %ebp187; AVX-X86-NEXT: .cfi_def_cfa_offset 8188; AVX-X86-NEXT: .cfi_offset %ebp, -8189; AVX-X86-NEXT: movl %esp, %ebp190; AVX-X86-NEXT: .cfi_def_cfa_register %ebp191; AVX-X86-NEXT: andl $-8, %esp192; AVX-X86-NEXT: subl $8, %esp193; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero194; AVX-X86-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0195; AVX-X86-NEXT: vmovsd %xmm0, (%esp)196; AVX-X86-NEXT: fldl (%esp)197; AVX-X86-NEXT: wait198; AVX-X86-NEXT: movl %ebp, %esp199; AVX-X86-NEXT: popl %ebp200; AVX-X86-NEXT: .cfi_def_cfa %esp, 4201; AVX-X86-NEXT: retl202;203; AVX-X64-LABEL: ffloorf64:204; AVX-X64: # %bb.0:205; AVX-X64-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0206; AVX-X64-NEXT: retq207 %res = call double @llvm.experimental.constrained.floor.f64(208 double %f, metadata !"fpexcept.strict") #0209 ret double %res210}211 212define float @ftrunc32(float %f) #0 {213; SSE41-X86-LABEL: ftrunc32:214; SSE41-X86: # %bb.0:215; SSE41-X86-NEXT: pushl %eax216; SSE41-X86-NEXT: .cfi_def_cfa_offset 8217; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero218; SSE41-X86-NEXT: roundss $11, %xmm0, %xmm0219; SSE41-X86-NEXT: movss %xmm0, (%esp)220; SSE41-X86-NEXT: flds (%esp)221; SSE41-X86-NEXT: wait222; SSE41-X86-NEXT: popl %eax223; SSE41-X86-NEXT: .cfi_def_cfa_offset 4224; SSE41-X86-NEXT: retl225;226; SSE41-X64-LABEL: ftrunc32:227; SSE41-X64: # %bb.0:228; SSE41-X64-NEXT: roundss $11, %xmm0, %xmm0229; SSE41-X64-NEXT: retq230;231; AVX-X86-LABEL: ftrunc32:232; AVX-X86: # %bb.0:233; AVX-X86-NEXT: pushl %eax234; AVX-X86-NEXT: .cfi_def_cfa_offset 8235; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero236; AVX-X86-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0237; AVX-X86-NEXT: vmovss %xmm0, (%esp)238; AVX-X86-NEXT: flds (%esp)239; AVX-X86-NEXT: wait240; AVX-X86-NEXT: popl %eax241; AVX-X86-NEXT: .cfi_def_cfa_offset 4242; AVX-X86-NEXT: retl243;244; AVX-X64-LABEL: ftrunc32:245; AVX-X64: # %bb.0:246; AVX-X64-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0247; AVX-X64-NEXT: retq248 %res = call float @llvm.experimental.constrained.trunc.f32(249 float %f, metadata !"fpexcept.strict") #0250 ret float %res251}252 253define double @ftruncf64(double %f) #0 {254; SSE41-X86-LABEL: ftruncf64:255; SSE41-X86: # %bb.0:256; SSE41-X86-NEXT: pushl %ebp257; SSE41-X86-NEXT: .cfi_def_cfa_offset 8258; SSE41-X86-NEXT: .cfi_offset %ebp, -8259; SSE41-X86-NEXT: movl %esp, %ebp260; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp261; SSE41-X86-NEXT: andl $-8, %esp262; SSE41-X86-NEXT: subl $8, %esp263; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero264; SSE41-X86-NEXT: roundsd $11, %xmm0, %xmm0265; SSE41-X86-NEXT: movsd %xmm0, (%esp)266; SSE41-X86-NEXT: fldl (%esp)267; SSE41-X86-NEXT: wait268; SSE41-X86-NEXT: movl %ebp, %esp269; SSE41-X86-NEXT: popl %ebp270; SSE41-X86-NEXT: .cfi_def_cfa %esp, 4271; SSE41-X86-NEXT: retl272;273; SSE41-X64-LABEL: ftruncf64:274; SSE41-X64: # %bb.0:275; SSE41-X64-NEXT: roundsd $11, %xmm0, %xmm0276; SSE41-X64-NEXT: retq277;278; AVX-X86-LABEL: ftruncf64:279; AVX-X86: # %bb.0:280; AVX-X86-NEXT: pushl %ebp281; AVX-X86-NEXT: .cfi_def_cfa_offset 8282; AVX-X86-NEXT: .cfi_offset %ebp, -8283; AVX-X86-NEXT: movl %esp, %ebp284; AVX-X86-NEXT: .cfi_def_cfa_register %ebp285; AVX-X86-NEXT: andl $-8, %esp286; AVX-X86-NEXT: subl $8, %esp287; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero288; AVX-X86-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0289; AVX-X86-NEXT: vmovsd %xmm0, (%esp)290; AVX-X86-NEXT: fldl (%esp)291; AVX-X86-NEXT: wait292; AVX-X86-NEXT: movl %ebp, %esp293; AVX-X86-NEXT: popl %ebp294; AVX-X86-NEXT: .cfi_def_cfa %esp, 4295; AVX-X86-NEXT: retl296;297; AVX-X64-LABEL: ftruncf64:298; AVX-X64: # %bb.0:299; AVX-X64-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0300; AVX-X64-NEXT: retq301 %res = call double @llvm.experimental.constrained.trunc.f64(302 double %f, metadata !"fpexcept.strict") #0303 ret double %res304}305 306define float @frint32(float %f) #0 {307; SSE41-X86-LABEL: frint32:308; SSE41-X86: # %bb.0:309; SSE41-X86-NEXT: pushl %eax310; SSE41-X86-NEXT: .cfi_def_cfa_offset 8311; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero312; SSE41-X86-NEXT: roundss $4, %xmm0, %xmm0313; SSE41-X86-NEXT: movss %xmm0, (%esp)314; SSE41-X86-NEXT: flds (%esp)315; SSE41-X86-NEXT: wait316; SSE41-X86-NEXT: popl %eax317; SSE41-X86-NEXT: .cfi_def_cfa_offset 4318; SSE41-X86-NEXT: retl319;320; SSE41-X64-LABEL: frint32:321; SSE41-X64: # %bb.0:322; SSE41-X64-NEXT: roundss $4, %xmm0, %xmm0323; SSE41-X64-NEXT: retq324;325; AVX-X86-LABEL: frint32:326; AVX-X86: # %bb.0:327; AVX-X86-NEXT: pushl %eax328; AVX-X86-NEXT: .cfi_def_cfa_offset 8329; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero330; AVX-X86-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0331; AVX-X86-NEXT: vmovss %xmm0, (%esp)332; AVX-X86-NEXT: flds (%esp)333; AVX-X86-NEXT: wait334; AVX-X86-NEXT: popl %eax335; AVX-X86-NEXT: .cfi_def_cfa_offset 4336; AVX-X86-NEXT: retl337;338; AVX-X64-LABEL: frint32:339; AVX-X64: # %bb.0:340; AVX-X64-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0341; AVX-X64-NEXT: retq342 %res = call float @llvm.experimental.constrained.rint.f32(343 float %f,344 metadata !"round.dynamic", metadata !"fpexcept.strict") #0345 ret float %res346}347 348define double @frintf64(double %f) #0 {349; SSE41-X86-LABEL: frintf64:350; SSE41-X86: # %bb.0:351; SSE41-X86-NEXT: pushl %ebp352; SSE41-X86-NEXT: .cfi_def_cfa_offset 8353; SSE41-X86-NEXT: .cfi_offset %ebp, -8354; SSE41-X86-NEXT: movl %esp, %ebp355; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp356; SSE41-X86-NEXT: andl $-8, %esp357; SSE41-X86-NEXT: subl $8, %esp358; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero359; SSE41-X86-NEXT: roundsd $4, %xmm0, %xmm0360; SSE41-X86-NEXT: movsd %xmm0, (%esp)361; SSE41-X86-NEXT: fldl (%esp)362; SSE41-X86-NEXT: wait363; SSE41-X86-NEXT: movl %ebp, %esp364; SSE41-X86-NEXT: popl %ebp365; SSE41-X86-NEXT: .cfi_def_cfa %esp, 4366; SSE41-X86-NEXT: retl367;368; SSE41-X64-LABEL: frintf64:369; SSE41-X64: # %bb.0:370; SSE41-X64-NEXT: roundsd $4, %xmm0, %xmm0371; SSE41-X64-NEXT: retq372;373; AVX-X86-LABEL: frintf64:374; AVX-X86: # %bb.0:375; AVX-X86-NEXT: pushl %ebp376; AVX-X86-NEXT: .cfi_def_cfa_offset 8377; AVX-X86-NEXT: .cfi_offset %ebp, -8378; AVX-X86-NEXT: movl %esp, %ebp379; AVX-X86-NEXT: .cfi_def_cfa_register %ebp380; AVX-X86-NEXT: andl $-8, %esp381; AVX-X86-NEXT: subl $8, %esp382; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero383; AVX-X86-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0384; AVX-X86-NEXT: vmovsd %xmm0, (%esp)385; AVX-X86-NEXT: fldl (%esp)386; AVX-X86-NEXT: wait387; AVX-X86-NEXT: movl %ebp, %esp388; AVX-X86-NEXT: popl %ebp389; AVX-X86-NEXT: .cfi_def_cfa %esp, 4390; AVX-X86-NEXT: retl391;392; AVX-X64-LABEL: frintf64:393; AVX-X64: # %bb.0:394; AVX-X64-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0395; AVX-X64-NEXT: retq396 %res = call double @llvm.experimental.constrained.rint.f64(397 double %f,398 metadata !"round.dynamic", metadata !"fpexcept.strict") #0399 ret double %res400}401 402define float @fnearbyint32(float %f) #0 {403; SSE41-X86-LABEL: fnearbyint32:404; SSE41-X86: # %bb.0:405; SSE41-X86-NEXT: pushl %eax406; SSE41-X86-NEXT: .cfi_def_cfa_offset 8407; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero408; SSE41-X86-NEXT: roundss $12, %xmm0, %xmm0409; SSE41-X86-NEXT: movss %xmm0, (%esp)410; SSE41-X86-NEXT: flds (%esp)411; SSE41-X86-NEXT: wait412; SSE41-X86-NEXT: popl %eax413; SSE41-X86-NEXT: .cfi_def_cfa_offset 4414; SSE41-X86-NEXT: retl415;416; SSE41-X64-LABEL: fnearbyint32:417; SSE41-X64: # %bb.0:418; SSE41-X64-NEXT: roundss $12, %xmm0, %xmm0419; SSE41-X64-NEXT: retq420;421; AVX-X86-LABEL: fnearbyint32:422; AVX-X86: # %bb.0:423; AVX-X86-NEXT: pushl %eax424; AVX-X86-NEXT: .cfi_def_cfa_offset 8425; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero426; AVX-X86-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0427; AVX-X86-NEXT: vmovss %xmm0, (%esp)428; AVX-X86-NEXT: flds (%esp)429; AVX-X86-NEXT: wait430; AVX-X86-NEXT: popl %eax431; AVX-X86-NEXT: .cfi_def_cfa_offset 4432; AVX-X86-NEXT: retl433;434; AVX-X64-LABEL: fnearbyint32:435; AVX-X64: # %bb.0:436; AVX-X64-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0437; AVX-X64-NEXT: retq438 %res = call float @llvm.experimental.constrained.nearbyint.f32(439 float %f,440 metadata !"round.dynamic", metadata !"fpexcept.strict") #0441 ret float %res442}443 444define double @fnearbyintf64(double %f) #0 {445; SSE41-X86-LABEL: fnearbyintf64:446; SSE41-X86: # %bb.0:447; SSE41-X86-NEXT: pushl %ebp448; SSE41-X86-NEXT: .cfi_def_cfa_offset 8449; SSE41-X86-NEXT: .cfi_offset %ebp, -8450; SSE41-X86-NEXT: movl %esp, %ebp451; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp452; SSE41-X86-NEXT: andl $-8, %esp453; SSE41-X86-NEXT: subl $8, %esp454; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero455; SSE41-X86-NEXT: roundsd $12, %xmm0, %xmm0456; SSE41-X86-NEXT: movsd %xmm0, (%esp)457; SSE41-X86-NEXT: fldl (%esp)458; SSE41-X86-NEXT: wait459; SSE41-X86-NEXT: movl %ebp, %esp460; SSE41-X86-NEXT: popl %ebp461; SSE41-X86-NEXT: .cfi_def_cfa %esp, 4462; SSE41-X86-NEXT: retl463;464; SSE41-X64-LABEL: fnearbyintf64:465; SSE41-X64: # %bb.0:466; SSE41-X64-NEXT: roundsd $12, %xmm0, %xmm0467; SSE41-X64-NEXT: retq468;469; AVX-X86-LABEL: fnearbyintf64:470; AVX-X86: # %bb.0:471; AVX-X86-NEXT: pushl %ebp472; AVX-X86-NEXT: .cfi_def_cfa_offset 8473; AVX-X86-NEXT: .cfi_offset %ebp, -8474; AVX-X86-NEXT: movl %esp, %ebp475; AVX-X86-NEXT: .cfi_def_cfa_register %ebp476; AVX-X86-NEXT: andl $-8, %esp477; AVX-X86-NEXT: subl $8, %esp478; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero479; AVX-X86-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0480; AVX-X86-NEXT: vmovsd %xmm0, (%esp)481; AVX-X86-NEXT: fldl (%esp)482; AVX-X86-NEXT: wait483; AVX-X86-NEXT: movl %ebp, %esp484; AVX-X86-NEXT: popl %ebp485; AVX-X86-NEXT: .cfi_def_cfa %esp, 4486; AVX-X86-NEXT: retl487;488; AVX-X64-LABEL: fnearbyintf64:489; AVX-X64: # %bb.0:490; AVX-X64-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0491; AVX-X64-NEXT: retq492 %res = call double @llvm.experimental.constrained.nearbyint.f64(493 double %f,494 metadata !"round.dynamic", metadata !"fpexcept.strict") #0495 ret double %res496}497 498define float @fround32(float %f) #0 {499; SSE41-X86-LABEL: fround32:500; SSE41-X86: # %bb.0:501; SSE41-X86-NEXT: pushl %eax502; SSE41-X86-NEXT: .cfi_def_cfa_offset 8503; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero504; SSE41-X86-NEXT: movss %xmm0, (%esp)505; SSE41-X86-NEXT: calll roundf506; SSE41-X86-NEXT: popl %eax507; SSE41-X86-NEXT: .cfi_def_cfa_offset 4508; SSE41-X86-NEXT: retl509;510; SSE41-X64-LABEL: fround32:511; SSE41-X64: # %bb.0:512; SSE41-X64-NEXT: pushq %rax513; SSE41-X64-NEXT: .cfi_def_cfa_offset 16514; SSE41-X64-NEXT: callq roundf@PLT515; SSE41-X64-NEXT: popq %rax516; SSE41-X64-NEXT: .cfi_def_cfa_offset 8517; SSE41-X64-NEXT: retq518;519; AVX-X86-LABEL: fround32:520; AVX-X86: # %bb.0:521; AVX-X86-NEXT: pushl %eax522; AVX-X86-NEXT: .cfi_def_cfa_offset 8523; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero524; AVX-X86-NEXT: vmovss %xmm0, (%esp)525; AVX-X86-NEXT: calll roundf526; AVX-X86-NEXT: popl %eax527; AVX-X86-NEXT: .cfi_def_cfa_offset 4528; AVX-X86-NEXT: retl529;530; AVX-X64-LABEL: fround32:531; AVX-X64: # %bb.0:532; AVX-X64-NEXT: pushq %rax533; AVX-X64-NEXT: .cfi_def_cfa_offset 16534; AVX-X64-NEXT: callq roundf@PLT535; AVX-X64-NEXT: popq %rax536; AVX-X64-NEXT: .cfi_def_cfa_offset 8537; AVX-X64-NEXT: retq538 %res = call float @llvm.experimental.constrained.round.f32(539 float %f, metadata !"fpexcept.strict") #0540 ret float %res541}542 543define double @froundf64(double %f) #0 {544; SSE41-X86-LABEL: froundf64:545; SSE41-X86: # %bb.0:546; SSE41-X86-NEXT: subl $8, %esp547; SSE41-X86-NEXT: .cfi_def_cfa_offset 12548; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero549; SSE41-X86-NEXT: movsd %xmm0, (%esp)550; SSE41-X86-NEXT: calll round551; SSE41-X86-NEXT: addl $8, %esp552; SSE41-X86-NEXT: .cfi_def_cfa_offset 4553; SSE41-X86-NEXT: retl554;555; SSE41-X64-LABEL: froundf64:556; SSE41-X64: # %bb.0:557; SSE41-X64-NEXT: pushq %rax558; SSE41-X64-NEXT: .cfi_def_cfa_offset 16559; SSE41-X64-NEXT: callq round@PLT560; SSE41-X64-NEXT: popq %rax561; SSE41-X64-NEXT: .cfi_def_cfa_offset 8562; SSE41-X64-NEXT: retq563;564; AVX-X86-LABEL: froundf64:565; AVX-X86: # %bb.0:566; AVX-X86-NEXT: subl $8, %esp567; AVX-X86-NEXT: .cfi_def_cfa_offset 12568; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero569; AVX-X86-NEXT: vmovsd %xmm0, (%esp)570; AVX-X86-NEXT: calll round571; AVX-X86-NEXT: addl $8, %esp572; AVX-X86-NEXT: .cfi_def_cfa_offset 4573; AVX-X86-NEXT: retl574;575; AVX-X64-LABEL: froundf64:576; AVX-X64: # %bb.0:577; AVX-X64-NEXT: pushq %rax578; AVX-X64-NEXT: .cfi_def_cfa_offset 16579; AVX-X64-NEXT: callq round@PLT580; AVX-X64-NEXT: popq %rax581; AVX-X64-NEXT: .cfi_def_cfa_offset 8582; AVX-X64-NEXT: retq583 %res = call double @llvm.experimental.constrained.round.f64(584 double %f, metadata !"fpexcept.strict") #0585 ret double %res586}587 588define float @froundeven32(float %f) #0 {589; SSE41-X86-LABEL: froundeven32:590; SSE41-X86: # %bb.0:591; SSE41-X86-NEXT: pushl %eax592; SSE41-X86-NEXT: .cfi_def_cfa_offset 8593; SSE41-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero594; SSE41-X86-NEXT: roundss $8, %xmm0, %xmm0595; SSE41-X86-NEXT: movss %xmm0, (%esp)596; SSE41-X86-NEXT: flds (%esp)597; SSE41-X86-NEXT: wait598; SSE41-X86-NEXT: popl %eax599; SSE41-X86-NEXT: .cfi_def_cfa_offset 4600; SSE41-X86-NEXT: retl601;602; SSE41-X64-LABEL: froundeven32:603; SSE41-X64: # %bb.0:604; SSE41-X64-NEXT: roundss $8, %xmm0, %xmm0605; SSE41-X64-NEXT: retq606;607; AVX-X86-LABEL: froundeven32:608; AVX-X86: # %bb.0:609; AVX-X86-NEXT: pushl %eax610; AVX-X86-NEXT: .cfi_def_cfa_offset 8611; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero612; AVX-X86-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0613; AVX-X86-NEXT: vmovss %xmm0, (%esp)614; AVX-X86-NEXT: flds (%esp)615; AVX-X86-NEXT: wait616; AVX-X86-NEXT: popl %eax617; AVX-X86-NEXT: .cfi_def_cfa_offset 4618; AVX-X86-NEXT: retl619;620; AVX-X64-LABEL: froundeven32:621; AVX-X64: # %bb.0:622; AVX-X64-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0623; AVX-X64-NEXT: retq624 %res = call float @llvm.experimental.constrained.roundeven.f32(625 float %f, metadata !"fpexcept.strict") #0626 ret float %res627}628 629define double @froundevenf64(double %f) #0 {630; SSE41-X86-LABEL: froundevenf64:631; SSE41-X86: # %bb.0:632; SSE41-X86-NEXT: pushl %ebp633; SSE41-X86-NEXT: .cfi_def_cfa_offset 8634; SSE41-X86-NEXT: .cfi_offset %ebp, -8635; SSE41-X86-NEXT: movl %esp, %ebp636; SSE41-X86-NEXT: .cfi_def_cfa_register %ebp637; SSE41-X86-NEXT: andl $-8, %esp638; SSE41-X86-NEXT: subl $8, %esp639; SSE41-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero640; SSE41-X86-NEXT: roundsd $8, %xmm0, %xmm0641; SSE41-X86-NEXT: movsd %xmm0, (%esp)642; SSE41-X86-NEXT: fldl (%esp)643; SSE41-X86-NEXT: wait644; SSE41-X86-NEXT: movl %ebp, %esp645; SSE41-X86-NEXT: popl %ebp646; SSE41-X86-NEXT: .cfi_def_cfa %esp, 4647; SSE41-X86-NEXT: retl648;649; SSE41-X64-LABEL: froundevenf64:650; SSE41-X64: # %bb.0:651; SSE41-X64-NEXT: roundsd $8, %xmm0, %xmm0652; SSE41-X64-NEXT: retq653;654; AVX-X86-LABEL: froundevenf64:655; AVX-X86: # %bb.0:656; AVX-X86-NEXT: pushl %ebp657; AVX-X86-NEXT: .cfi_def_cfa_offset 8658; AVX-X86-NEXT: .cfi_offset %ebp, -8659; AVX-X86-NEXT: movl %esp, %ebp660; AVX-X86-NEXT: .cfi_def_cfa_register %ebp661; AVX-X86-NEXT: andl $-8, %esp662; AVX-X86-NEXT: subl $8, %esp663; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero664; AVX-X86-NEXT: vroundsd $8, %xmm0, %xmm0, %xmm0665; AVX-X86-NEXT: vmovsd %xmm0, (%esp)666; AVX-X86-NEXT: fldl (%esp)667; AVX-X86-NEXT: wait668; AVX-X86-NEXT: movl %ebp, %esp669; AVX-X86-NEXT: popl %ebp670; AVX-X86-NEXT: .cfi_def_cfa %esp, 4671; AVX-X86-NEXT: retl672;673; AVX-X64-LABEL: froundevenf64:674; AVX-X64: # %bb.0:675; AVX-X64-NEXT: vroundsd $8, %xmm0, %xmm0, %xmm0676; AVX-X64-NEXT: retq677 %res = call double @llvm.experimental.constrained.roundeven.f64(678 double %f, metadata !"fpexcept.strict") #0679 ret double %res680}681 682attributes #0 = { strictfp }683