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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; Make sure that seldag legalization works correctly for freeze instruction.3; RUN: llc -mtriple=i386-apple-darwin < %s 2>&1 | FileCheck %s4 5define i64 @expand(i32 %x) {6; CHECK-LABEL: expand:7; CHECK: ## %bb.0:8; CHECK-NEXT: movl $1280068684, %eax ## imm = 0x4C4C4C4C9; CHECK-NEXT: movl $1145324612, %edx ## imm = 0x4444444410; CHECK-NEXT: retl11 %y1 = freeze i64 1302123111658042420 ; 0x121212123434343412 %y2 = freeze i64 6221254864647256184 ; 0x565656567878787813 %t2 = xor i64 %y1, %y214 ret i64 %t215}16 17 18define <2 x i64> @expand_vec(i32 %x) nounwind {19; CHECK-LABEL: expand_vec:20; CHECK: ## %bb.0:21; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax22; CHECK-NEXT: movl $1145324612, 12(%eax) ## imm = 0x4444444423; CHECK-NEXT: movl $1145324612, 8(%eax) ## imm = 0x4444444424; CHECK-NEXT: movl $1145324612, 4(%eax) ## imm = 0x4444444425; CHECK-NEXT: movl $1280068684, (%eax) ## imm = 0x4C4C4C4C26; CHECK-NEXT: retl $427 ; <0x1212121234343434, 0x101010123232323>28 %y1 = freeze <2 x i64> <i64 1302123111658042420, i64 72340173410738979>29 ; <0x5656565678787878, 0x4545454567676767>30 %y2 = freeze <2 x i64> <i64 6221254864647256184, i64 4991471926399952743>31 %t2 = xor <2 x i64> %y1, %y232 ret <2 x i64> %t233}34 35define i10 @promote() {36; CHECK-LABEL: promote:37; CHECK: ## %bb.0:38; CHECK-NEXT: movw $650, %ax ## imm = 0x28A39; CHECK-NEXT: retl40 %a = freeze i10 68241 %b = freeze i10 99242 %res = add i10 %a, %b43 ret i10 %res44}45 46define <2 x i10> @promote_vec() {47; CHECK-LABEL: promote_vec:48; CHECK: ## %bb.0:49; CHECK-NEXT: movw $650, %ax ## imm = 0x28A50; CHECK-NEXT: movw $518, %dx ## imm = 0x20651; CHECK-NEXT: retl52 %a = freeze <2 x i10> <i10 682, i10 125>53 %b = freeze <2 x i10> <i10 992, i10 393>54 %res = add <2 x i10> %a, %b55 ret <2 x i10> %res56}57