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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-EXPAND3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,CHECK-UNEXPAND4 5define <4 x i32> @test_fshl_constants() {6; CHECK-EXPAND-LABEL: test_fshl_constants:7; CHECK-EXPAND: # %bb.0:8; CHECK-EXPAND-NEXT: vmovaps {{.*#+}} xmm0 = [0,512,2048,6144]9; CHECK-EXPAND-NEXT: retq10;11; CHECK-UNEXPAND-LABEL: test_fshl_constants:12; CHECK-UNEXPAND: # %bb.0:13; CHECK-UNEXPAND-NEXT: vpmovsxwd {{.*#+}} xmm0 = [0,512,2048,6144]14; CHECK-UNEXPAND-NEXT: retq15 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)16 ret <4 x i32> %res17}18 19define <4 x i32> @test_fshl_splat_constants() {20; CHECK-LABEL: test_fshl_splat_constants:21; CHECK: # %bb.0:22; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [256,256,256,256]23; CHECK-NEXT: retq24 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 4, i32 4, i32 4, i32 4>, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)25 ret <4 x i32> %res26}27 28define <4 x i32> @test_fshl_two_constants(<4 x i32> %a) {29; CHECK-EXPAND-LABEL: test_fshl_two_constants:30; CHECK-EXPAND: # %bb.0:31; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm032; CHECK-EXPAND-NEXT: retq33;34; CHECK-UNEXPAND-LABEL: test_fshl_two_constants:35; CHECK-UNEXPAND: # %bb.0:36; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]37; CHECK-UNEXPAND-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm038; CHECK-UNEXPAND-NEXT: retq39 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)40 ret <4 x i32> %res41}42 43define <4 x i32> @test_fshl_one_constant(<4 x i32> %a, <4 x i32> %b) {44; CHECK-EXPAND-LABEL: test_fshl_one_constant:45; CHECK-EXPAND: # %bb.0:46; CHECK-EXPAND-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm147; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm048; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm049; CHECK-EXPAND-NEXT: retq50;51; CHECK-UNEXPAND-LABEL: test_fshl_one_constant:52; CHECK-UNEXPAND: # %bb.0:53; CHECK-UNEXPAND-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm054; CHECK-UNEXPAND-NEXT: retq55 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)56 ret <4 x i32> %res57}58 59define <4 x i32> @test_fshl_none_constant(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {60; CHECK-EXPAND-LABEL: test_fshl_none_constant:61; CHECK-EXPAND: # %bb.0:62; CHECK-EXPAND-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31]63; CHECK-EXPAND-NEXT: vpandn %xmm3, %xmm2, %xmm464; CHECK-EXPAND-NEXT: vpsrld $1, %xmm1, %xmm165; CHECK-EXPAND-NEXT: vpsrlvd %xmm4, %xmm1, %xmm166; CHECK-EXPAND-NEXT: vpand %xmm3, %xmm2, %xmm267; CHECK-EXPAND-NEXT: vpsllvd %xmm2, %xmm0, %xmm068; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm069; CHECK-EXPAND-NEXT: retq70;71; CHECK-UNEXPAND-LABEL: test_fshl_none_constant:72; CHECK-UNEXPAND: # %bb.0:73; CHECK-UNEXPAND-NEXT: vpshldvd %xmm2, %xmm1, %xmm074; CHECK-UNEXPAND-NEXT: retq75 %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)76 ret <4 x i32> %res77}78 79define <4 x i32> @test_fshr_constants() {80; CHECK-LABEL: test_fshr_constants:81; CHECK: # %bb.0:82; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [0,8388608,8388608,6291456]83; CHECK-NEXT: retq84 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)85 ret <4 x i32> %res86}87 88define <4 x i32> @test_fshr_two_constants(<4 x i32> %a) {89; CHECK-EXPAND-LABEL: test_fshr_two_constants:90; CHECK-EXPAND: # %bb.0:91; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm092; CHECK-EXPAND-NEXT: retq93;94; CHECK-UNEXPAND-LABEL: test_fshr_two_constants:95; CHECK-UNEXPAND: # %bb.0:96; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]97; CHECK-UNEXPAND-NEXT: vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm198; CHECK-UNEXPAND-NEXT: vmovdqa %xmm1, %xmm099; CHECK-UNEXPAND-NEXT: retq100 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)101 ret <4 x i32> %res102}103 104define <4 x i32> @test_fshr_one_constant(<4 x i32> %a, <4 x i32> %b) {105; CHECK-EXPAND-LABEL: test_fshr_one_constant:106; CHECK-EXPAND: # %bb.0:107; CHECK-EXPAND-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1108; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0109; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm0110; CHECK-EXPAND-NEXT: retq111;112; CHECK-UNEXPAND-LABEL: test_fshr_one_constant:113; CHECK-UNEXPAND: # %bb.0:114; CHECK-UNEXPAND-NEXT: vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1115; CHECK-UNEXPAND-NEXT: vmovdqa %xmm1, %xmm0116; CHECK-UNEXPAND-NEXT: retq117 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)118 ret <4 x i32> %res119}120 121define <4 x i32> @test_fshr_none_constant(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {122; CHECK-EXPAND-LABEL: test_fshr_none_constant:123; CHECK-EXPAND: # %bb.0:124; CHECK-EXPAND-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31]125; CHECK-EXPAND-NEXT: vpand %xmm3, %xmm2, %xmm4126; CHECK-EXPAND-NEXT: vpsrlvd %xmm4, %xmm1, %xmm1127; CHECK-EXPAND-NEXT: vpandn %xmm3, %xmm2, %xmm2128; CHECK-EXPAND-NEXT: vpaddd %xmm0, %xmm0, %xmm0129; CHECK-EXPAND-NEXT: vpsllvd %xmm2, %xmm0, %xmm0130; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm0131; CHECK-EXPAND-NEXT: retq132;133; CHECK-UNEXPAND-LABEL: test_fshr_none_constant:134; CHECK-UNEXPAND: # %bb.0:135; CHECK-UNEXPAND-NEXT: vpshrdvd %xmm2, %xmm0, %xmm1136; CHECK-UNEXPAND-NEXT: vmovdqa %xmm1, %xmm0137; CHECK-UNEXPAND-NEXT: retq138 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)139 ret <4 x i32> %res140}141 142define <4 x i32> @test_fshr_splat_constants() {143; CHECK-LABEL: test_fshr_splat_constants:144; CHECK: # %bb.0:145; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [16777216,16777216,16777216,16777216]146; CHECK-NEXT: retq147 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 4, i32 4, i32 4, i32 4>, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)148 ret <4 x i32> %res149}150