75 lines · plain
1; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-prera-direction=bottomup -verify-machineinstrs < %s2; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-prera-direction=topdown -verify-machineinstrs < %s3; REQUIRES: asserts4;5; Test the LiveIntervals::handleMove() function.6;7; Moving the DIV32r instruction exercises the regunit update code because8; %edx has a live range into the function and is used by the DIV32r.9;10; Here sinking a kill + dead def:11; 144B -> 180B: DIV32r %4, implicit-def %eax, implicit dead %edx, implicit dead %EFLAGS, implicit killed %eax, implicit %edx12; %4: [48r,144r:0) 0@48r13; --> [48r,180r:0) 0@48r14; DH: [0B,16r:0)[128r,144r:2)[144r,144d:1) 0@0B-phi 1@144r 2@128r15; --> [0B,16r:0)[128r,180r:2)[180r,180d:1) 0@0B-phi 1@180r 2@128r16; DL: [0B,16r:0)[128r,144r:2)[144r,144d:1) 0@0B-phi 1@144r 2@128r17; --> [0B,16r:0)[128r,180r:2)[180r,180d:1) 0@0B-phi 1@180r 2@128r18;19define i32 @f1(i32 %a, i32 %b, i32 %c) nounwind uwtable readnone ssp {20entry:21 %y = add i32 %c, 122 %x = udiv i32 %b, %a23 %add = add nsw i32 %y, %x24 ret i32 %add25}26 27; Same as above, but moving a kill + live def:28; 144B -> 180B: DIV32r %4, implicit dead %eax, implicit-def %edx, implicit dead %EFLAGS, implicit killed %eax, implicit %edx29; %4: [48r,144r:0) 0@48r30; --> [48r,180r:0) 0@48r31; DH: [0B,16r:0)[128r,144r:2)[144r,184r:1) 0@0B-phi 1@144r 2@128r32; --> [0B,16r:0)[128r,180r:2)[180r,184r:1) 0@0B-phi 1@180r 2@128r33; DL: [0B,16r:0)[128r,144r:2)[144r,184r:1) 0@0B-phi 1@144r 2@128r34; --> [0B,16r:0)[128r,180r:2)[180r,184r:1) 0@0B-phi 1@180r 2@128r35;36define i32 @f2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind uwtable readnone ssp {37entry:38 %y = sub i32 %c, %d39 %x = urem i32 %b, %a40 %add = add nsw i32 %x, %y41 ret i32 %add42}43 44; Moving a use below the existing kill (%5):45; Moving a tied virtual register def (%11):46;47; 96B -> 120B: %11<def,tied1> = SUB32rr %11<tied0>, %548; %11: [80r,96r:1)[96r,144r:0) 0@96r 1@80r49; --> [80r,120r:1)[120r,144r:0) 0@120r 1@80r50; %5: [16r,112r:0) 0@16r51; --> [16r,120r:0) 0@16r52;53define i32 @f3(i32 %a, i32 %b) nounwind uwtable readnone ssp {54entry:55 %y = sub i32 %a, %b56 %x = add i32 %a, %b57 %r = mul i32 %x, %y58 ret i32 %r59}60 61; Move EFLAGS dead def across another def:62; handleMove 208B -> 36B: %edx = MOV32r0 implicit dead %EFLAGS63; EFLAGS: [20r,20d:4)[160r,160d:3)[208r,208d:0)[224r,224d:1)[272r,272d:2)[304r,304d:5) 0@208r 1@224r 2@272r 3@160r 4@20r 5@304r64; --> [20r,20d:4)[36r,36d:0)[160r,160d:3)[224r,224d:1)[272r,272d:2)[304r,304d:5) 0@36r 1@224r 2@272r 3@160r 4@20r 5@304r65;66define i32 @f4(i32 %a, i32 %b, i32 %c, i32 %d) nounwind uwtable readnone ssp {67entry:68 %x = sub i32 %a, %b69 %y = sub i32 %b, %c70 %z = sub i32 %c, %d71 %r1 = udiv i32 %x, %y72 %r2 = mul i32 %z, %r173 ret i32 %r274}75