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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=i386-pc-linux -stackrealign -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=i386-pc-none-elf -stackrealign -verify-machineinstrs < %s | FileCheck %s4 5declare i32 @helper() nounwind6define void @base() #0 {7; CHECK-LABEL: base:8; CHECK: # %bb.0: # %entry9; CHECK-NEXT: pushl %ebp10; CHECK-NEXT: .cfi_def_cfa_offset 811; CHECK-NEXT: .cfi_offset %ebp, -812; CHECK-NEXT: movl %esp, %ebp13; CHECK-NEXT: .cfi_def_cfa_register %ebp14; CHECK-NEXT: pushl %esi15; CHECK-NEXT: andl $-32, %esp16; CHECK-NEXT: subl $32, %esp17; CHECK-NEXT: movl %esp, %esi18; CHECK-NEXT: .cfi_offset %esi, -1219; CHECK-NEXT: calll helper@PLT20; CHECK-NEXT: movl %esp, %ecx21; CHECK-NEXT: leal 31(,%eax,4), %eax22; CHECK-NEXT: andl $-32, %eax23; CHECK-NEXT: movl %ecx, %edx24; CHECK-NEXT: subl %eax, %edx25; CHECK-NEXT: movl %edx, %esp26; CHECK-NEXT: negl %eax27; CHECK-NEXT: movl $0, (%ecx,%eax)28; CHECK-NEXT: leal -4(%ebp), %esp29; CHECK-NEXT: popl %esi30; CHECK-NEXT: popl %ebp31; CHECK-NEXT: .cfi_def_cfa %esp, 432; CHECK-NEXT: retl33entry:34 %k = call i32 @helper()35 %a = alloca i32, i32 %k, align 436 store i32 0, ptr %a, align 437 ret void38}39 40define void @clobber_base() #0 {41; CHECK-LABEL: clobber_base:42; CHECK: # %bb.0: # %entry43; CHECK-NEXT: leal {{[0-9]+}}(%esp), %ecx44; CHECK-NEXT: .cfi_def_cfa %ecx, 045; CHECK-NEXT: andl $-128, %esp46; CHECK-NEXT: pushl -4(%ecx)47; CHECK-NEXT: pushl %ebp48; CHECK-NEXT: movl %esp, %ebp49; CHECK-NEXT: .cfi_escape 0x10, 0x05, 0x02, 0x75, 0x00 #50; CHECK-NEXT: pushl %esi51; CHECK-NEXT: subl $244, %esp52; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill53; CHECK-NEXT: .cfi_escape 0x10, 0x06, 0x02, 0x75, 0x7c #54; CHECK-NEXT: .cfi_escape 0x0f, 0x04, 0x75, 0x84, 0x7f, 0x06 #55; CHECK-NEXT: calll helper@PLT56; CHECK-NEXT: movl %esp, %ecx57; CHECK-NEXT: leal 31(,%eax,4), %eax58; CHECK-NEXT: andl $-32, %eax59; CHECK-NEXT: movl %ecx, %edx60; CHECK-NEXT: subl %eax, %edx61; CHECK-NEXT: movl %edx, %esp62; CHECK-NEXT: negl %eax63; CHECK-NEXT: movl $405, %esi # imm = 0x19564; CHECK-NEXT: #APP65; CHECK-NEXT: nop66; CHECK-NEXT: #NO_APP67; CHECK-NEXT: movl $8, %edx68; CHECK-NEXT: #APP69; CHECK-NEXT: movl %edx, -120(%ebp)70; CHECK-NEXT: #NO_APP71; CHECK-NEXT: movl $0, (%ecx,%eax)72; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload73; CHECK-NEXT: leal -4(%ebp), %esp74; CHECK-NEXT: popl %esi75; CHECK-NEXT: popl %ebp76; CHECK-NEXT: leal -4(%ecx), %esp77; CHECK-NEXT: .cfi_def_cfa %esp, 478; CHECK-NEXT: retl79entry:80 %k = call i32 @helper()81 %a = alloca i32, align 12882 %b = alloca i32, i32 %k, align 483 ; clobber base pointer register84 tail call void asm sideeffect "nop", "{si}"(i32 405)85 call void asm sideeffect "movl $0, $1", "r,*m"(i32 8, ptr elementtype(i32) %a)86 store i32 0, ptr %b, align 487 ret void88}89 90define x86_regcallcc void @clobber_baseptr_argptr(i32 %param1, i32 %param2, i32 %param3, i32 %param4, i32 %param5, i32 %param6) #0 {91; CHECK-LABEL: clobber_baseptr_argptr:92; CHECK: # %bb.0: # %entry93; CHECK-NEXT: pushl %ebp94; CHECK-NEXT: .cfi_def_cfa_offset 895; CHECK-NEXT: .cfi_offset %ebp, -896; CHECK-NEXT: movl %esp, %ebp97; CHECK-NEXT: .cfi_def_cfa_register %ebp98; CHECK-NEXT: pushl %ebx99; CHECK-NEXT: andl $-128, %esp100; CHECK-NEXT: subl $128, %esp101; CHECK-NEXT: movl %esp, %esi102; CHECK-NEXT: .cfi_offset %ebx, -12103; CHECK-NEXT: movl 8(%ebp), %edi104; CHECK-NEXT: calll helper@PLT105; CHECK-NEXT: movl %esp, %ecx106; CHECK-NEXT: leal 31(,%eax,4), %eax107; CHECK-NEXT: andl $-32, %eax108; CHECK-NEXT: movl %ecx, %edx109; CHECK-NEXT: subl %eax, %edx110; CHECK-NEXT: movl %edx, %esp111; CHECK-NEXT: negl %eax112; CHECK-NEXT: pushl %esi113; CHECK-NEXT: subl $28, %esp114; CHECK-NEXT: movl $405, %esi # imm = 0x195115; CHECK-NEXT: #APP116; CHECK-NEXT: nop117; CHECK-NEXT: #NO_APP118; CHECK-NEXT: addl $28, %esp119; CHECK-NEXT: popl %esi120; CHECK-NEXT: movl $405, %ebx # imm = 0x195121; CHECK-NEXT: #APP122; CHECK-NEXT: nop123; CHECK-NEXT: #NO_APP124; CHECK-NEXT: movl $8, %edx125; CHECK-NEXT: #APP126; CHECK-NEXT: movl %edx, (%esi)127; CHECK-NEXT: #NO_APP128; CHECK-NEXT: movl %edi, (%ecx,%eax)129; CHECK-NEXT: leal -4(%ebp), %esp130; CHECK-NEXT: popl %ebx131; CHECK-NEXT: popl %ebp132; CHECK-NEXT: .cfi_def_cfa %esp, 4133; CHECK-NEXT: retl134entry:135 %k = call i32 @helper()136 %a = alloca i32, align 128137 %b = alloca i32, i32 %k, align 4138 ; clobber base pointer register139 tail call void asm sideeffect "nop", "{si}"(i32 405)140 ; clobber argument pointer register141 tail call void asm sideeffect "nop", "{bx}"(i32 405)142 call void asm sideeffect "movl $0, $1", "r,*m"(i32 8, ptr elementtype(i32) %a)143 store i32 %param6, ptr %b, align 4144 ret void145}146 147attributes #0 = {"frame-pointer"="all"}148!llvm.module.flags = !{!0}149!0 = !{i32 2, !"override-stack-alignment", i32 32}150