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1; RUN: llc -mtriple=i686-- -mcpu=i486 -o - %s | FileCheck %s2 3; Main test here was that ISelDAG could cope with a MachineNode in the chain4; from the first load to the "X86ISD::SUB". Previously it thought that meant no5; cycle could be formed so it tried to use "sub (%eax), [[RHS]]".6 7define void @gst_atomic_queue_push(ptr %addr) {8; CHECK-LABEL: gst_atomic_queue_push:9; CHECK: movl (%eax), [[LHS:%e[a-z]+]]10; CHECK: lock orl11; CHECK: movl (%eax), [[RHS:%e[a-z]+]]12; CHECK: cmpl [[LHS]], [[RHS]]13 14entry:15  br label %while.body16 17while.body:18  %0 = load volatile i32, ptr %addr, align 419  fence seq_cst20  %1 = load volatile i32, ptr %addr, align 421  %cmp = icmp sgt i32 %1, %022  br i1 %cmp, label %while.body, label %if.then23 24if.then:25  ret void26}27