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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X644 5define void @i24_or(ptr %a) {6; X86-LABEL: i24_or:7; X86:       # %bb.0:8; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax9; X86-NEXT:    orw $384, (%eax) # imm = 0x18010; X86-NEXT:    retl11;12; X64-LABEL: i24_or:13; X64:       # %bb.0:14; X64-NEXT:    orw $384, (%rdi) # imm = 0x18015; X64-NEXT:    retq16  %aa = load i24, ptr %a, align 117  %b = or i24 %aa, 38418  store i24 %b, ptr %a, align 119  ret void20}21 22define void @i24_and_or(ptr %a) {23; X86-LABEL: i24_and_or:24; X86:       # %bb.0:25; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax26; X86-NEXT:    movzwl (%eax), %ecx27; X86-NEXT:    movzbl 2(%eax), %edx28; X86-NEXT:    shll $16, %edx29; X86-NEXT:    orl %ecx, %edx30; X86-NEXT:    orl $384, %edx # imm = 0x18031; X86-NEXT:    andl $-128, %edx32; X86-NEXT:    movw %dx, (%eax)33; X86-NEXT:    retl34;35; X64-LABEL: i24_and_or:36; X64:       # %bb.0:37; X64-NEXT:    movzwl (%rdi), %eax38; X64-NEXT:    movzbl 2(%rdi), %ecx39; X64-NEXT:    shll $16, %ecx40; X64-NEXT:    orl %eax, %ecx41; X64-NEXT:    orl $384, %ecx # imm = 0x18042; X64-NEXT:    andl $-128, %ecx43; X64-NEXT:    movw %cx, (%rdi)44; X64-NEXT:    retq45  %b = load i24, ptr %a, align 146  %c = and i24 %b, -12847  %d = or i24 %c, 38448  store i24 %d, ptr %a, align 149  ret void50}51 52define void @i24_insert_bit(ptr %a, i1 zeroext %bit) {53; X86-LABEL: i24_insert_bit:54; X86:       # %bb.0:55; X86-NEXT:    pushl %esi56; X86-NEXT:    .cfi_def_cfa_offset 857; X86-NEXT:    .cfi_offset %esi, -858; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax59; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx60; X86-NEXT:    movzwl (%eax), %edx61; X86-NEXT:    movzbl 2(%eax), %esi62; X86-NEXT:    shll $16, %esi63; X86-NEXT:    orl %edx, %esi64; X86-NEXT:    shll $13, %ecx65; X86-NEXT:    andl $16769023, %esi # imm = 0xFFDFFF66; X86-NEXT:    orl %ecx, %esi67; X86-NEXT:    movw %si, (%eax)68; X86-NEXT:    popl %esi69; X86-NEXT:    .cfi_def_cfa_offset 470; X86-NEXT:    retl71;72; X64-LABEL: i24_insert_bit:73; X64:       # %bb.0:74; X64-NEXT:    movzwl (%rdi), %eax75; X64-NEXT:    movzbl 2(%rdi), %ecx76; X64-NEXT:    shll $16, %ecx77; X64-NEXT:    orl %eax, %ecx78; X64-NEXT:    shll $13, %esi79; X64-NEXT:    andl $16769023, %ecx # imm = 0xFFDFFF80; X64-NEXT:    orl %esi, %ecx81; X64-NEXT:    movw %cx, (%rdi)82; X64-NEXT:    retq83  %extbit = zext i1 %bit to i2484  %b = load i24, ptr %a, align 185  %extbit.shl = shl nuw nsw i24 %extbit, 1386  %c = and i24 %b, -819387  %d = or i24 %c, %extbit.shl88  store i24 %d, ptr %a, align 189  ret void90}91 92define void @i56_or(ptr %a) {93; X86-LABEL: i56_or:94; X86:       # %bb.0:95; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax96; X86-NEXT:    orw $384, (%eax) # imm = 0x18097; X86-NEXT:    retl98;99; X64-LABEL: i56_or:100; X64:       # %bb.0:101; X64-NEXT:    orw $384, (%rdi) # imm = 0x180102; X64-NEXT:    retq103  %aa = load i56, ptr %a, align 1104  %b = or i56 %aa, 384105  store i56 %b, ptr %a, align 1106  ret void107}108 109define void @i56_and_or(ptr %a) {110; X86-LABEL: i56_and_or:111; X86:       # %bb.0:112; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax113; X86-NEXT:    movl $384, %ecx # imm = 0x180114; X86-NEXT:    orl (%eax), %ecx115; X86-NEXT:    andl $-128, %ecx116; X86-NEXT:    movl %ecx, (%eax)117; X86-NEXT:    retl118;119; X64-LABEL: i56_and_or:120; X64:       # %bb.0:121; X64-NEXT:    movzwl 4(%rdi), %eax122; X64-NEXT:    movzbl 6(%rdi), %ecx123; X64-NEXT:    shll $16, %ecx124; X64-NEXT:    orl %eax, %ecx125; X64-NEXT:    shlq $32, %rcx126; X64-NEXT:    movl (%rdi), %eax127; X64-NEXT:    orq %rcx, %rax128; X64-NEXT:    orq $384, %rax # imm = 0x180129; X64-NEXT:    movabsq $72057594037927808, %rcx # imm = 0xFFFFFFFFFFFF80130; X64-NEXT:    andq %rax, %rcx131; X64-NEXT:    movl %ecx, (%rdi)132; X64-NEXT:    shrq $32, %rcx133; X64-NEXT:    movw %cx, 4(%rdi)134; X64-NEXT:    retq135  %b = load i56, ptr %a, align 1136  %c = and i56 %b, -128137  %d = or i56 %c, 384138  store i56 %d, ptr %a, align 1139  ret void140}141 142define void @i56_insert_bit(ptr %a, i1 zeroext %bit) {143; X86-LABEL: i56_insert_bit:144; X86:       # %bb.0:145; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax146; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx147; X86-NEXT:    shll $13, %ecx148; X86-NEXT:    movl $-8193, %edx # imm = 0xDFFF149; X86-NEXT:    andl (%eax), %edx150; X86-NEXT:    orl %ecx, %edx151; X86-NEXT:    movl %edx, (%eax)152; X86-NEXT:    retl153;154; X64-LABEL: i56_insert_bit:155; X64:       # %bb.0:156; X64-NEXT:    movzwl 4(%rdi), %eax157; X64-NEXT:    movzbl 6(%rdi), %ecx158; X64-NEXT:    shll $16, %ecx159; X64-NEXT:    orl %eax, %ecx160; X64-NEXT:    shlq $32, %rcx161; X64-NEXT:    movl (%rdi), %eax162; X64-NEXT:    orq %rcx, %rax163; X64-NEXT:    shll $13, %esi164; X64-NEXT:    andq $-8193, %rax # imm = 0xDFFF165; X64-NEXT:    orl %eax, %esi166; X64-NEXT:    shrq $32, %rax167; X64-NEXT:    movw %ax, 4(%rdi)168; X64-NEXT:    movl %esi, (%rdi)169; X64-NEXT:    retq170  %extbit = zext i1 %bit to i56171  %b = load i56, ptr %a, align 1172  %extbit.shl = shl nuw nsw i56 %extbit, 13173  %c = and i56 %b, -8193174  %d = or i56 %c, %extbit.shl175  store i56 %d, ptr %a, align 1176  ret void177}178 179