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1# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s2 3--- |4 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"5 target triple = "x86_64-apple-macosx"6 7 ;; Positive test8 define i32 @imp_null_check_with_bitwise_op_0(ptr %x, i32 %val, i1 %arg) {9 entry:10 br i1 %arg, label %is_null, label %not_null, !make.implicit !011 12 is_null:13 ret i32 4214 15 not_null:16 br i1 %arg, label %ret_100, label %ret_20017 18 ret_100:19 ret i32 10020 21 ret_200:22 ret i32 20023 }24 25 ;; Negative test. The regalloc is such that we cannot hoist the26 ;; instruction materializing 2200000 into $eax27 define i32 @imp_null_check_with_bitwise_op_1(ptr %x, i32 %val, ptr %ptr, i1 %arg) {28 entry:29 br i1 %arg, label %is_null, label %not_null, !make.implicit !030 31 is_null:32 ret i32 undef33 34 not_null:35 br i1 %arg, label %ret_100, label %ret_20036 37 ret_100:38 ret i32 10039 40 ret_200:41 ret i32 20042 }43 44 ;; Negative test: IR is identical to45 ;; @imp_null_check_with_bitwise_op_0 but MIR differs.46 define i32 @imp_null_check_with_bitwise_op_2(ptr %x, i32 %val, i1 %arg) {47 entry:48 br i1 %arg, label %is_null, label %not_null, !make.implicit !049 50 is_null:51 ret i32 4252 53 not_null:54 br i1 %arg, label %ret_100, label %ret_20055 56 ret_100:57 ret i32 10058 59 ret_200:60 ret i32 20061 }62 63 ;; Negative test: IR is identical to64 ;; @imp_null_check_with_bitwise_op_0 but MIR differs.65 define i32 @imp_null_check_with_bitwise_op_3(ptr %x, i32 %val, i1 %arg) {66 entry:67 br i1 %arg, label %is_null, label %not_null, !make.implicit !068 69 is_null:70 ret i32 4271 72 not_null:73 br i1 %arg, label %ret_100, label %ret_20074 75 ret_100:76 ret i32 10077 78 ret_200:79 ret i32 20080 }81 82 ;; Positive test83 define i32 @imp_null_check_with_bitwise_op_4(ptr %x, i32 %val, i1 %arg) {84 entry:85 br i1 %arg, label %is_null, label %not_null, !make.implicit !086 87 is_null:88 ret i32 4289 90 not_null:91 br i1 %arg, label %ret_100, label %ret_20092 93 ret_100:94 ret i32 10095 96 ret_200:97 ret i32 20098 }99 100 declare void @f() readonly101 102 define i32 @no_hoist_across_call(ptr %ptr) {103 entry:104 %is_null = icmp eq ptr %ptr, null105 br i1 %is_null, label %leave, label %stay, !make.implicit !0106 107 stay:108 call void @f()109 %val = load i32, ptr %ptr110 ret i32 %val111 112 leave:113 ret i32 0114 }115 116 define i32 @dependency_live_in_hazard(ptr %ptr, ptr %ptr2, ptr %ptr3) #0 {117 entry:118 %val = load ptr, ptr %ptr2119 %ptr_is_null = icmp eq ptr %ptr, null120 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0121 122 not_null: ; preds = %entry123 %addend = load i32, ptr %val124 %result = load i32, ptr %ptr125 %result.shr = lshr i32 %result, 4126 %result.and = and i32 %result.shr, 4095127 %result.add = add i32 %addend, %result.and128 ret i32 %result.add129 130 is_null: ; preds = %entry131 ret i32 0132 }133 134 define i32 @use_alternate_load_op(ptr %ptr, ptr %ptr2) {135 entry:136 %ptr_is_null = icmp eq ptr %ptr, null137 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0138 139 not_null:140 ret i32 undef141 142 is_null:143 ret i32 0144 }145 146 define i32 @imp_null_check_gep_load_with_use_dep(ptr %x, i32 %a) {147 entry:148 %c = icmp eq ptr %x, null149 br i1 %c, label %is_null, label %not_null, !make.implicit !0150 151 is_null: ; preds = %entry152 ret i32 42153 154 not_null: ; preds = %entry155 %x.loc = getelementptr i32, ptr %x, i32 1156 %y = ptrtoint ptr %x.loc to i32157 %b = add i32 %a, %y158 %t = load i32, ptr %x159 %z = add i32 %t, %b160 ret i32 %z161 }162 163 define i32 @imp_null_check_load_with_base_sep(ptr %x, i32 %a) {164 entry:165 %c = icmp eq ptr %x, null166 br i1 %c, label %is_null, label %not_null, !make.implicit !0167 168 is_null: ; preds = %entry169 ret i32 42170 171 not_null: ; preds = %entry172 ret i32 undef173 }174 175 define void @inc_store(ptr %ptr, i32 %val) {176 entry:177 %ptr_is_null = icmp eq ptr %ptr, null178 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0179 180 not_null:181 ret void182 183 is_null:184 ret void185 }186 187 define void @inc_store_plus_offset(ptr %ptr, i32 %val) {188 entry:189 %ptr_is_null = icmp eq ptr %ptr, null190 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0191 192 not_null:193 ret void194 195 is_null:196 ret void197 }198 199 define void @inc_store_with_dep(ptr %ptr, i32 %val) {200 entry:201 %ptr_is_null = icmp eq ptr %ptr, null202 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0203 204 not_null:205 ret void206 207 is_null:208 ret void209 }210 211 define i32 @inc_store_with_dep_in_null(ptr %ptr, i32 %val) {212 entry:213 %ptr_is_null = icmp eq ptr %ptr, null214 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0215 216 not_null:217 ret i32 undef218 219 is_null:220 ret i32 undef221 }222 223 define void @inc_store_with_volatile(ptr %ptr, i32 %val) {224 entry:225 %ptr_is_null = icmp eq ptr %ptr, null226 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0227 228 not_null:229 ret void230 231 is_null:232 ret void233 }234 235 define void @inc_store_with_two_dep(ptr %ptr, i32 %val) {236 entry:237 %ptr_is_null = icmp eq ptr %ptr, null238 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0239 240 not_null:241 ret void242 243 is_null:244 ret void245 }246 247 define void @inc_store_with_redefined_base(ptr %ptr, i32 %val) {248 entry:249 %ptr_is_null = icmp eq ptr %ptr, null250 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0251 252 not_null:253 ret void254 255 is_null:256 ret void257 }258 259 define i32 @inc_store_with_reused_base(ptr %ptr, i32 %val) {260 entry:261 %ptr_is_null = icmp eq ptr %ptr, null262 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0263 264 not_null:265 ret i32 undef266 267 is_null:268 ret i32 undef269 }270 271 define i32 @inc_store_across_call(ptr %ptr) {272 entry:273 %ptr_is_null = icmp eq ptr %ptr, null274 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0275 276 not_null:277 call void @f()278 ret i32 undef279 280 is_null:281 ret i32 undef282 }283 284 define i32 @inc_store_with_dep_in_dep(ptr %ptr, i32 %val) {285 entry:286 %ptr_is_null = icmp eq ptr %ptr, null287 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0288 289 not_null:290 ret i32 undef291 292 is_null:293 ret i32 undef294 }295 296 define i32 @inc_store_with_load_over_store(ptr %ptr, ptr %ptr2) {297 entry:298 %ptr_is_null = icmp eq ptr %ptr, null299 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0300 301 not_null:302 ret i32 undef303 304 is_null:305 ret i32 undef306 }307 308 define i32 @inc_store_with_store_over_load(ptr %ptr, ptr %ptr2) {309 entry:310 %ptr_is_null = icmp eq ptr %ptr, null311 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0312 313 not_null:314 ret i32 undef315 316 is_null:317 ret i32 undef318 }319 320 define void @inc_store_with_store_over_store(ptr %ptr, ptr %ptr2) {321 entry:322 %ptr_is_null = icmp eq ptr %ptr, null323 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0324 325 not_null:326 ret void327 328 is_null:329 ret void330 }331 332 define void @inc_store_with_load_and_store(ptr %ptr, ptr %ptr2) {333 entry:334 %ptr_is_null = icmp eq ptr %ptr, null335 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0336 337 not_null:338 ret void339 340 is_null:341 ret void342 }343 344 define i32 @inc_store_and_load_no_alias(ptr noalias %ptr, ptr noalias %ptr2) {345 entry:346 %ptr_is_null = icmp eq ptr %ptr, null347 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0348 349 not_null:350 ret i32 undef351 352 is_null:353 ret i32 undef354 }355 356 define i32 @inc_store_and_load_alias(ptr %ptr, ptr %ptr2) {357 entry:358 %ptr_is_null = icmp eq ptr %ptr, null359 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0360 361 not_null:362 ret i32 undef363 364 is_null:365 ret i32 undef366 }367 368 define i32 @inc_spill_dep(ptr %ptr, i32 %val) {369 entry:370 %ptr_is_null = icmp eq ptr %ptr, null371 br i1 %ptr_is_null, label %is_null, label %not_null, !make.implicit !0372 373 not_null:374 ret i32 undef375 376 is_null:377 ret i32 undef378 }379 380 define i32 @imp_null_check_address_mul_overflow(ptr %x, i32 %a) {381 entry:382 %c = icmp eq ptr %x, null383 br i1 %c, label %is_null, label %not_null, !make.implicit !0384 385 is_null: ; preds = %entry386 ret i32 42387 388 not_null: ; preds = %entry389 %y = ptrtoint ptr %x to i32390 %y64 = zext i32 %y to i64391 %b = mul i64 %y64, 9223372036854775807 ; 0X0FFFF.. i.e. 2^63 - 1392 %z = trunc i64 %b to i32393 ret i32 %z394 }395 396 attributes #0 = { "target-features"="+bmi,+bmi2" }397 398 !0 = !{}399...400---401name: imp_null_check_with_bitwise_op_0402# CHECK-LABEL: name: imp_null_check_with_bitwise_op_0403alignment: 16404tracksRegLiveness: true405liveins:406 - { reg: '$rdi' }407 - { reg: '$esi' }408# CHECK: bb.0.entry:409# CHECK: $eax = MOV32ri 2200000410# CHECK-NEXT: $eax = FAULTING_OP 1, %bb.3, {{[0-9]+}}, $eax, $rdi, 1, $noreg, 0, $noreg, implicit-def $eflags :: (load (s32) from %ir.x)411# CHECK-NEXT: JMP_1 %bb.1412 413body: |414 bb.0.entry:415 liveins: $esi, $rdi416 417 TEST64rr $rdi, $rdi, implicit-def $eflags418 JCC_1 %bb.3, 4, implicit $eflags419 420 bb.1.not_null:421 liveins: $esi, $rdi422 423 $eax = MOV32ri 2200000424 $eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.x)425 CMP32rr killed $eax, killed $esi, implicit-def $eflags426 JCC_1 %bb.4, 4, implicit $eflags427 428 bb.2.ret_200:429 $eax = MOV32ri 200430 RET64 $eax431 432 bb.3.is_null:433 $eax = MOV32ri 42434 RET64 $eax435 436 bb.4.ret_100:437 $eax = MOV32ri 100438 RET64 $eax439 440...441---442name: imp_null_check_with_bitwise_op_1443alignment: 16444tracksRegLiveness: true445liveins:446 - { reg: '$rdi' }447 - { reg: '$esi' }448 - { reg: '$rdx' }449# CHECK: bb.0.entry:450# CHECK: $eax = MOV32rm killed $rdx, 1, $noreg, 0, $noreg :: (volatile load (s32) from %ir.ptr)451# CHECK-NEXT: TEST64rr $rdi, $rdi, implicit-def $eflags452# CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags453 454body: |455 bb.0.entry:456 liveins: $esi, $rdi, $rdx457 458 $eax = MOV32rm killed $rdx, 1, $noreg, 0, $noreg :: (volatile load (s32) from %ir.ptr)459 TEST64rr $rdi, $rdi, implicit-def $eflags460 JCC_1 %bb.3, 4, implicit $eflags461 462 bb.1.not_null:463 liveins: $esi, $rdi464 465 $eax = MOV32ri 2200000466 $eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.x)467 CMP32rr killed $eax, killed $esi, implicit-def $eflags468 JCC_1 %bb.4, 4, implicit $eflags469 470 bb.2.ret_200:471 472 $eax = MOV32ri 200473 474 bb.3.is_null:475 liveins: $eax, $ah, $al, $ax, $bh, $bl, $bp, $bpl, $bx, $eax, $ebp, $ebx, $rax, $rbp, $rbx, $r12, $r13, $r14, $r15, $r12b, $r13b, $r14b, $r15b, $r12d, $r13d, $r14d, $r15d, $r12w, $r13w, $r14w, $r15w476 477 RET64 $eax478 479 bb.4.ret_100:480 $eax = MOV32ri 100481 RET64 $eax482 483...484---485name: imp_null_check_with_bitwise_op_2486# CHECK-LABEL: name: imp_null_check_with_bitwise_op_2487alignment: 16488tracksRegLiveness: true489liveins:490 - { reg: '$rdi' }491 - { reg: '$esi' }492# CHECK: bb.0.entry:493# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags494# CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags495 496body: |497 bb.0.entry:498 liveins: $esi, $rdi499 500 TEST64rr $rdi, $rdi, implicit-def $eflags501 JCC_1 %bb.3, 4, implicit $eflags502 503 bb.1.not_null:504 liveins: $esi, $rdi505 506 $eax = MOV32ri 2200000507 $eax = ADD32ri killed $eax, 100, implicit-def dead $eflags508 $eax = AND32rm killed $eax, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.x)509 CMP32rr killed $eax, killed $esi, implicit-def $eflags510 JCC_1 %bb.4, 4, implicit $eflags511 512 bb.2.ret_200:513 $eax = MOV32ri 200514 RET64 $eax515 516 bb.3.is_null:517 $eax = MOV32ri 42518 RET64 $eax519 520 bb.4.ret_100:521 $eax = MOV32ri 100522 RET64 $eax523 524...525---526name: imp_null_check_with_bitwise_op_3527# CHECK-LABEL: name: imp_null_check_with_bitwise_op_3528alignment: 16529tracksRegLiveness: true530liveins:531 - { reg: '$rdi' }532 - { reg: '$rsi' }533# CHECK: bb.0.entry:534# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags535# CHECK-NEXT: JCC_1 %bb.3, 4, implicit $eflags536 537body: |538 bb.0.entry:539 liveins: $rsi, $rdi540 541 TEST64rr $rdi, $rdi, implicit-def $eflags542 JCC_1 %bb.3, 4, implicit $eflags543 544 bb.1.not_null:545 liveins: $rsi, $rdi546 547 $rdi = MOV64ri 5000548 $rdi = AND64rm killed $rdi, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.x)549 CMP64rr killed $rdi, killed $rsi, implicit-def $eflags550 JCC_1 %bb.4, 4, implicit $eflags551 552 bb.2.ret_200:553 $eax = MOV32ri 200554 RET64 $eax555 556 bb.3.is_null:557 $eax = MOV32ri 42558 RET64 $eax559 560 bb.4.ret_100:561 $eax = MOV32ri 100562 RET64 $eax563 564...565---566name: imp_null_check_with_bitwise_op_4567# CHECK-LABEL: name: imp_null_check_with_bitwise_op_4568alignment: 16569tracksRegLiveness: true570liveins:571 - { reg: '$rdi' }572 - { reg: '$rsi' }573# CHECK: bb.0.entry:574# CHECK: $rbx = MOV64rr $rdx575# CHECK-NEXT: $rbx = FAULTING_OP 1, %bb.3, {{[0-9]+}}, $rbx, $rdi, 1, $noreg, 0, $noreg, implicit-def $eflags :: (load (s32) from %ir.x)576 577body: |578 bb.0.entry:579 liveins: $rsi, $rdi, $rdx580 581 TEST64rr $rdi, $rdi, implicit-def $eflags582 JCC_1 %bb.3, 4, implicit $eflags583 584 bb.1.not_null:585 liveins: $rsi, $rdi, $rdx586 587 $rbx = MOV64rr $rdx588 $rbx = AND64rm killed $rbx, killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.x)589 $rdx = MOV64ri 0590 CMP64rr killed $rbx, killed $rsi, implicit-def $eflags591 JCC_1 %bb.4, 4, implicit $eflags592 593 bb.2.ret_200:594 $eax = MOV32ri 200595 RET64 $eax596 597 bb.3.is_null:598 $eax = MOV32ri 42599 RET64 $eax600 601 bb.4.ret_100:602 $eax = MOV32ri 100603 RET64 $eax604 605...606---607name: no_hoist_across_call608# CHECK-LABEL: name: no_hoist_across_call609alignment: 16610tracksRegLiveness: true611liveins:612 - { reg: '$rdi' }613calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',614 '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',615 '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',616 '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]617# CHECK: body:618# CHECK-NOT: FAULTING_OP619# CHECK: bb.1.stay:620# CHECK: CALL64pcrel32621body: |622 bb.0.entry:623 liveins: $rdi, $rbx624 625 frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp626 CFI_INSTRUCTION def_cfa_offset 16627 CFI_INSTRUCTION offset $rbx, -16628 $rbx = MOV64rr $rdi629 TEST64rr $rbx, $rbx, implicit-def $eflags630 JCC_1 %bb.2, 4, implicit killed $eflags631 632 bb.1.stay:633 liveins: $rbx634 635 CALL64pcrel32 @f, csr_64, implicit $rsp, implicit-def $rsp636 $eax = MOV32rm killed $rbx, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)637 $rbx = POP64r implicit-def $rsp, implicit $rsp638 RET64 $eax639 640 bb.2.leave:641 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags642 $rbx = POP64r implicit-def $rsp, implicit $rsp643 RET64 $eax644 645...646---647name: dependency_live_in_hazard648# CHECK-LABEL: name: dependency_live_in_hazard649# CHECK: bb.0.entry:650# CHECK-NOT: FAULTING_OP651# CHECK: bb.1.not_null:652 653# Make sure that the BEXTR32rm instruction below is not used to emit654# an implicit null check -- hoisting it will require hosting the move655# to $esi and we cannot do that without clobbering the use of $rsi in656# the first instruction in bb.1.not_null.657alignment: 16658tracksRegLiveness: true659liveins:660 - { reg: '$rdi' }661 - { reg: '$rsi' }662body: |663 bb.0.entry:664 liveins: $rdi, $rsi665 666 TEST64rr $rdi, $rdi, implicit-def $eflags667 JCC_1 %bb.2, 4, implicit killed $eflags668 669 bb.1.not_null:670 liveins: $rdi, $rsi671 672 $rcx = MOV64rm killed $rsi, 1, $noreg, 0, $noreg :: (load (s64) from %ir.ptr2)673 $esi = MOV32ri 3076674 $eax = BEXTR32rm killed $rdi, 1, $noreg, 0, $noreg, killed $esi, implicit-def dead $eflags :: (load (s32) from %ir.ptr)675 $eax = ADD32rm killed $eax, killed $rcx, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.val)676 RET64 $eax677 678 bb.2.is_null:679 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags680 RET64 $eax681 682...683---684name: use_alternate_load_op685# CHECK-LABEL: name: use_alternate_load_op686# CHECK: bb.0.entry:687# CHECK: $rax = FAULTING_OP 1, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 0, $noreg688# CHECK-NEXT: JMP_1 %bb.1689# CHECK: bb.1.not_null690 691alignment: 16692tracksRegLiveness: true693liveins:694 - { reg: '$rdi' }695 - { reg: '$rsi' }696body: |697 bb.0.entry:698 liveins: $rdi, $rsi699 700 TEST64rr $rdi, $rdi, implicit-def $eflags701 JCC_1 %bb.2, 4, implicit killed $eflags702 703 bb.1.not_null:704 liveins: $rdi, $rsi705 706 $rcx = MOV64rm killed $rsi, 1, $noreg, 0, $noreg707 $rcx = AND64rm killed $rcx, $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags708 $rax = MOV64rm killed $rdi, 1, $noreg, 0, $noreg709 RET64 $eax710 711 bb.2.is_null:712 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags713 RET64 $eax714 715...716---717name: imp_null_check_gep_load_with_use_dep718# CHECK-LABEL: name: imp_null_check_gep_load_with_use_dep719# CHECK: bb.0.entry:720# CHECK: $eax = FAULTING_OP 1, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 0, $noreg, implicit-def $rax :: (load (s32) from %ir.x)721# CHECK-NEXT: JMP_1 %bb.1722alignment: 16723tracksRegLiveness: true724liveins: 725 - { reg: '$rdi' }726 - { reg: '$rsi' }727body: |728 bb.0.entry:729 liveins: $rsi, $rdi730 731 TEST64rr $rdi, $rdi, implicit-def $eflags732 JCC_1 %bb.1, 4, implicit $eflags733 734 bb.2.not_null:735 liveins: $rdi, $rsi736 737 $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags738 $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $rax :: (load (s32) from %ir.x)739 $eax = LEA64_32r killed $rax, 1, killed $rsi, 4, $noreg740 RET64 $eax741 742 bb.1.is_null:743 $eax = MOV32ri 42744 RET64 $eax745 746...747---748name: imp_null_check_load_with_base_sep749# CHECK-LABEL: name: imp_null_check_load_with_base_sep750# CHECK: bb.0.entry:751# CHECK: $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags752# CHECK-NEXT: $esi = FAULTING_OP 1, %bb.2, {{[0-9]+}}, $esi, $rdi, 1, $noreg, 0, $noreg, implicit-def $eflags753# CHECK-NEXT: JMP_1 %bb.1754alignment: 16755tracksRegLiveness: true756liveins: 757 - { reg: '$rdi' }758 - { reg: '$rsi' }759body: |760 bb.0.entry:761 liveins: $rsi, $rdi762 763 TEST64rr $rdi, $rdi, implicit-def $eflags764 JCC_1 %bb.1, 4, implicit $eflags765 766 bb.2.not_null:767 liveins: $rdi, $rsi768 769 $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags770 $esi = AND32rm killed $esi, $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags771 $eax = MOV32rr $esi772 RET64 $eax773 774 bb.1.is_null:775 $eax = MOV32ri 42776 RET64 $eax777 778...779---780name: inc_store781# CHECK-LABEL: name: inc_store782# CHECK: bb.0.entry:783# CHECK: $noreg = FAULTING_OP 3, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 0, $noreg, $rsi784# CHECK-NEXT: JMP_1 %bb.1785# CHECK: bb.1.not_null786 787alignment: 16788tracksRegLiveness: true789liveins:790 - { reg: '$rdi' }791 - { reg: '$rsi' }792body: |793 bb.0.entry:794 liveins: $rdi, $rsi795 796 TEST64rr $rdi, $rdi, implicit-def $eflags797 JCC_1 %bb.2, 4, implicit killed $eflags798 799 bb.1.not_null:800 liveins: $rdi, $rsi801 802 MOV64mr killed $rdi, 1, $noreg, 0, $noreg, killed $rsi803 RET64804 805 bb.2.is_null:806 RET64807 808...809---810name: inc_store_plus_offset811# CHECK-LABEL: inc_store_plus_offset812# CHECK: bb.0.entry:813# CHECK: $noreg = FAULTING_OP 3, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 16, $noreg, $rsi814# CHECK-NEXT: JMP_1 %bb.1815# CHECK: bb.1.not_null816 817alignment: 16818tracksRegLiveness: true819liveins:820 - { reg: '$rdi' }821 - { reg: '$rsi' }822body: |823 bb.0.entry:824 liveins: $rdi, $rsi825 826 TEST64rr $rdi, $rdi, implicit-def $eflags827 JCC_1 %bb.2, 4, implicit killed $eflags828 829 bb.1.not_null:830 liveins: $rdi, $rsi831 832 MOV64mr killed $rdi, 1, $noreg, 16, $noreg, killed $rsi833 RET64834 835 bb.2.is_null:836 RET64837 838...839---840name: inc_store_with_dep841# CHECK-LABEL: inc_store_with_dep842# CHECK: bb.0.entry:843# CHECK: $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags844# CHECK-NEXT: $noreg = FAULTING_OP 3, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 16, $noreg, $esi845# CHECK-NEXT: JMP_1 %bb.1846# CHECK: bb.1.not_null847# CHECK-NOT: liveins: {{.*}} $eflags848 849alignment: 16850tracksRegLiveness: true851liveins:852 - { reg: '$rdi' }853 - { reg: '$rsi' }854body: |855 bb.0.entry:856 liveins: $rdi, $rsi857 858 TEST64rr $rdi, $rdi, implicit-def $eflags859 JCC_1 %bb.2, 4, implicit killed $eflags860 861 bb.1.not_null:862 liveins: $rdi, $rsi863 864 $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags865 MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi866 RET64867 868 bb.2.is_null:869 RET64870 871...872---873name: inc_store_with_dep_in_null874# CHECK-LABEL: inc_store_with_dep_in_null875# CHECK: bb.0.entry:876# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags877# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags878# CHECK: bb.1.not_null879 880alignment: 16881tracksRegLiveness: true882liveins:883 - { reg: '$rdi' }884 - { reg: '$rsi' }885body: |886 bb.0.entry:887 liveins: $rdi, $rsi888 889 TEST64rr $rdi, $rdi, implicit-def $eflags890 JCC_1 %bb.2, 4, implicit killed $eflags891 892 bb.1.not_null:893 liveins: $rdi, $rsi894 895 $esi = ADD32rr $esi, $esi, implicit-def dead $eflags896 MOV32mr killed $rdi, 1, $noreg, 0, $noreg, $esi897 $eax = MOV32rr killed $esi898 RET64 $eax899 900 bb.2.is_null:901 liveins: $rsi902 903 $eax = MOV32rr killed $esi904 RET64 $eax905 906...907---908name: inc_store_with_volatile909# CHECK-LABEL: inc_store_with_volatile910# CHECK: bb.0.entry:911# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags912# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags913# CHECK: bb.1.not_null914 915alignment: 16916tracksRegLiveness: true917liveins:918 - { reg: '$rdi' }919 - { reg: '$rsi' }920body: |921 bb.0.entry:922 liveins: $rdi, $rsi923 924 TEST64rr $rdi, $rdi, implicit-def $eflags925 JCC_1 %bb.2, 4, implicit killed $eflags926 927 bb.1.not_null:928 liveins: $rdi, $rsi929 930 MOV32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi :: (volatile store (s32) into %ir.ptr)931 RET64932 933 bb.2.is_null:934 RET64935 936...937---938name: inc_store_with_two_dep939# CHECK-LABEL: inc_store_with_two_dep940# CHECK: bb.0.entry:941# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags942# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags943# CHECK: bb.1.not_null944 945alignment: 16946tracksRegLiveness: true947liveins:948 - { reg: '$rdi' }949 - { reg: '$rsi' }950body: |951 bb.0.entry:952 liveins: $rdi, $rsi953 954 TEST64rr $rdi, $rdi, implicit-def $eflags955 JCC_1 %bb.2, 4, implicit killed $eflags956 957 bb.1.not_null:958 liveins: $rdi, $rsi959 960 $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags961 $esi = ADD32ri killed $esi, 15, implicit-def dead $eflags962 MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi963 RET64964 965 bb.2.is_null:966 RET64967 968...969---970name: inc_store_with_redefined_base971# CHECK-LABEL: inc_store_with_redefined_base972# CHECK: bb.0.entry:973# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags974# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags975# CHECK: bb.1.not_null976 977alignment: 16978tracksRegLiveness: true979liveins:980 - { reg: '$rdi' }981 - { reg: '$rsi' }982body: |983 bb.0.entry:984 liveins: $rdi, $rsi985 986 TEST64rr $rdi, $rdi, implicit-def $eflags987 JCC_1 %bb.2, 4, implicit killed $eflags988 989 bb.1.not_null:990 liveins: $rdi, $rsi991 992 $rdi = ADD64rr killed $rdi, killed $rdi, implicit-def dead $eflags993 MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi994 RET64995 996 bb.2.is_null:997 RET64998 999...1000---1001name: inc_store_with_reused_base1002# CHECK-LABEL: inc_store_with_reused_base1003# CHECK: bb.0.entry:1004# CHECK: $noreg = FAULTING_OP 3, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 16, $noreg, $esi1005# CHECK-NEXT: JMP_1 %bb.11006# CHECK: bb.1.not_null1007 1008alignment: 161009tracksRegLiveness: true1010liveins:1011 - { reg: '$rdi' }1012 - { reg: '$rsi' }1013body: |1014 bb.0.entry:1015 liveins: $rdi, $rsi1016 1017 TEST64rr $rdi, $rdi, implicit-def $eflags1018 JCC_1 %bb.2, 4, implicit killed $eflags1019 1020 bb.1.not_null:1021 liveins: $rdi, $rsi1022 1023 $rax = MOV64rr $rdi1024 MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi1025 RET64 $eax1026 1027 bb.2.is_null:1028 $rax = XOR64rr undef $rax, undef $rax, implicit-def dead $eflags1029 RET64 $eax1030 1031...1032---1033name: inc_store_across_call1034# CHECK-LABEL: inc_store_across_call1035# CHECK: bb.0.entry:1036# CHECK: TEST64rr $rbx, $rbx, implicit-def $eflags1037# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1038# CHECK: bb.1.not_null1039 1040alignment: 161041tracksRegLiveness: true1042liveins:1043 - { reg: '$rdi' }1044calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',1045 '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',1046 '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',1047 '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]1048body: |1049 bb.0.entry:1050 liveins: $rdi, $rbx1051 1052 frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp1053 CFI_INSTRUCTION def_cfa_offset 161054 CFI_INSTRUCTION offset $rbx, -161055 $rbx = MOV64rr killed $rdi1056 TEST64rr $rbx, $rbx, implicit-def $eflags1057 JCC_1 %bb.2, 4, implicit killed $eflags1058 1059 bb.1.not_null:1060 liveins: $rbx1061 1062 CALL64pcrel32 @f, csr_64, implicit $rsp, implicit-def $rsp1063 MOV32mi $rbx, 1, $noreg, 0, $noreg, 201064 $rax = MOV64rr killed $rbx1065 $rbx = POP64r implicit-def $rsp, implicit $rsp1066 RET64 $eax1067 1068 bb.2.is_null:1069 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1070 $rbx = POP64r implicit-def $rsp, implicit $rsp1071 RET64 $eax1072 1073...1074---1075name: inc_store_with_dep_in_dep1076# CHECK-LABEL: inc_store_with_dep_in_dep1077# CHECK: bb.0.entry:1078# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags1079# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1080# CHECK: bb.1.not_null1081 1082alignment: 161083tracksRegLiveness: true1084liveins:1085 - { reg: '$rdi' }1086 - { reg: '$rsi' }1087body: |1088 bb.0.entry:1089 liveins: $rdi, $rsi1090 1091 TEST64rr $rdi, $rdi, implicit-def $eflags1092 JCC_1 %bb.2, 4, implicit killed $eflags1093 1094 bb.1.not_null:1095 liveins: $rdi, $rsi1096 1097 $eax = MOV32rr $esi1098 $esi = ADD32ri killed $esi, 15, implicit-def dead $eflags1099 MOV32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi1100 RET64 $eax1101 1102 bb.2.is_null:1103 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1104 RET64 $eax1105 1106...1107---1108name: inc_store_with_load_over_store1109# CHECK-LABEL: inc_store_with_load_over_store1110# CHECK: bb.0.entry:1111# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags1112# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1113# CHECK: bb.1.not_null1114 1115alignment: 161116tracksRegLiveness: true1117liveins:1118 - { reg: '$rdi' }1119 - { reg: '$rsi' }1120body: |1121 bb.0.entry:1122 liveins: $rdi, $rsi1123 1124 TEST64rr $rdi, $rdi, implicit-def $eflags1125 JCC_1 %bb.2, 4, implicit killed $eflags1126 1127 bb.1.not_null:1128 liveins: $rdi, $rsi1129 1130 MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 21131 $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg 1132 RET64 $eax1133 1134 bb.2.is_null:1135 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1136 RET64 $eax1137 1138...1139---1140name: inc_store_with_store_over_load1141# CHECK-LABEL: inc_store_with_store_over_load1142# CHECK: bb.0.entry:1143# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags1144# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1145# CHECK: bb.1.not_null1146 1147alignment: 161148tracksRegLiveness: true1149liveins:1150 - { reg: '$rdi' }1151 - { reg: '$rsi' }1152body: |1153 bb.0.entry:1154 liveins: $rdi, $rsi1155 1156 TEST64rr $rdi, $rdi, implicit-def $eflags1157 JCC_1 %bb.2, 4, implicit killed $eflags1158 1159 bb.1.not_null:1160 liveins: $rdi, $rsi1161 1162 $eax = MOV32rm killed $rsi, 1, $noreg, 0, $noreg 1163 MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 21164 RET64 $eax1165 1166 bb.2.is_null:1167 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1168 RET64 $eax1169 1170...1171---1172name: inc_store_with_store_over_store1173# CHECK-LABEL: inc_store_with_store_over_store1174# CHECK: bb.0.entry:1175# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags1176# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1177# CHECK: bb.1.not_null1178 1179alignment: 161180tracksRegLiveness: true1181liveins:1182 - { reg: '$rdi' }1183 - { reg: '$rsi' }1184body: |1185 bb.0.entry:1186 liveins: $rdi, $rsi1187 1188 TEST64rr $rdi, $rdi, implicit-def $eflags1189 JCC_1 %bb.2, 4, implicit killed $eflags1190 1191 bb.1.not_null:1192 liveins: $rdi, $rsi1193 1194 MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 1195 MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 21196 RET641197 1198 bb.2.is_null:1199 RET641200 1201...1202---1203name: inc_store_with_load_and_store1204# CHECK-LABEL: inc_store_with_load_and_store1205# CHECK: bb.0.entry:1206# CHECK: $noreg = FAULTING_OP 2, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 0, $noreg, $esi, implicit-def $eflags1207# CHECK-NEXT: JMP_1 %bb.11208# CHECK: bb.1.not_null1209 1210alignment: 161211tracksRegLiveness: true1212liveins:1213 - { reg: '$rdi' }1214 - { reg: '$rsi' }1215body: |1216 bb.0.entry:1217 liveins: $rdi, $rsi1218 1219 TEST64rr $rdi, $rdi, implicit-def $eflags1220 JCC_1 %bb.2, 4, implicit killed $eflags1221 1222 bb.1.not_null:1223 liveins: $rdi, $rsi1224 1225 $esi = ADD32rr $esi, $esi, implicit-def dead $eflags1226 ADD32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi, implicit-def dead $eflags1227 RET641228 1229 bb.2.is_null:1230 RET641231 1232...1233---1234name: inc_store_and_load_no_alias1235# CHECK-LABEL: inc_store_and_load_no_alias1236# CHECK: bb.0.entry:1237# CHECK: $eax = FAULTING_OP 1, %bb.2, {{[0-9]+}}, $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)1238# CHECK-NEXT: JMP_1 %bb.11239# CHECK: bb.1.not_null1240 1241alignment: 161242tracksRegLiveness: true1243liveins:1244 - { reg: '$rdi' }1245 - { reg: '$rsi' }1246body: |1247 bb.0.entry:1248 liveins: $rdi, $rsi1249 1250 TEST64rr $rdi, $rdi, implicit-def $eflags1251 JCC_1 %bb.2, 4, implicit killed $eflags1252 1253 bb.1.not_null:1254 liveins: $rdi, $rsi1255 1256 MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 :: (store (s32) into %ir.ptr2)1257 $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)1258 RET64 $eax1259 1260 bb.2.is_null:1261 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1262 RET64 $eax1263 1264...1265---1266name: inc_store_and_load_alias1267# CHECK-LABEL: inc_store_and_load_alias1268# CHECK: bb.0.entry:1269# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags1270# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1271# CHECK: bb.1.not_null1272 1273alignment: 161274tracksRegLiveness: true1275liveins:1276 - { reg: '$rdi' }1277 - { reg: '$rsi' }1278body: |1279 bb.0.entry:1280 liveins: $rdi, $rsi1281 1282 TEST64rr $rdi, $rdi, implicit-def $eflags1283 JCC_1 %bb.2, 4, implicit killed $eflags1284 1285 bb.1.not_null:1286 liveins: $rdi, $rsi1287 1288 MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 :: (store (s32) into %ir.ptr2)1289 $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)1290 RET64 $eax1291 1292 bb.2.is_null:1293 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1294 RET64 $eax1295 1296...1297---1298name: inc_spill_dep1299# CHECK-LABEL: inc_spill_dep1300# CHECK: bb.0.entry:1301# CHECK: TEST64rr $rdi, $rdi, implicit-def $eflags1302# CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags1303# CHECK: bb.1.not_null1304 1305alignment: 161306tracksRegLiveness: true1307stack:1308 - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8}1309liveins:1310 - { reg: '$rdi' }1311 - { reg: '$rsi' }1312body: |1313 bb.0.entry:1314 liveins: $rdi, $rsi1315 1316 $rsp = frame-setup SUB64ri8 $rsp, 8, implicit-def dead $eflags1317 MOV32mr $rsp, 1, $noreg, 0, $noreg, $esi :: (store (s32) into %stack.0)1318 TEST64rr $rdi, $rdi, implicit-def $eflags1319 JCC_1 %bb.2, 4, implicit killed $eflags1320 1321 bb.1.not_null:1322 liveins: $rdi, $rsi1323 1324 $r14d = MOV32rm $rsp, 1, $noreg, 0, $noreg :: (load (s32) from %stack.0)1325 MOV64mr $rsp, 1, $noreg, 0, $noreg, $rdi :: (store (s64) into %stack.0)1326 $edi = MOV32rm $rdi, 1, $noreg, 8, $noreg :: (load (s32) from %ir.ptr)1327 $eax = MOV32rr $edi1328 RET64 $eax1329 1330 bb.2.is_null:1331 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags1332 RET64 $eax1333 1334...1335---1336name: imp_null_check_address_mul_overflow1337# CHECK-LABEL: name: imp_null_check_address_mul_overflow1338# CHECK: bb.0.entry:1339# CHECK-NOT: FAULTING_OP1340alignment: 161341tracksRegLiveness: true1342liveins: 1343 - { reg: '$rdi' }1344 - { reg: '$rsi' }1345body: |1346 bb.0.entry:1347 liveins: $rsi, $rdi1348 1349 TEST64rr $rdi, $rdi, implicit-def $eflags1350 JCC_1 %bb.1, 4, implicit $eflags1351 1352 bb.2.not_null:1353 liveins: $rdi, $rsi1354 1355 $rcx = MOV64ri -92233720368547758081356 $eax = MOV32rm killed $rdi, 2, $rcx, 0, $noreg, implicit-def $rax1357 RET64 $eax1358 1359 bb.1.is_null:1360 $eax = MOV32ri 421361 RET64 $eax1362 1363...1364