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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr +avx < %s | FileCheck %s3 4; The C source used as a base for generating this test:.5 6; unsigned test(float f)7; {8; unsigned i;9; // Copies f into the output operand i10; asm volatile ("" : "=r" (i) : "0" (f));11; return i;12; }13 14 15define i32 @test_int_float(float %f) {16; CHECK-LABEL: test_int_float:17; CHECK: # %bb.0: # %entry18; CHECK-NEXT: vmovd %xmm0, %eax19; CHECK-NEXT: #APP20; CHECK-NEXT: #NO_APP21; CHECK-NEXT: retq22entry:23 %asm_call = call i32 asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(float %f)24 ret i32 %asm_call25}26 27define i32 @test_int_ptr(ptr %f) {28; CHECK-LABEL: test_int_ptr:29; CHECK: # %bb.0: # %entry30; CHECK-NEXT: movq %rdi, %rax31; CHECK-NEXT: #APP32; CHECK-NEXT: #NO_APP33; CHECK-NEXT: # kill: def $eax killed $eax killed $rax34; CHECK-NEXT: retq35entry:36 %asm_call = call i32 asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(ptr %f)37 ret i32 %asm_call38}39 40define i64 @test_int_vec(<4 x i16> %v) {41; CHECK-LABEL: test_int_vec:42; CHECK: # %bb.0: # %entry43; CHECK-NEXT: #APP44; CHECK-NEXT: #NO_APP45; CHECK-NEXT: vmovq %xmm0, %rax46; CHECK-NEXT: retq47entry:48 %asm_call = call i64 asm sideeffect "", "=v,0,~{dirflag},~{fpsr},~{flags}"(<4 x i16> %v)49 ret i64 %asm_call50}51 52define <4 x i32> @test_int_vec_float_vec(<4 x float> %f) {53; CHECK-LABEL: test_int_vec_float_vec:54; CHECK: # %bb.0: # %entry55; CHECK-NEXT: #APP56; CHECK-NEXT: #NO_APP57; CHECK-NEXT: retq58entry:59 %asm_call = call <4 x i32> asm sideeffect "", "=v,0,~{dirflag},~{fpsr},~{flags}"(<4 x float> %f)60 ret <4 x i32> %asm_call61}62