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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE34; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE35; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE416; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX17; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX28; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,avx512bw | FileCheck %s --check-prefixes=AVX,AVX5129; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX51210 11define <2 x i64> @insert_v2i64_x1(<2 x i64> %a) {12; SSE2-LABEL: insert_v2i64_x1:13; SSE2: # %bb.0:14; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]15; SSE2-NEXT: retq16;17; SSE3-LABEL: insert_v2i64_x1:18; SSE3: # %bb.0:19; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]20; SSE3-NEXT: retq21;22; SSSE3-LABEL: insert_v2i64_x1:23; SSSE3: # %bb.0:24; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]25; SSSE3-NEXT: retq26;27; SSE41-LABEL: insert_v2i64_x1:28; SSE41: # %bb.0:29; SSE41-NEXT: pcmpeqd %xmm1, %xmm130; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]31; SSE41-NEXT: retq32;33; AVX1-LABEL: insert_v2i64_x1:34; AVX1: # %bb.0:35; AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm136; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]37; AVX1-NEXT: retq38;39; AVX2-LABEL: insert_v2i64_x1:40; AVX2: # %bb.0:41; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm142; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]43; AVX2-NEXT: retq44;45; AVX512-LABEL: insert_v2i64_x1:46; AVX512: # %bb.0:47; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm148; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]49; AVX512-NEXT: retq50 %1 = insertelement <2 x i64> %a, i64 -1, i32 051 ret <2 x i64> %152}53 54define <4 x i64> @insert_v4i64_01x3(<4 x i64> %a) {55; SSE2-LABEL: insert_v4i64_01x3:56; SSE2: # %bb.0:57; SSE2-NEXT: movlps {{.*#+}} xmm1 = mem[0,1],xmm1[2,3]58; SSE2-NEXT: retq59;60; SSE3-LABEL: insert_v4i64_01x3:61; SSE3: # %bb.0:62; SSE3-NEXT: movlps {{.*#+}} xmm1 = mem[0,1],xmm1[2,3]63; SSE3-NEXT: retq64;65; SSSE3-LABEL: insert_v4i64_01x3:66; SSSE3: # %bb.0:67; SSSE3-NEXT: movlps {{.*#+}} xmm1 = mem[0,1],xmm1[2,3]68; SSSE3-NEXT: retq69;70; SSE41-LABEL: insert_v4i64_01x3:71; SSE41: # %bb.0:72; SSE41-NEXT: pcmpeqd %xmm2, %xmm273; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]74; SSE41-NEXT: retq75;76; AVX1-LABEL: insert_v4i64_01x3:77; AVX1: # %bb.0:78; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm179; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm180; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5],ymm0[6,7]81; AVX1-NEXT: retq82;83; AVX2-LABEL: insert_v4i64_01x3:84; AVX2: # %bb.0:85; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm186; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5],ymm0[6,7]87; AVX2-NEXT: retq88;89; AVX512-LABEL: insert_v4i64_01x3:90; AVX512: # %bb.0:91; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm192; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5],ymm0[6,7]93; AVX512-NEXT: retq94 %1 = insertelement <4 x i64> %a, i64 -1, i32 295 ret <4 x i64> %196}97 98define <4 x i32> @insert_v4i32_01x3(<4 x i32> %a) {99; SSE2-LABEL: insert_v4i32_01x3:100; SSE2: # %bb.0:101; SSE2-NEXT: movl $-1, %eax102; SSE2-NEXT: movd %eax, %xmm1103; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]104; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]105; SSE2-NEXT: retq106;107; SSE3-LABEL: insert_v4i32_01x3:108; SSE3: # %bb.0:109; SSE3-NEXT: movl $-1, %eax110; SSE3-NEXT: movd %eax, %xmm1111; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]112; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]113; SSE3-NEXT: retq114;115; SSSE3-LABEL: insert_v4i32_01x3:116; SSSE3: # %bb.0:117; SSSE3-NEXT: movl $-1, %eax118; SSSE3-NEXT: movd %eax, %xmm1119; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]120; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]121; SSSE3-NEXT: retq122;123; SSE41-LABEL: insert_v4i32_01x3:124; SSE41: # %bb.0:125; SSE41-NEXT: pcmpeqd %xmm1, %xmm1126; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]127; SSE41-NEXT: retq128;129; AVX1-LABEL: insert_v4i32_01x3:130; AVX1: # %bb.0:131; AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1132; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]133; AVX1-NEXT: retq134;135; AVX2-LABEL: insert_v4i32_01x3:136; AVX2: # %bb.0:137; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1138; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]139; AVX2-NEXT: retq140;141; AVX512-LABEL: insert_v4i32_01x3:142; AVX512: # %bb.0:143; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1144; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]145; AVX512-NEXT: retq146 %1 = insertelement <4 x i32> %a, i32 -1, i32 2147 ret <4 x i32> %1148}149 150define <8 x i32> @insert_v8i32_x12345x7(<8 x i32> %a) {151; SSE-LABEL: insert_v8i32_x12345x7:152; SSE: # %bb.0:153; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0154; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1155; SSE-NEXT: retq156;157; AVX-LABEL: insert_v8i32_x12345x7:158; AVX: # %bb.0:159; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0160; AVX-NEXT: retq161 %1 = insertelement <8 x i32> %a, i32 -1, i32 0162 %2 = insertelement <8 x i32> %1, i32 -1, i32 6163 ret <8 x i32> %2164}165 166define <8 x i16> @insert_v8i16_x12345x7(<8 x i16> %a) {167; SSE-LABEL: insert_v8i16_x12345x7:168; SSE: # %bb.0:169; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0170; SSE-NEXT: retq171;172; AVX-LABEL: insert_v8i16_x12345x7:173; AVX: # %bb.0:174; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0175; AVX-NEXT: retq176 %1 = insertelement <8 x i16> %a, i16 -1, i32 0177 %2 = insertelement <8 x i16> %1, i16 -1, i32 6178 ret <8 x i16> %2179}180 181define <16 x i16> @insert_v16i16_x12345x789ABCDEx(<16 x i16> %a) {182; SSE-LABEL: insert_v16i16_x12345x789ABCDEx:183; SSE: # %bb.0:184; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0185; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1186; SSE-NEXT: retq187;188; AVX-LABEL: insert_v16i16_x12345x789ABCDEx:189; AVX: # %bb.0:190; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0191; AVX-NEXT: retq192 %1 = insertelement <16 x i16> %a, i16 -1, i32 0193 %2 = insertelement <16 x i16> %1, i16 -1, i32 6194 %3 = insertelement <16 x i16> %2, i16 -1, i32 15195 ret <16 x i16> %3196}197 198define <16 x i8> @insert_v16i8_x123456789ABCDEx(<16 x i8> %a) {199; SSE-LABEL: insert_v16i8_x123456789ABCDEx:200; SSE: # %bb.0:201; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0202; SSE-NEXT: retq203;204; AVX-LABEL: insert_v16i8_x123456789ABCDEx:205; AVX: # %bb.0:206; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0207; AVX-NEXT: retq208 %1 = insertelement <16 x i8> %a, i8 -1, i32 0209 %2 = insertelement <16 x i8> %1, i8 -1, i32 15210 ret <16 x i8> %2211}212 213define <32 x i8> @insert_v32i8_x123456789ABCDEzGHIJKLMNOPQRSTxx(<32 x i8> %a) {214; SSE-LABEL: insert_v32i8_x123456789ABCDEzGHIJKLMNOPQRSTxx:215; SSE: # %bb.0:216; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0217; SSE-NEXT: orps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1218; SSE-NEXT: retq219;220; AVX-LABEL: insert_v32i8_x123456789ABCDEzGHIJKLMNOPQRSTxx:221; AVX: # %bb.0:222; AVX-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0223; AVX-NEXT: retq224 %1 = insertelement <32 x i8> %a, i8 -1, i32 0225 %2 = insertelement <32 x i8> %1, i8 -1, i32 15226 %3 = insertelement <32 x i8> %2, i8 -1, i32 30227 %4 = insertelement <32 x i8> %3, i8 -1, i32 31228 ret <32 x i8> %4229}230