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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X86,X86_AVX2563; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X64,X64_AVX2564; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86_AVX5125; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64_AVX5126 7define <8 x float> @insert_subvector_256(i16 %x0, i16 %x1, <8 x float> %v) nounwind {8; X86-LABEL: insert_subvector_256:9; X86: # %bb.0:10; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero11; X86-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm1, %xmm112; X86-NEXT: vpbroadcastd %xmm1, %xmm113; X86-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4,5,6,7]14; X86-NEXT: retl15;16; X64-LABEL: insert_subvector_256:17; X64: # %bb.0:18; X64-NEXT: vmovd %edi, %xmm119; X64-NEXT: vpinsrw $1, %esi, %xmm1, %xmm120; X64-NEXT: vpbroadcastd %xmm1, %xmm121; X64-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4,5,6,7]22; X64-NEXT: retq23 %ins1 = insertelement <2 x i16> undef, i16 %x0, i32 024 %ins2 = insertelement <2 x i16> %ins1, i16 %x1, i32 125 %bc = bitcast <2 x i16> %ins2 to float26 %ins3 = insertelement <8 x float> %v, float %bc, i32 127 ret <8 x float> %ins328}29 30define <8 x i64> @insert_subvector_512(i32 %x0, i32 %x1, <8 x i64> %v) nounwind {31; X86_AVX256-LABEL: insert_subvector_512:32; X86_AVX256: # %bb.0:33; X86_AVX256-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm234; X86_AVX256-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm2[4],ymm0[5,6,7]35; X86_AVX256-NEXT: vbroadcastss {{[0-9]+}}(%esp), %ymm236; X86_AVX256-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4],ymm2[5],ymm0[6,7]37; X86_AVX256-NEXT: retl38;39; X64_AVX256-LABEL: insert_subvector_512:40; X64_AVX256: # %bb.0:41; X64_AVX256-NEXT: vmovd %edi, %xmm242; X64_AVX256-NEXT: vpinsrd $1, %esi, %xmm2, %xmm243; X64_AVX256-NEXT: vpbroadcastq %xmm2, %ymm244; X64_AVX256-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm2[4,5],ymm0[6,7]45; X64_AVX256-NEXT: retq46;47; X86_AVX512-LABEL: insert_subvector_512:48; X86_AVX512: # %bb.0:49; X86_AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero50; X86_AVX512-NEXT: vpmovsxbq {{.*#+}} zmm2 = [0,1,8,3,4,5,6,7]51; X86_AVX512-NEXT: vpermt2q %zmm1, %zmm2, %zmm052; X86_AVX512-NEXT: retl53;54; X64_AVX512-LABEL: insert_subvector_512:55; X64_AVX512: # %bb.0:56; X64_AVX512-NEXT: vmovd %edi, %xmm157; X64_AVX512-NEXT: vpinsrd $1, %esi, %xmm1, %xmm158; X64_AVX512-NEXT: vpmovsxbq {{.*#+}} zmm2 = [0,1,8,3,4,5,6,7]59; X64_AVX512-NEXT: vpermt2q %zmm1, %zmm2, %zmm060; X64_AVX512-NEXT: retq61 %ins1 = insertelement <2 x i32> undef, i32 %x0, i32 062 %ins2 = insertelement <2 x i32> %ins1, i32 %x1, i32 163 %bc = bitcast <2 x i32> %ins2 to i6464 %ins3 = insertelement <8 x i64> %v, i64 %bc, i32 265 ret <8 x i64> %ins366}67 68; PR34716 - https://bugs.llvm.org/show_bug.cgi?id=3471669; Special case: if we're inserting into an undef vector, we can optimize more.70 71define <8 x i64> @insert_subvector_into_undef(i32 %x0, i32 %x1) nounwind {72; X86_AVX256-LABEL: insert_subvector_into_undef:73; X86_AVX256: # %bb.0:74; X86_AVX256-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %ymm075; X86_AVX256-NEXT: vmovaps %ymm0, %ymm176; X86_AVX256-NEXT: retl77;78; X64_AVX256-LABEL: insert_subvector_into_undef:79; X64_AVX256: # %bb.0:80; X64_AVX256-NEXT: vmovd %edi, %xmm081; X64_AVX256-NEXT: vpinsrd $1, %esi, %xmm0, %xmm082; X64_AVX256-NEXT: vpbroadcastq %xmm0, %ymm083; X64_AVX256-NEXT: vmovdqa %ymm0, %ymm184; X64_AVX256-NEXT: retq85;86; X86_AVX512-LABEL: insert_subvector_into_undef:87; X86_AVX512: # %bb.0:88; X86_AVX512-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %zmm089; X86_AVX512-NEXT: retl90;91; X64_AVX512-LABEL: insert_subvector_into_undef:92; X64_AVX512: # %bb.0:93; X64_AVX512-NEXT: vmovd %edi, %xmm094; X64_AVX512-NEXT: vpinsrd $1, %esi, %xmm0, %xmm095; X64_AVX512-NEXT: vpbroadcastq %xmm0, %zmm096; X64_AVX512-NEXT: retq97 %ins1 = insertelement <2 x i32> undef, i32 %x0, i32 098 %ins2 = insertelement <2 x i32> %ins1, i32 %x1, i32 199 %bc = bitcast <2 x i32> %ins2 to i64100 %ins3 = insertelement <8 x i64> undef, i64 %bc, i32 0101 %splat = shufflevector <8 x i64> %ins3, <8 x i64> undef, <8 x i32> zeroinitializer102 ret <8 x i64> %splat103}104 105