542 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE34; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE35; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE416; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX17; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX28; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX29; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX210 11define <2 x double> @insert_v2f64_z1(<2 x double> %a) {12; SSE2-LABEL: insert_v2f64_z1:13; SSE2: # %bb.0:14; SSE2-NEXT: xorpd %xmm1, %xmm115; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]16; SSE2-NEXT: retq17;18; SSE3-LABEL: insert_v2f64_z1:19; SSE3: # %bb.0:20; SSE3-NEXT: xorpd %xmm1, %xmm121; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]22; SSE3-NEXT: retq23;24; SSSE3-LABEL: insert_v2f64_z1:25; SSSE3: # %bb.0:26; SSSE3-NEXT: xorpd %xmm1, %xmm127; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]28; SSSE3-NEXT: retq29;30; SSE41-LABEL: insert_v2f64_z1:31; SSE41: # %bb.0:32; SSE41-NEXT: xorps %xmm1, %xmm133; SSE41-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]34; SSE41-NEXT: retq35;36; AVX-LABEL: insert_v2f64_z1:37; AVX: # %bb.0:38; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm139; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]40; AVX-NEXT: retq41 %1 = insertelement <2 x double> %a, double 0.0, i32 042 ret <2 x double> %143}44 45define <4 x double> @insert_v4f64_0zz3(<4 x double> %a) {46; SSE2-LABEL: insert_v4f64_0zz3:47; SSE2: # %bb.0:48; SSE2-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero49; SSE2-NEXT: xorpd %xmm2, %xmm250; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]51; SSE2-NEXT: retq52;53; SSE3-LABEL: insert_v4f64_0zz3:54; SSE3: # %bb.0:55; SSE3-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero56; SSE3-NEXT: xorpd %xmm2, %xmm257; SSE3-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]58; SSE3-NEXT: retq59;60; SSSE3-LABEL: insert_v4f64_0zz3:61; SSSE3: # %bb.0:62; SSSE3-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero63; SSSE3-NEXT: xorpd %xmm2, %xmm264; SSSE3-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]65; SSSE3-NEXT: retq66;67; SSE41-LABEL: insert_v4f64_0zz3:68; SSE41: # %bb.0:69; SSE41-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero70; SSE41-NEXT: xorps %xmm2, %xmm271; SSE41-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]72; SSE41-NEXT: retq73;74; AVX-LABEL: insert_v4f64_0zz3:75; AVX: # %bb.0:76; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm177; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5],ymm0[6,7]78; AVX-NEXT: retq79 %1 = insertelement <4 x double> %a, double 0.0, i32 180 %2 = insertelement <4 x double> %1, double 0.0, i32 281 ret <4 x double> %282}83 84define <2 x i64> @insert_v2i64_z1(<2 x i64> %a) {85; SSE2-LABEL: insert_v2i64_z1:86; SSE2: # %bb.0:87; SSE2-NEXT: xorpd %xmm1, %xmm188; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]89; SSE2-NEXT: retq90;91; SSE3-LABEL: insert_v2i64_z1:92; SSE3: # %bb.0:93; SSE3-NEXT: xorpd %xmm1, %xmm194; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]95; SSE3-NEXT: retq96;97; SSSE3-LABEL: insert_v2i64_z1:98; SSSE3: # %bb.0:99; SSSE3-NEXT: xorpd %xmm1, %xmm1100; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]101; SSSE3-NEXT: retq102;103; SSE41-LABEL: insert_v2i64_z1:104; SSE41: # %bb.0:105; SSE41-NEXT: xorps %xmm1, %xmm1106; SSE41-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]107; SSE41-NEXT: retq108;109; AVX-LABEL: insert_v2i64_z1:110; AVX: # %bb.0:111; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1112; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]113; AVX-NEXT: retq114 %1 = insertelement <2 x i64> %a, i64 0, i32 0115 ret <2 x i64> %1116}117 118define <4 x i64> @insert_v4i64_01z3(<4 x i64> %a) {119; SSE2-LABEL: insert_v4i64_01z3:120; SSE2: # %bb.0:121; SSE2-NEXT: xorpd %xmm2, %xmm2122; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]123; SSE2-NEXT: retq124;125; SSE3-LABEL: insert_v4i64_01z3:126; SSE3: # %bb.0:127; SSE3-NEXT: xorpd %xmm2, %xmm2128; SSE3-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]129; SSE3-NEXT: retq130;131; SSSE3-LABEL: insert_v4i64_01z3:132; SSSE3: # %bb.0:133; SSSE3-NEXT: xorpd %xmm2, %xmm2134; SSSE3-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]135; SSSE3-NEXT: retq136;137; SSE41-LABEL: insert_v4i64_01z3:138; SSE41: # %bb.0:139; SSE41-NEXT: xorps %xmm2, %xmm2140; SSE41-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]141; SSE41-NEXT: retq142;143; AVX-LABEL: insert_v4i64_01z3:144; AVX: # %bb.0:145; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1146; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5],ymm0[6,7]147; AVX-NEXT: retq148 %1 = insertelement <4 x i64> %a, i64 0, i32 2149 ret <4 x i64> %1150}151 152define <4 x float> @insert_v4f32_01z3(<4 x float> %a) {153; SSE2-LABEL: insert_v4f32_01z3:154; SSE2: # %bb.0:155; SSE2-NEXT: xorps %xmm1, %xmm1156; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]157; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]158; SSE2-NEXT: retq159;160; SSE3-LABEL: insert_v4f32_01z3:161; SSE3: # %bb.0:162; SSE3-NEXT: xorps %xmm1, %xmm1163; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]164; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]165; SSE3-NEXT: retq166;167; SSSE3-LABEL: insert_v4f32_01z3:168; SSSE3: # %bb.0:169; SSSE3-NEXT: xorps %xmm1, %xmm1170; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]171; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]172; SSSE3-NEXT: retq173;174; SSE41-LABEL: insert_v4f32_01z3:175; SSE41: # %bb.0:176; SSE41-NEXT: xorps %xmm1, %xmm1177; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]178; SSE41-NEXT: retq179;180; AVX-LABEL: insert_v4f32_01z3:181; AVX: # %bb.0:182; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1183; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]184; AVX-NEXT: retq185 %1 = insertelement <4 x float> %a, float 0.0, i32 2186 ret <4 x float> %1187}188 189define <8 x float> @insert_v8f32_z12345z7(<8 x float> %a) {190; SSE2-LABEL: insert_v8f32_z12345z7:191; SSE2: # %bb.0:192; SSE2-NEXT: xorps %xmm2, %xmm2193; SSE2-NEXT: movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]194; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,0],xmm1[3,0]195; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0,2]196; SSE2-NEXT: retq197;198; SSE3-LABEL: insert_v8f32_z12345z7:199; SSE3: # %bb.0:200; SSE3-NEXT: xorps %xmm2, %xmm2201; SSE3-NEXT: movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]202; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,0],xmm1[3,0]203; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0,2]204; SSE3-NEXT: retq205;206; SSSE3-LABEL: insert_v8f32_z12345z7:207; SSSE3: # %bb.0:208; SSSE3-NEXT: xorps %xmm2, %xmm2209; SSSE3-NEXT: movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]210; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,0],xmm1[3,0]211; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0,2]212; SSSE3-NEXT: retq213;214; SSE41-LABEL: insert_v8f32_z12345z7:215; SSE41: # %bb.0:216; SSE41-NEXT: xorps %xmm2, %xmm2217; SSE41-NEXT: movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]218; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm1[0,1],xmm2[2],xmm1[3]219; SSE41-NEXT: retq220;221; AVX-LABEL: insert_v8f32_z12345z7:222; AVX: # %bb.0:223; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1224; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5],ymm1[6],ymm0[7]225; AVX-NEXT: retq226 %1 = insertelement <8 x float> %a, float 0.0, i32 0227 %2 = insertelement <8 x float> %1, float 0.0, i32 6228 ret <8 x float> %2229}230 231define <4 x i32> @insert_v4i32_01z3(<4 x i32> %a) {232; SSE2-LABEL: insert_v4i32_01z3:233; SSE2: # %bb.0:234; SSE2-NEXT: xorps %xmm1, %xmm1235; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]236; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]237; SSE2-NEXT: retq238;239; SSE3-LABEL: insert_v4i32_01z3:240; SSE3: # %bb.0:241; SSE3-NEXT: xorps %xmm1, %xmm1242; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]243; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]244; SSE3-NEXT: retq245;246; SSSE3-LABEL: insert_v4i32_01z3:247; SSSE3: # %bb.0:248; SSSE3-NEXT: xorps %xmm1, %xmm1249; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]250; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]251; SSSE3-NEXT: retq252;253; SSE41-LABEL: insert_v4i32_01z3:254; SSE41: # %bb.0:255; SSE41-NEXT: xorps %xmm1, %xmm1256; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]257; SSE41-NEXT: retq258;259; AVX-LABEL: insert_v4i32_01z3:260; AVX: # %bb.0:261; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1262; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]263; AVX-NEXT: retq264 %1 = insertelement <4 x i32> %a, i32 0, i32 2265 ret <4 x i32> %1266}267 268define <8 x i32> @insert_v8i32_z12345z7(<8 x i32> %a) {269; SSE2-LABEL: insert_v8i32_z12345z7:270; SSE2: # %bb.0:271; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0272; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1273; SSE2-NEXT: retq274;275; SSE3-LABEL: insert_v8i32_z12345z7:276; SSE3: # %bb.0:277; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0278; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1279; SSE3-NEXT: retq280;281; SSSE3-LABEL: insert_v8i32_z12345z7:282; SSSE3: # %bb.0:283; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0284; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1285; SSSE3-NEXT: retq286;287; SSE41-LABEL: insert_v8i32_z12345z7:288; SSE41: # %bb.0:289; SSE41-NEXT: xorps %xmm2, %xmm2290; SSE41-NEXT: movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]291; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm1[0,1],xmm2[2],xmm1[3]292; SSE41-NEXT: retq293;294; AVX-LABEL: insert_v8i32_z12345z7:295; AVX: # %bb.0:296; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1297; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5],ymm1[6],ymm0[7]298; AVX-NEXT: retq299 %1 = insertelement <8 x i32> %a, i32 0, i32 0300 %2 = insertelement <8 x i32> %1, i32 0, i32 6301 ret <8 x i32> %2302}303 304define <8 x i16> @insert_v8i16_z12345z7(<8 x i16> %a) {305; SSE2-LABEL: insert_v8i16_z12345z7:306; SSE2: # %bb.0:307; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0308; SSE2-NEXT: retq309;310; SSE3-LABEL: insert_v8i16_z12345z7:311; SSE3: # %bb.0:312; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0313; SSE3-NEXT: retq314;315; SSSE3-LABEL: insert_v8i16_z12345z7:316; SSSE3: # %bb.0:317; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0318; SSSE3-NEXT: retq319;320; SSE41-LABEL: insert_v8i16_z12345z7:321; SSE41: # %bb.0:322; SSE41-NEXT: pxor %xmm1, %xmm1323; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5],xmm1[6],xmm0[7]324; SSE41-NEXT: retq325;326; AVX-LABEL: insert_v8i16_z12345z7:327; AVX: # %bb.0:328; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1329; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5],xmm1[6],xmm0[7]330; AVX-NEXT: retq331 %1 = insertelement <8 x i16> %a, i16 0, i32 0332 %2 = insertelement <8 x i16> %1, i16 0, i32 6333 ret <8 x i16> %2334}335 336define <16 x i16> @insert_v16i16_z12345z789ABCDEz(<16 x i16> %a) {337; SSE2-LABEL: insert_v16i16_z12345z789ABCDEz:338; SSE2: # %bb.0:339; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0340; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1341; SSE2-NEXT: retq342;343; SSE3-LABEL: insert_v16i16_z12345z789ABCDEz:344; SSE3: # %bb.0:345; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0346; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1347; SSE3-NEXT: retq348;349; SSSE3-LABEL: insert_v16i16_z12345z789ABCDEz:350; SSSE3: # %bb.0:351; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0352; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1353; SSSE3-NEXT: retq354;355; SSE41-LABEL: insert_v16i16_z12345z789ABCDEz:356; SSE41: # %bb.0:357; SSE41-NEXT: pxor %xmm2, %xmm2358; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3,4,5],xmm2[6],xmm0[7]359; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5,6],xmm2[7]360; SSE41-NEXT: retq361;362; AVX-LABEL: insert_v16i16_z12345z789ABCDEz:363; AVX: # %bb.0:364; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0365; AVX-NEXT: retq366 %1 = insertelement <16 x i16> %a, i16 0, i32 0367 %2 = insertelement <16 x i16> %1, i16 0, i32 6368 %3 = insertelement <16 x i16> %2, i16 0, i32 15369 ret <16 x i16> %3370}371 372define <16 x i8> @insert_v16i8_z123456789ABCDEz(<16 x i8> %a) {373; SSE-LABEL: insert_v16i8_z123456789ABCDEz:374; SSE: # %bb.0:375; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0376; SSE-NEXT: retq377;378; AVX-LABEL: insert_v16i8_z123456789ABCDEz:379; AVX: # %bb.0:380; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0381; AVX-NEXT: retq382 %1 = insertelement <16 x i8> %a, i8 0, i32 0383 %2 = insertelement <16 x i8> %1, i8 0, i32 15384 ret <16 x i8> %2385}386 387define <32 x i8> @insert_v32i8_z123456789ABCDEzGHIJKLMNOPQRSTzz(<32 x i8> %a) {388; SSE2-LABEL: insert_v32i8_z123456789ABCDEzGHIJKLMNOPQRSTzz:389; SSE2: # %bb.0:390; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0391; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1392; SSE2-NEXT: retq393;394; SSE3-LABEL: insert_v32i8_z123456789ABCDEzGHIJKLMNOPQRSTzz:395; SSE3: # %bb.0:396; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0397; SSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1398; SSE3-NEXT: retq399;400; SSSE3-LABEL: insert_v32i8_z123456789ABCDEzGHIJKLMNOPQRSTzz:401; SSSE3: # %bb.0:402; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0403; SSSE3-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1404; SSSE3-NEXT: retq405;406; SSE41-LABEL: insert_v32i8_z123456789ABCDEzGHIJKLMNOPQRSTzz:407; SSE41: # %bb.0:408; SSE41-NEXT: pxor %xmm2, %xmm2409; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5,6],xmm2[7]410; SSE41-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0411; SSE41-NEXT: retq412;413; AVX-LABEL: insert_v32i8_z123456789ABCDEzGHIJKLMNOPQRSTzz:414; AVX: # %bb.0:415; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0416; AVX-NEXT: retq417 %1 = insertelement <32 x i8> %a, i8 0, i32 0418 %2 = insertelement <32 x i8> %1, i8 0, i32 15419 %3 = insertelement <32 x i8> %2, i8 0, i32 30420 %4 = insertelement <32 x i8> %3, i8 0, i32 31421 ret <32 x i8> %4422}423 424define <4 x i32> @PR41512(i32 %x, i32 %y) {425; SSE-LABEL: PR41512:426; SSE: # %bb.0:427; SSE-NEXT: movd %edi, %xmm0428; SSE-NEXT: movd %esi, %xmm1429; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]430; SSE-NEXT: retq431;432; AVX-LABEL: PR41512:433; AVX: # %bb.0:434; AVX-NEXT: vmovd %edi, %xmm0435; AVX-NEXT: vmovd %esi, %xmm1436; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]437; AVX-NEXT: retq438 %ins1 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %x, i32 0439 %ins2 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %y, i32 0440 %r = shufflevector <4 x i32> %ins1, <4 x i32> %ins2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>441 ret <4 x i32> %r442}443 444define <4 x i64> @PR41512_v4i64(i64 %x, i64 %y) {445; SSE-LABEL: PR41512_v4i64:446; SSE: # %bb.0:447; SSE-NEXT: movq %rdi, %xmm0448; SSE-NEXT: movq %rsi, %xmm1449; SSE-NEXT: retq450;451; AVX1-LABEL: PR41512_v4i64:452; AVX1: # %bb.0:453; AVX1-NEXT: vmovq %rdi, %xmm0454; AVX1-NEXT: vmovq %rsi, %xmm1455; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0456; AVX1-NEXT: retq457;458; AVX2-LABEL: PR41512_v4i64:459; AVX2: # %bb.0:460; AVX2-NEXT: vmovq %rdi, %xmm0461; AVX2-NEXT: vmovq %rsi, %xmm1462; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0463; AVX2-NEXT: retq464 %ins1 = insertelement <4 x i64> <i64 undef, i64 0, i64 undef, i64 undef>, i64 %x, i32 0465 %ins2 = insertelement <4 x i64> <i64 undef, i64 0, i64 undef, i64 undef>, i64 %y, i32 0466 %r = shufflevector <4 x i64> %ins1, <4 x i64> %ins2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>467 ret <4 x i64> %r468}469 470define <8 x float> @PR41512_v8f32(float %x, float %y) {471; SSE2-LABEL: PR41512_v8f32:472; SSE2: # %bb.0:473; SSE2-NEXT: xorps %xmm2, %xmm2474; SSE2-NEXT: xorps %xmm3, %xmm3475; SSE2-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]476; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]477; SSE2-NEXT: movaps %xmm3, %xmm0478; SSE2-NEXT: movaps %xmm2, %xmm1479; SSE2-NEXT: retq480;481; SSE3-LABEL: PR41512_v8f32:482; SSE3: # %bb.0:483; SSE3-NEXT: xorps %xmm2, %xmm2484; SSE3-NEXT: xorps %xmm3, %xmm3485; SSE3-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]486; SSE3-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]487; SSE3-NEXT: movaps %xmm3, %xmm0488; SSE3-NEXT: movaps %xmm2, %xmm1489; SSE3-NEXT: retq490;491; SSSE3-LABEL: PR41512_v8f32:492; SSSE3: # %bb.0:493; SSSE3-NEXT: xorps %xmm2, %xmm2494; SSSE3-NEXT: xorps %xmm3, %xmm3495; SSSE3-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]496; SSSE3-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]497; SSSE3-NEXT: movaps %xmm3, %xmm0498; SSSE3-NEXT: movaps %xmm2, %xmm1499; SSSE3-NEXT: retq500;501; SSE41-LABEL: PR41512_v8f32:502; SSE41: # %bb.0:503; SSE41-NEXT: xorps %xmm2, %xmm2504; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]505; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]506; SSE41-NEXT: retq507;508; AVX-LABEL: PR41512_v8f32:509; AVX: # %bb.0:510; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2511; AVX-NEXT: vmovss {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]512; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]513; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0514; AVX-NEXT: retq515 %ins1 = insertelement <8 x float> zeroinitializer, float %x, i32 0516 %ins2 = insertelement <8 x float> zeroinitializer, float %y, i32 0517 %r = shufflevector <8 x float> %ins1, <8 x float> %ins2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>518 ret <8 x float> %r519}520 521define <4 x i32> @PR41512_loads(ptr %p1, ptr %p2) {522; SSE-LABEL: PR41512_loads:523; SSE: # %bb.0:524; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero525; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero526; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]527; SSE-NEXT: retq528;529; AVX-LABEL: PR41512_loads:530; AVX: # %bb.0:531; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero532; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero533; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]534; AVX-NEXT: retq535 %x = load i32, ptr %p1536 %y = load i32, ptr %p2537 %ins1 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %x, i32 0538 %ins2 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %y, i32 0539 %r = shufflevector <4 x i32> %ins1, <4 x i32> %ins2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>540 ret <4 x i32> %r541}542