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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+invpcid | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid --show-mc-encoding | FileCheck %s --check-prefix=X86_644; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR5 6define void @test_invpcid(i32 %type, ptr %descriptor) {7; X86-LABEL: test_invpcid:8; X86: # %bb.0: # %entry9; X86-NEXT: movl {{[0-9]+}}(%esp), %eax10; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx11; X86-NEXT: invpcid (%eax), %ecx12; X86-NEXT: retl13;14; X86_64-LABEL: test_invpcid:15; X86_64: # %bb.0: # %entry16; X86_64-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]17; X86_64-NEXT: invpcid (%rsi), %rax # encoding: [0x66,0x0f,0x38,0x82,0x06]18; X86_64-NEXT: retq # encoding: [0xc3]19;20; EGPR-LABEL: test_invpcid:21; EGPR: # %bb.0: # %entry22; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]23; EGPR-NEXT: invpcid (%rsi), %rax # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0x82,0x06]24; EGPR-NEXT: retq # encoding: [0xc3]25entry:26 call void @llvm.x86.invpcid(i32 %type, ptr %descriptor)27 ret void28}29 30define void @test_invpcid2(ptr readonly %type, ptr %descriptor) {31; X86-LABEL: test_invpcid2:32; X86: # %bb.0: # %entry33; X86-NEXT: movl {{[0-9]+}}(%esp), %eax34; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx35; X86-NEXT: movl (%ecx), %ecx36; X86-NEXT: invpcid (%eax), %ecx37; X86-NEXT: retl38;39; X86_64-LABEL: test_invpcid2:40; X86_64: # %bb.0: # %entry41; X86_64-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]42; X86_64-NEXT: invpcid (%rsi), %rax # encoding: [0x66,0x0f,0x38,0x82,0x06]43; X86_64-NEXT: retq # encoding: [0xc3]44;45; EGPR-LABEL: test_invpcid2:46; EGPR: # %bb.0: # %entry47; EGPR-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]48; EGPR-NEXT: invpcid (%rsi), %rax # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0x82,0x06]49; EGPR-NEXT: retq # encoding: [0xc3]50entry:51 %0 = load i32, ptr %type, align 452 tail call void @llvm.x86.invpcid(i32 %0, ptr %descriptor) #153 ret void54}55 56declare void @llvm.x86.invpcid(i32, ptr)57