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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,SDAG-X643; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,GISEL-X644; RUN: llc < %s -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,SDAG-AVX5125; RUN: llc < %s -global-isel -global-isel-abort=1 -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,GISEL-AVX5126 7define double @test_ui64_to_double(i64 %x) {8; SDAG-X64-LABEL: test_ui64_to_double:9; SDAG-X64: # %bb.0: # %entry10; SDAG-X64-NEXT: movq %rdi, %xmm111; SDAG-X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]12; SDAG-X64-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm113; SDAG-X64-NEXT: movapd %xmm1, %xmm014; SDAG-X64-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]15; SDAG-X64-NEXT: addsd %xmm1, %xmm016; SDAG-X64-NEXT: retq17;18; GISEL-X64-LABEL: test_ui64_to_double:19; GISEL-X64: # %bb.0: # %entry20; GISEL-X64-NEXT: movabsq $4841369599423283200, %rax # imm = 0x433000000000000021; GISEL-X64-NEXT: movabsq $4985484787499139072, %rcx # imm = 0x453000000000000022; GISEL-X64-NEXT: movsd {{.*#+}} xmm0 = [1.9342813118337666E+25,0.0E+0]23; GISEL-X64-NEXT: movl $4294967295, %edx # imm = 0xFFFFFFFF24; GISEL-X64-NEXT: andq %rdi, %rdx25; GISEL-X64-NEXT: orq %rax, %rdx26; GISEL-X64-NEXT: shrq $32, %rdi27; GISEL-X64-NEXT: orq %rdi, %rcx28; GISEL-X64-NEXT: movq %rcx, %xmm129; GISEL-X64-NEXT: subsd %xmm0, %xmm130; GISEL-X64-NEXT: movq %rdx, %xmm031; GISEL-X64-NEXT: addsd %xmm1, %xmm032; GISEL-X64-NEXT: retq33;34; AVX512-LABEL: test_ui64_to_double:35; AVX512: # %bb.0: # %entry36; AVX512-NEXT: vcvtusi2sd %rdi, %xmm15, %xmm037; AVX512-NEXT: retq38entry:39 %conv = uitofp i64 %x to double40 ret double %conv41}42 43define double @test_ui32_to_double(i32 %x) {44; X64-LABEL: test_ui32_to_double:45; X64: # %bb.0: # %entry46; X64-NEXT: movl %edi, %eax47; X64-NEXT: cvtsi2sd %rax, %xmm048; X64-NEXT: retq49;50; AVX512-LABEL: test_ui32_to_double:51; AVX512: # %bb.0: # %entry52; AVX512-NEXT: vcvtusi2sd %edi, %xmm15, %xmm053; AVX512-NEXT: retq54entry:55 %conv = uitofp i32 %x to double56 ret double %conv57}58 59define double @test_ui16_to_double(i16 zeroext %x) {60; X64-LABEL: test_ui16_to_double:61; X64: # %bb.0: # %entry62; X64-NEXT: cvtsi2sd %edi, %xmm063; X64-NEXT: retq64;65; SDAG-AVX512-LABEL: test_ui16_to_double:66; SDAG-AVX512: # %bb.0: # %entry67; SDAG-AVX512-NEXT: vcvtsi2sd %edi, %xmm15, %xmm068; SDAG-AVX512-NEXT: retq69;70; GISEL-AVX512-LABEL: test_ui16_to_double:71; GISEL-AVX512: # %bb.0: # %entry72; GISEL-AVX512-NEXT: vcvtusi2sd %edi, %xmm15, %xmm073; GISEL-AVX512-NEXT: retq74entry:75 %conv = uitofp i16 %x to double76 ret double %conv77}78 79define double @test_ui8_to_double(i8 zeroext %x) {80; X64-LABEL: test_ui8_to_double:81; X64: # %bb.0: # %entry82; X64-NEXT: cvtsi2sd %edi, %xmm083; X64-NEXT: retq84;85; SDAG-AVX512-LABEL: test_ui8_to_double:86; SDAG-AVX512: # %bb.0: # %entry87; SDAG-AVX512-NEXT: vcvtsi2sd %edi, %xmm15, %xmm088; SDAG-AVX512-NEXT: retq89;90; GISEL-AVX512-LABEL: test_ui8_to_double:91; GISEL-AVX512: # %bb.0: # %entry92; GISEL-AVX512-NEXT: vcvtusi2sd %edi, %xmm15, %xmm093; GISEL-AVX512-NEXT: retq94entry:95 %conv = uitofp i8 %x to double96 ret double %conv97}98 99define float @test_ui64_to_float(i64 %x) {100; SDAG-X64-LABEL: test_ui64_to_float:101; SDAG-X64: # %bb.0: # %entry102; SDAG-X64-NEXT: testq %rdi, %rdi103; SDAG-X64-NEXT: js .LBB4_1104; SDAG-X64-NEXT: # %bb.2: # %entry105; SDAG-X64-NEXT: cvtsi2ss %rdi, %xmm0106; SDAG-X64-NEXT: retq107; SDAG-X64-NEXT: .LBB4_1:108; SDAG-X64-NEXT: movq %rdi, %rax109; SDAG-X64-NEXT: shrq %rax110; SDAG-X64-NEXT: andl $1, %edi111; SDAG-X64-NEXT: orq %rax, %rdi112; SDAG-X64-NEXT: cvtsi2ss %rdi, %xmm0113; SDAG-X64-NEXT: addss %xmm0, %xmm0114; SDAG-X64-NEXT: retq115;116; GISEL-X64-LABEL: test_ui64_to_float:117; GISEL-X64: # %bb.0: # %entry118; GISEL-X64-NEXT: cvtsi2ss %rdi, %xmm0119; GISEL-X64-NEXT: movq %rdi, %rax120; GISEL-X64-NEXT: shrq %rax121; GISEL-X64-NEXT: movq %rdi, %rcx122; GISEL-X64-NEXT: andq $1, %rcx123; GISEL-X64-NEXT: orq %rax, %rcx124; GISEL-X64-NEXT: cvtsi2ss %rcx, %xmm1125; GISEL-X64-NEXT: addss %xmm1, %xmm1126; GISEL-X64-NEXT: xorl %eax, %eax127; GISEL-X64-NEXT: cmpq $0, %rdi128; GISEL-X64-NEXT: setl %al129; GISEL-X64-NEXT: andl $1, %eax130; GISEL-X64-NEXT: movd %xmm1, %eax131; GISEL-X64-NEXT: movd %xmm0, %ecx132; GISEL-X64-NEXT: cmovnel %eax, %ecx133; GISEL-X64-NEXT: movd %ecx, %xmm0134; GISEL-X64-NEXT: retq135;136; AVX512-LABEL: test_ui64_to_float:137; AVX512: # %bb.0: # %entry138; AVX512-NEXT: vcvtusi2ss %rdi, %xmm15, %xmm0139; AVX512-NEXT: retq140entry:141 %conv = uitofp i64 %x to float142 ret float %conv143}144 145define float @test_ui32_to_float(i32 %x) {146; X64-LABEL: test_ui32_to_float:147; X64: # %bb.0: # %entry148; X64-NEXT: movl %edi, %eax149; X64-NEXT: cvtsi2ss %rax, %xmm0150; X64-NEXT: retq151;152; AVX512-LABEL: test_ui32_to_float:153; AVX512: # %bb.0: # %entry154; AVX512-NEXT: vcvtusi2ss %edi, %xmm15, %xmm0155; AVX512-NEXT: retq156entry:157 %conv = uitofp i32 %x to float158 ret float %conv159}160 161define float @test_ui16_to_float(i16 zeroext %x) {162; X64-LABEL: test_ui16_to_float:163; X64: # %bb.0: # %entry164; X64-NEXT: cvtsi2ss %edi, %xmm0165; X64-NEXT: retq166;167; SDAG-AVX512-LABEL: test_ui16_to_float:168; SDAG-AVX512: # %bb.0: # %entry169; SDAG-AVX512-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0170; SDAG-AVX512-NEXT: retq171;172; GISEL-AVX512-LABEL: test_ui16_to_float:173; GISEL-AVX512: # %bb.0: # %entry174; GISEL-AVX512-NEXT: vcvtusi2ss %edi, %xmm15, %xmm0175; GISEL-AVX512-NEXT: retq176entry:177 %conv = uitofp i16 %x to float178 ret float %conv179}180 181define float @test_ui8_to_float(i8 zeroext %x) {182; X64-LABEL: test_ui8_to_float:183; X64: # %bb.0: # %entry184; X64-NEXT: cvtsi2ss %edi, %xmm0185; X64-NEXT: retq186;187; SDAG-AVX512-LABEL: test_ui8_to_float:188; SDAG-AVX512: # %bb.0: # %entry189; SDAG-AVX512-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0190; SDAG-AVX512-NEXT: retq191;192; GISEL-AVX512-LABEL: test_ui8_to_float:193; GISEL-AVX512: # %bb.0: # %entry194; GISEL-AVX512-NEXT: vcvtusi2ss %edi, %xmm15, %xmm0195; GISEL-AVX512-NEXT: retq196entry:197 %conv = uitofp i8 %x to float198 ret float %conv199}200 201define double @test_si64_to_double(i64 %x) {202; X64-LABEL: test_si64_to_double:203; X64: # %bb.0: # %entry204; X64-NEXT: cvtsi2sd %rdi, %xmm0205; X64-NEXT: retq206;207; AVX512-LABEL: test_si64_to_double:208; AVX512: # %bb.0: # %entry209; AVX512-NEXT: vcvtsi2sd %rdi, %xmm15, %xmm0210; AVX512-NEXT: retq211entry:212 %conv = sitofp i64 %x to double213 ret double %conv214}215 216define double @test_si32_to_double(i32 %x) {217; X64-LABEL: test_si32_to_double:218; X64: # %bb.0: # %entry219; X64-NEXT: cvtsi2sd %edi, %xmm0220; X64-NEXT: retq221;222; AVX512-LABEL: test_si32_to_double:223; AVX512: # %bb.0: # %entry224; AVX512-NEXT: vcvtsi2sd %edi, %xmm15, %xmm0225; AVX512-NEXT: retq226entry:227 %conv = sitofp i32 %x to double228 ret double %conv229}230 231define double @test_si16_to_double(i16 signext %x) {232; X64-LABEL: test_si16_to_double:233; X64: # %bb.0: # %entry234; X64-NEXT: cvtsi2sd %edi, %xmm0235; X64-NEXT: retq236;237; AVX512-LABEL: test_si16_to_double:238; AVX512: # %bb.0: # %entry239; AVX512-NEXT: vcvtsi2sd %edi, %xmm15, %xmm0240; AVX512-NEXT: retq241entry:242 %conv = sitofp i16 %x to double243 ret double %conv244}245 246define double @test_si8_to_double(i8 signext %x) {247; X64-LABEL: test_si8_to_double:248; X64: # %bb.0: # %entry249; X64-NEXT: cvtsi2sd %edi, %xmm0250; X64-NEXT: retq251;252; AVX512-LABEL: test_si8_to_double:253; AVX512: # %bb.0: # %entry254; AVX512-NEXT: vcvtsi2sd %edi, %xmm15, %xmm0255; AVX512-NEXT: retq256entry:257 %conv = sitofp i8 %x to double258 ret double %conv259}260 261define double @test_si31_to_double(i31 %x) {262; X64-LABEL: test_si31_to_double:263; X64: # %bb.0: # %entry264; X64-NEXT: addl %edi, %edi265; X64-NEXT: sarl %edi266; X64-NEXT: cvtsi2sd %edi, %xmm0267; X64-NEXT: retq268;269; AVX512-LABEL: test_si31_to_double:270; AVX512: # %bb.0: # %entry271; AVX512-NEXT: addl %edi, %edi272; AVX512-NEXT: sarl %edi273; AVX512-NEXT: vcvtsi2sd %edi, %xmm15, %xmm0274; AVX512-NEXT: retq275entry:276 %conv = sitofp i31 %x to double277 ret double %conv278}279 280define double @test_si33_to_double(i33 %x) {281; X64-LABEL: test_si33_to_double:282; X64: # %bb.0: # %entry283; X64-NEXT: shlq $31, %rdi284; X64-NEXT: sarq $31, %rdi285; X64-NEXT: cvtsi2sd %rdi, %xmm0286; X64-NEXT: retq287;288; AVX512-LABEL: test_si33_to_double:289; AVX512: # %bb.0: # %entry290; AVX512-NEXT: shlq $31, %rdi291; AVX512-NEXT: sarq $31, %rdi292; AVX512-NEXT: vcvtsi2sd %rdi, %xmm15, %xmm0293; AVX512-NEXT: retq294entry:295 %conv = sitofp i33 %x to double296 ret double %conv297}298 299define float @test_si64_to_float(i64 %x) {300; X64-LABEL: test_si64_to_float:301; X64: # %bb.0: # %entry302; X64-NEXT: cvtsi2ss %rdi, %xmm0303; X64-NEXT: retq304;305; AVX512-LABEL: test_si64_to_float:306; AVX512: # %bb.0: # %entry307; AVX512-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm0308; AVX512-NEXT: retq309entry:310 %conv = sitofp i64 %x to float311 ret float %conv312}313 314define float @test_si32_to_float(i32 %x) {315; X64-LABEL: test_si32_to_float:316; X64: # %bb.0: # %entry317; X64-NEXT: cvtsi2ss %edi, %xmm0318; X64-NEXT: retq319;320; AVX512-LABEL: test_si32_to_float:321; AVX512: # %bb.0: # %entry322; AVX512-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0323; AVX512-NEXT: retq324entry:325 %conv = sitofp i32 %x to float326 ret float %conv327}328 329define float @test_si16_to_float(i16 signext %x) {330; X64-LABEL: test_si16_to_float:331; X64: # %bb.0: # %entry332; X64-NEXT: cvtsi2ss %edi, %xmm0333; X64-NEXT: retq334;335; AVX512-LABEL: test_si16_to_float:336; AVX512: # %bb.0: # %entry337; AVX512-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0338; AVX512-NEXT: retq339entry:340 %conv = sitofp i16 %x to float341 ret float %conv342}343 344define float @test_si8_to_float(i8 signext %x) {345; X64-LABEL: test_si8_to_float:346; X64: # %bb.0: # %entry347; X64-NEXT: cvtsi2ss %edi, %xmm0348; X64-NEXT: retq349;350; AVX512-LABEL: test_si8_to_float:351; AVX512: # %bb.0: # %entry352; AVX512-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0353; AVX512-NEXT: retq354entry:355 %conv = sitofp i8 %x to float356 ret float %conv357}358 359define float @test_si31_to_float(i31 %x) {360; X64-LABEL: test_si31_to_float:361; X64: # %bb.0: # %entry362; X64-NEXT: addl %edi, %edi363; X64-NEXT: sarl %edi364; X64-NEXT: cvtsi2ss %edi, %xmm0365; X64-NEXT: retq366;367; AVX512-LABEL: test_si31_to_float:368; AVX512: # %bb.0: # %entry369; AVX512-NEXT: addl %edi, %edi370; AVX512-NEXT: sarl %edi371; AVX512-NEXT: vcvtsi2ss %edi, %xmm15, %xmm0372; AVX512-NEXT: retq373entry:374 %conv = sitofp i31 %x to float375 ret float %conv376}377 378define float @test_si33_to_float(i33 %x) {379; X64-LABEL: test_si33_to_float:380; X64: # %bb.0: # %entry381; X64-NEXT: shlq $31, %rdi382; X64-NEXT: sarq $31, %rdi383; X64-NEXT: cvtsi2ss %rdi, %xmm0384; X64-NEXT: retq385;386; AVX512-LABEL: test_si33_to_float:387; AVX512: # %bb.0: # %entry388; AVX512-NEXT: shlq $31, %rdi389; AVX512-NEXT: sarq $31, %rdi390; AVX512-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm0391; AVX512-NEXT: retq392entry:393 %conv = sitofp i33 %x to float394 ret float %conv395}396