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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X644 5define void @knownbits_zext_in_reg(ptr) nounwind {6; X86-LABEL: knownbits_zext_in_reg:7; X86: # %bb.0: # %BB8; X86-NEXT: pushl %ebx9; X86-NEXT: movl {{[0-9]+}}(%esp), %eax10; X86-NEXT: movzbl (%eax), %ecx11; X86-NEXT: imull $101, %ecx, %eax12; X86-NEXT: shrl $14, %eax13; X86-NEXT: imull $177, %ecx, %edx14; X86-NEXT: shrl $14, %edx15; X86-NEXT: movzbl %al, %ecx16; X86-NEXT: xorl %ebx, %ebx17; X86-NEXT: .p2align 418; X86-NEXT: .LBB0_1: # %CF19; X86-NEXT: # =>This Loop Header: Depth=120; X86-NEXT: # Child Loop BB0_2 Depth 221; X86-NEXT: movl %ecx, %eax22; X86-NEXT: divb %dl23; X86-NEXT: .p2align 424; X86-NEXT: .LBB0_2: # %CF23725; X86-NEXT: # Parent Loop BB0_1 Depth=126; X86-NEXT: # => This Inner Loop Header: Depth=227; X86-NEXT: testb %bl, %bl28; X86-NEXT: jne .LBB0_229; X86-NEXT: jmp .LBB0_130;31; X64-LABEL: knownbits_zext_in_reg:32; X64: # %bb.0: # %BB33; X64-NEXT: movzbl (%rdi), %eax34; X64-NEXT: imull $101, %eax, %ecx35; X64-NEXT: shrl $14, %ecx36; X64-NEXT: imull $177, %eax, %edx37; X64-NEXT: shrl $14, %edx38; X64-NEXT: movzbl %cl, %ecx39; X64-NEXT: xorl %esi, %esi40; X64-NEXT: .p2align 441; X64-NEXT: .LBB0_1: # %CF42; X64-NEXT: # =>This Loop Header: Depth=143; X64-NEXT: # Child Loop BB0_2 Depth 244; X64-NEXT: movl %ecx, %eax45; X64-NEXT: divb %dl46; X64-NEXT: .p2align 447; X64-NEXT: .LBB0_2: # %CF23748; X64-NEXT: # Parent Loop BB0_1 Depth=149; X64-NEXT: # => This Inner Loop Header: Depth=250; X64-NEXT: testb %sil, %sil51; X64-NEXT: jne .LBB0_252; X64-NEXT: jmp .LBB0_153BB:54 %L5 = load i8, ptr %055 %Sl9 = select i1 true, i8 %L5, i8 undef56 %B21 = udiv i8 %Sl9, -9357 %B22 = udiv i8 %Sl9, 9358 br label %CF59 60CF: ; preds = %CF246, %BB61 %I40 = insertelement <4 x i8> zeroinitializer, i8 %B21, i32 162 %I41 = insertelement <4 x i8> zeroinitializer, i8 %B22, i32 163 %B41 = srem <4 x i8> %I40, %I4164 br label %CF23765 66CF237: ; preds = %CF237, %CF67 %Cmp73 = icmp ne i1 undef, undef68 br i1 %Cmp73, label %CF237, label %CF24669 70CF246: ; preds = %CF23771 %Cmp117 = icmp ult <4 x i8> %B41, undef72 %E156 = extractelement <4 x i1> %Cmp117, i32 273 br label %CF74}75 76define i32 @knownbits_mask_add_lshr(i32 %a0, i32 %a1) nounwind {77; CHECK-LABEL: knownbits_mask_add_lshr:78; CHECK: # %bb.0:79; CHECK-NEXT: xorl %eax, %eax80; CHECK-NEXT: ret{{[l|q]}}81 %1 = and i32 %a0, 3276782 %2 = and i32 %a1, 3276683 %3 = add i32 %1, %284 %4 = lshr i32 %3, 1785 ret i32 %486}87 88define i128 @knownbits_mask_addc_shl(i64 %a0, i64 %a1, i64 %a2) nounwind {89; X86-LABEL: knownbits_mask_addc_shl:90; X86: # %bb.0:91; X86-NEXT: pushl %edi92; X86-NEXT: pushl %esi93; X86-NEXT: movl {{[0-9]+}}(%esp), %eax94; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx95; X86-NEXT: movl {{[0-9]+}}(%esp), %edx96; X86-NEXT: movl $-1024, %esi # imm = 0xFC0097; X86-NEXT: movl {{[0-9]+}}(%esp), %edi98; X86-NEXT: andl %esi, %edi99; X86-NEXT: andl {{[0-9]+}}(%esp), %esi100; X86-NEXT: addl %edi, %esi101; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx102; X86-NEXT: adcl $0, %ecx103; X86-NEXT: shldl $22, %edx, %ecx104; X86-NEXT: shldl $22, %esi, %edx105; X86-NEXT: movl %edx, 8(%eax)106; X86-NEXT: movl %ecx, 12(%eax)107; X86-NEXT: movl $0, 4(%eax)108; X86-NEXT: movl $0, (%eax)109; X86-NEXT: popl %esi110; X86-NEXT: popl %edi111; X86-NEXT: retl $4112;113; X64-LABEL: knownbits_mask_addc_shl:114; X64: # %bb.0:115; X64-NEXT: andq $-1024, %rdi # imm = 0xFC00116; X64-NEXT: andq $-1024, %rsi # imm = 0xFC00117; X64-NEXT: addq %rdi, %rsi118; X64-NEXT: adcl $0, %edx119; X64-NEXT: shldq $54, %rsi, %rdx120; X64-NEXT: xorl %eax, %eax121; X64-NEXT: retq122 %1 = and i64 %a0, -1024123 %2 = zext i64 %1 to i128124 %3 = and i64 %a1, -1024125 %4 = zext i64 %3 to i128126 %5 = add i128 %2, %4127 %6 = zext i64 %a2 to i128128 %7 = shl i128 %6, 64129 %8 = add i128 %5, %7130 %9 = shl i128 %8, 54131 ret i128 %9132}133 134define {i32, i1} @knownbits_uaddo_saddo(i64 %a0, i64 %a1) nounwind {135; X86-LABEL: knownbits_uaddo_saddo:136; X86: # %bb.0:137; X86-NEXT: movl {{[0-9]+}}(%esp), %eax138; X86-NEXT: addl {{[0-9]+}}(%esp), %eax139; X86-NEXT: setb %al140; X86-NEXT: seto %dl141; X86-NEXT: orb %al, %dl142; X86-NEXT: xorl %eax, %eax143; X86-NEXT: retl144;145; X64-LABEL: knownbits_uaddo_saddo:146; X64: # %bb.0:147; X64-NEXT: shlq $32, %rdi148; X64-NEXT: shlq $32, %rsi149; X64-NEXT: addq %rdi, %rsi150; X64-NEXT: setb %al151; X64-NEXT: seto %dl152; X64-NEXT: orb %al, %dl153; X64-NEXT: xorl %eax, %eax154; X64-NEXT: retq155 %1 = shl i64 %a0, 32156 %2 = shl i64 %a1, 32157 %u = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %1, i64 %2)158 %uval = extractvalue {i64, i1} %u, 0159 %uovf = extractvalue {i64, i1} %u, 1160 %s = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %1, i64 %2)161 %sval = extractvalue {i64, i1} %s, 0162 %sovf = extractvalue {i64, i1} %s, 1163 %sum = add i64 %uval, %sval164 %3 = trunc i64 %sum to i32165 %4 = or i1 %uovf, %sovf166 %ret0 = insertvalue {i32, i1} undef, i32 %3, 0167 %ret1 = insertvalue {i32, i1} %ret0, i1 %4, 1168 ret {i32, i1} %ret1169}170 171define {i32, i1} @knownbits_usubo_ssubo(i64 %a0, i64 %a1) nounwind {172; X86-LABEL: knownbits_usubo_ssubo:173; X86: # %bb.0:174; X86-NEXT: movl {{[0-9]+}}(%esp), %eax175; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax176; X86-NEXT: setb %al177; X86-NEXT: seto %dl178; X86-NEXT: orb %al, %dl179; X86-NEXT: xorl %eax, %eax180; X86-NEXT: retl181;182; X64-LABEL: knownbits_usubo_ssubo:183; X64: # %bb.0:184; X64-NEXT: shlq $32, %rdi185; X64-NEXT: shlq $32, %rsi186; X64-NEXT: cmpq %rsi, %rdi187; X64-NEXT: setb %al188; X64-NEXT: seto %dl189; X64-NEXT: orb %al, %dl190; X64-NEXT: xorl %eax, %eax191; X64-NEXT: retq192 %1 = shl i64 %a0, 32193 %2 = shl i64 %a1, 32194 %u = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %1, i64 %2)195 %uval = extractvalue {i64, i1} %u, 0196 %uovf = extractvalue {i64, i1} %u, 1197 %s = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %1, i64 %2)198 %sval = extractvalue {i64, i1} %s, 0199 %sovf = extractvalue {i64, i1} %s, 1200 %sum = add i64 %uval, %sval201 %3 = trunc i64 %sum to i32202 %4 = or i1 %uovf, %sovf203 %ret0 = insertvalue {i32, i1} undef, i32 %3, 0204 %ret1 = insertvalue {i32, i1} %ret0, i1 %4, 1205 ret {i32, i1} %ret1206}207 208declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone209declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone210declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone211declare {i64, i1} @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone212 213define i32 @knownbits_fshl(i32 %a0) nounwind {214; CHECK-LABEL: knownbits_fshl:215; CHECK: # %bb.0:216; CHECK-NEXT: movl $3, %eax217; CHECK-NEXT: ret{{[l|q]}}218 %1 = tail call i32 @llvm.fshl.i32(i32 %a0, i32 -1, i32 5)219 %2 = and i32 %1, 3220 ret i32 %2221}222 223define i32 @knownbits_fshr(i32 %a0) nounwind {224; CHECK-LABEL: knownbits_fshr:225; CHECK: # %bb.0:226; CHECK-NEXT: movl $3, %eax227; CHECK-NEXT: ret{{[l|q]}}228 %1 = tail call i32 @llvm.fshr.i32(i32 %a0, i32 -1, i32 5)229 %2 = and i32 %1, 3230 ret i32 %2231}232 233declare i32 @llvm.fshl.i32(i32, i32, i32) nounwind readnone234declare i32 @llvm.fshr.i32(i32, i32, i32) nounwind readnone235