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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s3 4define <4 x i32> @hadd_select_v4i32(<4 x i32> %x, <4 x i32> %y) {5; CHECK-LABEL: hadd_select_v4i32:6; CHECK: # %bb.0: # %entry7; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm2 = [3,3,3,3]8; CHECK-NEXT: vpand %xmm2, %xmm0, %xmm09; CHECK-NEXT: vpand %xmm2, %xmm1, %xmm110; CHECK-NEXT: vphaddd %xmm1, %xmm0, %xmm011; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [9,9,9,9]12; CHECK-NEXT: vpmaxud %xmm1, %xmm0, %xmm113; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm114; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm015; CHECK-NEXT: retq16entry:17 %and1 = and <4 x i32> %x, <i32 3, i32 3, i32 3, i32 3>18 %and2 = and <4 x i32> %y, <i32 3, i32 3, i32 3, i32 3>19 %hadd = tail call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %and1, <4 x i32> %and2)20 %cond = icmp ule <4 x i32> %hadd, <i32 8, i32 8, i32 8, i32 8>21 %ret = select <4 x i1> %cond, <4 x i32> zeroinitializer, <4 x i32> %hadd22 ret <4 x i32> %ret23}24 25define <8 x i8> @hadd_trunc_v8i16(<8 x i16> %x, <8 x i16> %y) {26; CHECK-LABEL: hadd_trunc_v8i16:27; CHECK: # %bb.0: # %entry28; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm2 = [3,3,3,3,3,3,3,3]29; CHECK-NEXT: vpand %xmm2, %xmm0, %xmm030; CHECK-NEXT: vpand %xmm2, %xmm1, %xmm131; CHECK-NEXT: vphaddw %xmm1, %xmm0, %xmm032; CHECK-NEXT: vpackuswb %xmm0, %xmm0, %xmm033; CHECK-NEXT: retq34entry:35 %and1 = and <8 x i16> %x, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>36 %and2 = and <8 x i16> %y, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>37 %hadd = tail call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %and1, <8 x i16> %and2)38 %conv = trunc <8 x i16> %hadd to <8 x i8>39 ret <8 x i8> %conv40}41 42define <8 x i16> @hadd_trunc_v8i32(<8 x i32> %x, <8 x i32> %y) {43; CHECK-LABEL: hadd_trunc_v8i32:44; CHECK: # %bb.0: # %entry45; CHECK-NEXT: vpbroadcastd {{.*#+}} ymm2 = [3,3,3,3,3,3,3,3]46; CHECK-NEXT: vpand %ymm2, %ymm0, %ymm047; CHECK-NEXT: vpand %ymm2, %ymm1, %ymm148; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm049; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm150; CHECK-NEXT: vpackusdw %xmm1, %xmm0, %xmm051; CHECK-NEXT: vzeroupper52; CHECK-NEXT: retq53entry:54 %and1 = and <8 x i32> %x, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>55 %and2 = and <8 x i32> %y, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>56 %hadd = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %and1, <8 x i32> %and2)57 %conv = trunc <8 x i32> %hadd to <8 x i16>58 ret <8 x i16> %conv59}60 61define <16 x i8> @hadd_trunc_v16i16(<16 x i16> %x, <16 x i16> %y) {62; CHECK-LABEL: hadd_trunc_v16i16:63; CHECK: # %bb.0: # %entry64; CHECK-NEXT: vpbroadcastw {{.*#+}} ymm2 = [3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3]65; CHECK-NEXT: vpand %ymm2, %ymm0, %ymm066; CHECK-NEXT: vpand %ymm2, %ymm1, %ymm167; CHECK-NEXT: vphaddw %ymm1, %ymm0, %ymm068; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm169; CHECK-NEXT: vpackuswb %xmm1, %xmm0, %xmm070; CHECK-NEXT: vzeroupper71; CHECK-NEXT: retq72entry:73 %and1 = and <16 x i16> %x, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>74 %and2 = and <16 x i16> %y, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>75 %hadd = tail call <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16> %and1, <16 x i16> %and2)76 %conv = trunc <16 x i16> %hadd to <16 x i8>77 ret <16 x i8> %conv78}79 80define <4 x i32> @hsub_select_shl_v4i32(<4 x i32> %x, <4 x i32> %y) {81; CHECK-LABEL: hsub_select_shl_v4i32:82; CHECK: # %bb.0:83; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm2 = [65535,65535,65535,65535]84; CHECK-NEXT: vpor %xmm2, %xmm0, %xmm085; CHECK-NEXT: vpor %xmm2, %xmm1, %xmm186; CHECK-NEXT: vphsubd %xmm1, %xmm0, %xmm087; CHECK-NEXT: vpslld $16, %xmm0, %xmm188; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm2 = [9,9,9,9]89; CHECK-NEXT: vpmaxud %xmm2, %xmm1, %xmm290; CHECK-NEXT: vpcmpeqd %xmm2, %xmm1, %xmm191; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm092; CHECK-NEXT: retq93 %or1 = or <4 x i32> %x, <i32 65535, i32 65535, i32 65535, i32 65535>94 %or2 = or <4 x i32> %y, <i32 65535, i32 65535, i32 65535, i32 65535>95 %hsub = tail call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %or1, <4 x i32> %or2)96 %shl = shl <4 x i32> %hsub, <i32 16, i32 16, i32 16, i32 16>97 %cond = icmp ule <4 x i32> %shl, <i32 8, i32 8, i32 8, i32 8>98 %ret = select <4 x i1> %cond, <4 x i32> zeroinitializer, <4 x i32> %hsub99 ret <4 x i32> %ret100}101 102define <8 x i8> @hsub_trunc_v8i16(<8 x i16> %x, <8 x i16> %y) {103; CHECK-LABEL: hsub_trunc_v8i16:104; CHECK: # %bb.0: # %entry105; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0106; CHECK-NEXT: retq107entry:108 %or1 = or <8 x i16> %x, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>109 %or2 = or <8 x i16> %y, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>110 %hsub = tail call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %or1, <8 x i16> %or2)111 %conv = trunc <8 x i16> %hsub to <8 x i8>112 ret <8 x i8> %conv113}114 115define <8 x i16> @hsub_trunc_v8i32(<8 x i32> %x, <8 x i32> %y) {116; CHECK-LABEL: hsub_trunc_v8i32:117; CHECK: # %bb.0: # %entry118; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0119; CHECK-NEXT: retq120entry:121 %or1 = or <8 x i32> %x, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>122 %or2 = or <8 x i32> %y, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>123 %hsub = tail call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %or1, <8 x i32> %or2)124 %conv = trunc <8 x i32> %hsub to <8 x i16>125 ret <8 x i16> %conv126}127 128define <16 x i8> @hsub_trunc_v16i16(<16 x i16> %x, <16 x i16> %y) {129; CHECK-LABEL: hsub_trunc_v16i16:130; CHECK: # %bb.0: # %entry131; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0132; CHECK-NEXT: retq133entry:134 %or1 = or <16 x i16> %x, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>135 %or2 = or <16 x i16> %y, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>136 %hsub = tail call <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16> %or1, <16 x i16> %or2)137 %conv = trunc <16 x i16> %hsub to <16 x i8>138 ret <16 x i8> %conv139}140 141define <8 x i16> @hadd_extract_2st_trunc_v8i32(<8 x i32> %x, <8 x i32> %y) {142; CHECK-LABEL: hadd_extract_2st_trunc_v8i32:143; CHECK: # %bb.0: # %entry144; CHECK-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0145; CHECK-NEXT: vphaddd %xmm0, %xmm0, %xmm0146; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,xmm0[4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero147; CHECK-NEXT: vzeroupper148; CHECK-NEXT: retq149entry:150 %and1 = and <8 x i32> %x, <i32 -1, i32 -1, i32 3, i32 3, i32 -1, i32 -1, i32 -1, i32 -1>151 %and2 = and <8 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>152 %hadd = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %and1, <8 x i32> %and2)153 %andr = and <8 x i32> %hadd, <i32 0, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>154 %conv = trunc <8 x i32> %andr to <8 x i16>155 ret <8 x i16> %conv156}157 158define <8 x i16> @hadd_extract_8th_trunc_v8i32(<8 x i32> %x, <8 x i32> %y) {159; CHECK-LABEL: hadd_extract_8th_trunc_v8i32:160; CHECK: # %bb.0: # %entry161; CHECK-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1162; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0163; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]164; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]165; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1166; CHECK-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5,6],xmm0[7]167; CHECK-NEXT: vzeroupper168; CHECK-NEXT: retq169entry:170 %and1 = and <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>171 %and2 = and <8 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 3, i32 3>172 %hadd = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %and1, <8 x i32> %and2)173 %andr = and <8 x i32> %hadd, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1>174 %conv = trunc <8 x i32> %andr to <8 x i16>175 ret <8 x i16> %conv176}177 178define <8 x i16> @hadd_extract_2st_trunc_redundant_and_v4i32(<8 x i32> %x, <8 x i32> %y) {179; CHECK-LABEL: hadd_extract_2st_trunc_redundant_and_v4i32:180; CHECK: # %bb.0: # %entry181; CHECK-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0182; CHECK-NEXT: vphaddd %xmm0, %xmm0, %xmm0183; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,xmm0[4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero184; CHECK-NEXT: vzeroupper185; CHECK-NEXT: retq186entry:187 %and1 = and <8 x i32> %x, <i32 3, i32 3, i32 -1, i32 -1, i32 3, i32 3, i32 3, i32 3>188 %and2 = and <8 x i32> %y, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>189 %hadd = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %and1, <8 x i32> %and2)190 %andr = and <8 x i32> %hadd, <i32 0, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>191 %conv = trunc <8 x i32> %andr to <8 x i16>192 ret <8 x i16> %conv193}194 195define <8 x i16> @hadd_extract_4th_trunc_redundant_and_v4i32(<8 x i32> %x, <8 x i32> %y) {196; CHECK-LABEL: hadd_extract_4th_trunc_redundant_and_v4i32:197; CHECK: # %bb.0: # %entry198; CHECK-NEXT: vpbroadcastd {{.*#+}} ymm2 = [3,3,3,3,3,3,3,3]199; CHECK-NEXT: vpand %ymm2, %ymm0, %ymm0200; CHECK-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1201; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0202; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]203; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]204; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1205; CHECK-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5,6],xmm0[7]206; CHECK-NEXT: vzeroupper207; CHECK-NEXT: retq208entry:209 %and1 = and <8 x i32> %x, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>210 %and2 = and <8 x i32> %y, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 -1, i32 -1>211 %hadd = tail call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %and1, <8 x i32> %and2)212 %andr = and <8 x i32> %hadd, <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1>213 %conv = trunc <8 x i32> %andr to <8 x i16>214 ret <8 x i16> %conv215}216