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1; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s2 3; PR265754; Assertion `(Disp->isImm() || Disp->isGlobal()) && (Other.Disp->isImm() || Other.Disp->isGlobal()) && "Address displacement operand is always an immediate or a global"' failed.5 6target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"7target triple = "i686-pc-windows-msvc"8 9declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i1) argmemonly nounwind10declare <2 x i64> @_mm_xor_si128(<2 x i64>, <2 x i64>) optsize11declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone12declare <4 x float> @_mm_castsi128_ps(<2 x i64>) optsize13 14; Check that the LEA optimization pass works with CPI address displacements.15define void @test1(ptr nocapture readonly %src, i32 %len) #0 {16  %parts = alloca [4 x i32], align 417  call void @llvm.memcpy.p0.p0.i32(ptr %parts, ptr %src, i32 %len, i1 false)18  %call0 = tail call <2 x i64> @_mm_xor_si128(<2 x i64> undef, <2 x i64> <i64 -9187201950435737472, i64 -9187201950435737472>)19  %tmp0 = tail call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> undef, <2 x i64> <i64 7631803798, i64 5708721108>, i8 16)20  %call1 = tail call <4 x float> @_mm_castsi128_ps(<2 x i64> %tmp0)21  ret void22; CHECK-LABEL: test1:23; CHECK:	movl %esp,24; CHECK:	calll _memcpy25; CHECK:	movaps __xmm@{{[0-9a-f]+}}, %xmm126; CHECK:	calll __mm_xor_si12827; CHECK:	pclmulqdq $16, __xmm@{{[0-9a-f]+}}, %xmm028; CHECK:	jmp __mm_castsi128_ps29}30 31declare i32 @GetLastError(...)32declare void @IsolationAwareDeactivateActCtx(i32, i32)33declare ptr @llvm.localaddress()34declare void @llvm.localescape(...)35declare ptr @llvm.localrecover(ptr, ptr, i32)36 37@IsolationAwarePrivateT_SqbjaYRiRY = common global i32 0, align 438 39; Check that the MCSymbol objects are created to be used in "\01?fin$0@0@test2@@".40define void @test2() #0 {41entry:42  %fActivateActCtxSuccess = alloca i32, align 443  %proc = alloca i32, align 444  %ulpCookie = alloca i32, align 445  call void (...) @llvm.localescape(ptr nonnull %fActivateActCtxSuccess, ptr nonnull %proc, ptr nonnull %ulpCookie)46  %tmp0 = tail call ptr @llvm.localaddress()47  call fastcc void @"\01?fin$0@0@test2@@"(ptr %tmp0)48  ret void49; CHECK-LABEL: test2:50; CHECK:	Ltest2$frame_escape_0 = 851; CHECK:	Ltest2$frame_escape_1 = 452; CHECK:	Ltest2$frame_escape_2 = 053; CHECK:	calll "?fin$0@0@test2@@"54}55 56; Check that the LEA optimization pass works with MCSymbol address displacements.57define internal fastcc void @"\01?fin$0@0@test2@@"(ptr readonly %frame_pointer) unnamed_addr noinline nounwind optsize {58entry:59  %tmp0 = tail call ptr @llvm.localrecover(ptr @test2, ptr %frame_pointer, i32 1)60  %tmp1 = tail call ptr @llvm.localrecover(ptr @test2, ptr %frame_pointer, i32 2)61  %tmp2 = load i32, ptr @IsolationAwarePrivateT_SqbjaYRiRY, align 462  %tobool = icmp eq i32 %tmp2, 063  br i1 %tobool, label %if.end, label %land.lhs.true64 65land.lhs.true:66  %tmp3 = tail call ptr @llvm.localrecover(ptr @test2, ptr %frame_pointer, i32 0)67  %tmp4 = load i32, ptr %tmp3, align 468  %tobool1 = icmp eq i32 %tmp4, 069  br i1 %tobool1, label %if.end, label %if.then70 71if.then:72  %tmp5 = load i32, ptr %tmp0, align 473  %tobool2 = icmp eq i32 %tmp5, 074  br i1 %tobool2, label %cond.end, label %cond.true75 76cond.true:77  %call = tail call i32 @GetLastError()78  br label %cond.end79 80cond.end:81  %tmp6 = load i32, ptr %tmp1, align 482  tail call void @IsolationAwareDeactivateActCtx(i32 0, i32 %tmp6)83  br label %if.end84 85if.end:86  ret void87; CHECK-LABEL: "?fin$0@0@test2@@":88; CHECK:	cmpl $0, Ltest2$frame_escape_0([[REG1:%[a-z]+]])89; CHECK:	leal Ltest2$frame_escape_1([[REG1]]), [[REG2:%[a-z]+]]90; CHECK:	leal Ltest2$frame_escape_2([[REG1]]), [[REG3:%[a-z]+]]91; CHECK:	cmpl $0, ([[REG2]])92; CHECK:	pushl ([[REG3]])93}94 95attributes #0 = { nounwind optsize "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" "use-soft-float"="false" }96