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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s3 4; This testcase was written to demonstrate an instruction-selection problem,5; however it also happens to expose a limitation in the DAGCombiner's6; expression reassociation which causes it to miss opportunities for7; constant folding due to the intermediate adds having multiple uses.8; The Reassociate pass has similar limitations. If these limitations are9; fixed, the test commands above will need to be updated to expect fewer10; lea instructions.11 12@g0 = weak dso_local global [1000 x i32] zeroinitializer, align 32 ; <ptr> [#uses=8]13@g1 = weak dso_local global [1000 x i32] zeroinitializer, align 32 ; <ptr> [#uses=7]14 15define dso_local void @foo() {16; CHECK-LABEL: foo:17; CHECK: # %bb.0: # %entry18; CHECK-NEXT: movl g0(%rip), %eax19; CHECK-NEXT: movl g1(%rip), %ecx20; CHECK-NEXT: leal (%rax,%rcx), %edx21; CHECK-NEXT: leal 1(%rax,%rcx), %eax22; CHECK-NEXT: movl %eax, g0+4(%rip)23; CHECK-NEXT: movl g1+4(%rip), %eax24; CHECK-NEXT: leal 1(%rax,%rdx), %ecx25; CHECK-NEXT: leal 2(%rax,%rdx), %eax26; CHECK-NEXT: movl %eax, g0+8(%rip)27; CHECK-NEXT: movl g1+8(%rip), %eax28; CHECK-NEXT: leal 1(%rax,%rcx), %edx29; CHECK-NEXT: leal 2(%rax,%rcx), %eax30; CHECK-NEXT: movl %eax, g0+12(%rip)31; CHECK-NEXT: movl g1+12(%rip), %eax32; CHECK-NEXT: leal 1(%rax,%rdx), %ecx33; CHECK-NEXT: leal 2(%rax,%rdx), %eax34; CHECK-NEXT: movl %eax, g0+16(%rip)35; CHECK-NEXT: movl g1+16(%rip), %eax36; CHECK-NEXT: leal 1(%rax,%rcx), %edx37; CHECK-NEXT: leal 2(%rax,%rcx), %eax38; CHECK-NEXT: movl %eax, g0+20(%rip)39; CHECK-NEXT: movl g1+20(%rip), %eax40; CHECK-NEXT: leal 1(%rax,%rdx), %ecx41; CHECK-NEXT: leal 2(%rax,%rdx), %eax42; CHECK-NEXT: movl %eax, g0+24(%rip)43; CHECK-NEXT: movl g1+24(%rip), %eax44; CHECK-NEXT: leal 2(%rax,%rcx), %eax45; CHECK-NEXT: movl %eax, g0+28(%rip)46; CHECK-NEXT: retq47entry:48 %tmp4 = load i32, ptr @g0 ; <i32> [#uses=1]49 %tmp8 = load i32, ptr @g1 ; <i32> [#uses=1]50 %tmp9 = add i32 %tmp4, 1 ; <i32> [#uses=1]51 %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=2]52 store i32 %tmp10, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 1)53 %tmp8.1 = load i32, ptr getelementptr ([1000 x i32], ptr @g1, i32 0, i32 1) ; <i32> [#uses=1]54 %tmp9.1 = add i32 %tmp10, 1 ; <i32> [#uses=1]55 %tmp10.1 = add i32 %tmp9.1, %tmp8.1 ; <i32> [#uses=2]56 store i32 %tmp10.1, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 2)57 %tmp8.2 = load i32, ptr getelementptr ([1000 x i32], ptr @g1, i32 0, i32 2) ; <i32> [#uses=1]58 %tmp9.2 = add i32 %tmp10.1, 1 ; <i32> [#uses=1]59 %tmp10.2 = add i32 %tmp9.2, %tmp8.2 ; <i32> [#uses=2]60 store i32 %tmp10.2, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 3)61 %tmp8.3 = load i32, ptr getelementptr ([1000 x i32], ptr @g1, i32 0, i32 3) ; <i32> [#uses=1]62 %tmp9.3 = add i32 %tmp10.2, 1 ; <i32> [#uses=1]63 %tmp10.3 = add i32 %tmp9.3, %tmp8.3 ; <i32> [#uses=2]64 store i32 %tmp10.3, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 4)65 %tmp8.4 = load i32, ptr getelementptr ([1000 x i32], ptr @g1, i32 0, i32 4) ; <i32> [#uses=1]66 %tmp9.4 = add i32 %tmp10.3, 1 ; <i32> [#uses=1]67 %tmp10.4 = add i32 %tmp9.4, %tmp8.4 ; <i32> [#uses=2]68 store i32 %tmp10.4, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 5)69 %tmp8.5 = load i32, ptr getelementptr ([1000 x i32], ptr @g1, i32 0, i32 5) ; <i32> [#uses=1]70 %tmp9.5 = add i32 %tmp10.4, 1 ; <i32> [#uses=1]71 %tmp10.5 = add i32 %tmp9.5, %tmp8.5 ; <i32> [#uses=2]72 store i32 %tmp10.5, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 6)73 %tmp8.6 = load i32, ptr getelementptr ([1000 x i32], ptr @g1, i32 0, i32 6) ; <i32> [#uses=1]74 %tmp9.6 = add i32 %tmp10.5, 1 ; <i32> [#uses=1]75 %tmp10.6 = add i32 %tmp9.6, %tmp8.6 ; <i32> [#uses=1]76 store i32 %tmp10.6, ptr getelementptr ([1000 x i32], ptr @g0, i32 0, i32 7)77 ret void78}79