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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s3 4define i64 @test1(i32 %xx, i32 %test) nounwind {5; CHECK-LABEL: test1:6; CHECK: # %bb.0:7; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx8; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx9; CHECK-NEXT: andb $7, %cl10; CHECK-NEXT: movl %edx, %eax11; CHECK-NEXT: shll %cl, %eax12; CHECK-NEXT: shrl %edx13; CHECK-NEXT: notb %cl14; CHECK-NEXT: shrl %cl, %edx15; CHECK-NEXT: retl16 %conv = zext i32 %xx to i6417 %and = and i32 %test, 718 %sh_prom = zext i32 %and to i6419 %shl = shl i64 %conv, %sh_prom20 ret i64 %shl21}22 23define i64 @test2(i64 %xx, i32 %test) nounwind {24; CHECK-LABEL: test2:25; CHECK: # %bb.0:26; CHECK-NEXT: pushl %esi27; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi28; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx29; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx30; CHECK-NEXT: andb $7, %cl31; CHECK-NEXT: movl %esi, %eax32; CHECK-NEXT: shll %cl, %eax33; CHECK-NEXT: shldl %cl, %esi, %edx34; CHECK-NEXT: popl %esi35; CHECK-NEXT: retl36 %and = and i32 %test, 737 %sh_prom = zext i32 %and to i6438 %shl = shl i64 %xx, %sh_prom39 ret i64 %shl40}41 42define i64 @test3(i64 %xx, i32 %test) nounwind {43; CHECK-LABEL: test3:44; CHECK: # %bb.0:45; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax46; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx47; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx48; CHECK-NEXT: andb $7, %cl49; CHECK-NEXT: shrdl %cl, %edx, %eax50; CHECK-NEXT: shrl %cl, %edx51; CHECK-NEXT: retl52 %and = and i32 %test, 753 %sh_prom = zext i32 %and to i6454 %shr = lshr i64 %xx, %sh_prom55 ret i64 %shr56}57 58define i64 @test4(i64 %xx, i32 %test) nounwind {59; CHECK-LABEL: test4:60; CHECK: # %bb.0:61; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax62; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx63; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx64; CHECK-NEXT: andb $7, %cl65; CHECK-NEXT: shrdl %cl, %edx, %eax66; CHECK-NEXT: sarl %cl, %edx67; CHECK-NEXT: retl68 %and = and i32 %test, 769 %sh_prom = zext i32 %and to i6470 %shr = ashr i64 %xx, %sh_prom71 ret i64 %shr72}73 74; PR1466875define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) {76; CHECK-LABEL: test5:77; CHECK: # %bb.0:78; CHECK-NEXT: pushl %ebp79; CHECK-NEXT: .cfi_def_cfa_offset 880; CHECK-NEXT: pushl %ebx81; CHECK-NEXT: .cfi_def_cfa_offset 1282; CHECK-NEXT: pushl %edi83; CHECK-NEXT: .cfi_def_cfa_offset 1684; CHECK-NEXT: pushl %esi85; CHECK-NEXT: .cfi_def_cfa_offset 2086; CHECK-NEXT: .cfi_offset %esi, -2087; CHECK-NEXT: .cfi_offset %edi, -1688; CHECK-NEXT: .cfi_offset %ebx, -1289; CHECK-NEXT: .cfi_offset %ebp, -890; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax91; CHECK-NEXT: movb {{[0-9]+}}(%esp), %ch92; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx93; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl94; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebx95; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi96; CHECK-NEXT: movl %ebx, %edi97; CHECK-NEXT: shll %cl, %edi98; CHECK-NEXT: shldl %cl, %ebx, %esi99; CHECK-NEXT: testb $32, %cl100; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp101; CHECK-NEXT: je .LBB4_2102; CHECK-NEXT: # %bb.1:103; CHECK-NEXT: movl %edi, %esi104; CHECK-NEXT: xorl %edi, %edi105; CHECK-NEXT: .LBB4_2:106; CHECK-NEXT: movl %edx, %ebx107; CHECK-NEXT: movb %ch, %cl108; CHECK-NEXT: shll %cl, %ebx109; CHECK-NEXT: shldl %cl, %edx, %ebp110; CHECK-NEXT: testb $32, %ch111; CHECK-NEXT: je .LBB4_4112; CHECK-NEXT: # %bb.3:113; CHECK-NEXT: movl %ebx, %ebp114; CHECK-NEXT: xorl %ebx, %ebx115; CHECK-NEXT: .LBB4_4:116; CHECK-NEXT: movl %ebp, 12(%eax)117; CHECK-NEXT: movl %ebx, 8(%eax)118; CHECK-NEXT: movl %esi, 4(%eax)119; CHECK-NEXT: movl %edi, (%eax)120; CHECK-NEXT: popl %esi121; CHECK-NEXT: .cfi_def_cfa_offset 16122; CHECK-NEXT: popl %edi123; CHECK-NEXT: .cfi_def_cfa_offset 12124; CHECK-NEXT: popl %ebx125; CHECK-NEXT: .cfi_def_cfa_offset 8126; CHECK-NEXT: popl %ebp127; CHECK-NEXT: .cfi_def_cfa_offset 4128; CHECK-NEXT: retl $4129 %shl = shl <2 x i64> %A, %B130 ret <2 x i64> %shl131}132 133; PR16108134define i32 @test6() {135; CHECK-LABEL: test6:136; CHECK: # %bb.0:137; CHECK-NEXT: pushl %ebp138; CHECK-NEXT: .cfi_def_cfa_offset 8139; CHECK-NEXT: .cfi_offset %ebp, -8140; CHECK-NEXT: movl %esp, %ebp141; CHECK-NEXT: .cfi_def_cfa_register %ebp142; CHECK-NEXT: andl $-8, %esp143; CHECK-NEXT: subl $16, %esp144; CHECK-NEXT: movl $1, {{[0-9]+}}(%esp)145; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax146; CHECK-NEXT: movb $1, %al147; CHECK-NEXT: testb %al, %al148; CHECK-NEXT: jne .LBB5_3149; CHECK-NEXT: # %bb.1: # %if.then150; CHECK-NEXT: movl $1, %eax151; CHECK-NEXT: jmp .LBB5_2152; CHECK-NEXT: .LBB5_3: # %if.end153; CHECK-NEXT: xorl %eax, %eax154; CHECK-NEXT: .LBB5_2: # %if.then155; CHECK-NEXT: movl %ebp, %esp156; CHECK-NEXT: popl %ebp157; CHECK-NEXT: .cfi_def_cfa %esp, 4158; CHECK-NEXT: retl159 %x = alloca i32, align 4160 %t = alloca i64, align 8161 store volatile i32 1, ptr %x, align 4162 %load = load volatile i32, ptr %x, align 4163 %shl = shl i32 %load, 8164 %add = add i32 %shl, -224165 %sh_prom = zext i32 %add to i64166 %shl1 = shl i64 1, %sh_prom167 %cmp = icmp ne i64 %shl1, 4294967296168 br i1 %cmp, label %if.then, label %if.end169 170if.then: ; preds = %entry171 ret i32 1172 173if.end: ; preds = %entry174 ret i32 0175 176}177