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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2;RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s3 4define <32 x i32> @test_large_vec_vaarg(i32 %n, ...) {5; CHECK-LABEL: test_large_vec_vaarg:6; CHECK: # %bb.0:7; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx8; CHECK-NEXT: cmpl $24, %ecx9; CHECK-NEXT: jae .LBB0_210; CHECK-NEXT: # %bb.1:11; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax12; CHECK-NEXT: addq %rcx, %rax13; CHECK-NEXT: addl $8, %ecx14; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)15; CHECK-NEXT: jmp .LBB0_316; CHECK-NEXT: .LBB0_2:17; CHECK-NEXT: movq (%rsp), %rax18; CHECK-NEXT: addq $31, %rax19; CHECK-NEXT: andq $-32, %rax20; CHECK-NEXT: leaq 32(%rax), %rcx21; CHECK-NEXT: movq %rcx, (%rsp)22; CHECK-NEXT: .LBB0_3:23; CHECK-NEXT: vmovaps (%rax), %ymm024; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx25; CHECK-NEXT: cmpl $24, %ecx26; CHECK-NEXT: jae .LBB0_527; CHECK-NEXT: # %bb.4:28; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax29; CHECK-NEXT: addq %rcx, %rax30; CHECK-NEXT: addl $8, %ecx31; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)32; CHECK-NEXT: jmp .LBB0_633; CHECK-NEXT: .LBB0_5:34; CHECK-NEXT: movq (%rsp), %rax35; CHECK-NEXT: addq $31, %rax36; CHECK-NEXT: andq $-32, %rax37; CHECK-NEXT: leaq 32(%rax), %rcx38; CHECK-NEXT: movq %rcx, (%rsp)39; CHECK-NEXT: .LBB0_6:40; CHECK-NEXT: vmovaps (%rax), %ymm141; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx42; CHECK-NEXT: cmpl $24, %ecx43; CHECK-NEXT: jae .LBB0_844; CHECK-NEXT: # %bb.7:45; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax46; CHECK-NEXT: addq %rcx, %rax47; CHECK-NEXT: addl $8, %ecx48; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)49; CHECK-NEXT: jmp .LBB0_950; CHECK-NEXT: .LBB0_8:51; CHECK-NEXT: movq (%rsp), %rax52; CHECK-NEXT: addq $31, %rax53; CHECK-NEXT: andq $-32, %rax54; CHECK-NEXT: leaq 32(%rax), %rcx55; CHECK-NEXT: movq %rcx, (%rsp)56; CHECK-NEXT: .LBB0_9:57; CHECK-NEXT: vmovaps (%rax), %ymm258; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %ecx59; CHECK-NEXT: cmpl $24, %ecx60; CHECK-NEXT: jae .LBB0_1161; CHECK-NEXT: # %bb.10:62; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax63; CHECK-NEXT: addq %rcx, %rax64; CHECK-NEXT: addl $8, %ecx65; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)66; CHECK-NEXT: vmovaps (%rax), %ymm367; CHECK-NEXT: retq68; CHECK-NEXT: .LBB0_11:69; CHECK-NEXT: movq (%rsp), %rax70; CHECK-NEXT: addq $31, %rax71; CHECK-NEXT: andq $-32, %rax72; CHECK-NEXT: leaq 32(%rax), %rcx73; CHECK-NEXT: movq %rcx, (%rsp)74; CHECK-NEXT: vmovaps (%rax), %ymm375; CHECK-NEXT: retq76 %args = alloca ptr, align 477 %x = va_arg ptr %args, <32 x i32>78 ret <32 x i32> %x79}80