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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62 3; avx10.x-512 is just avx10.x -- 512 is kept for compatibility purposes.4 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.1-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_1 %s6 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_2 %s8 9; CHECK-AVX10_1-NOT: is not recognizable10; CHECK-AVX10_2-NOT: is not recognizable11 12define <32 x bfloat> @foo_avx10.1(<16 x float> %a, <16 x float> %b) {13; CHECK-AVX10_1-LABEL: foo_avx10.1:14; CHECK-AVX10_1: # %bb.0:15; CHECK-AVX10_1-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm016; CHECK-AVX10_1-NEXT: retq17;18; CHECK-AVX10_2-LABEL: foo_avx10.1:19; CHECK-AVX10_2: # %bb.0:20; CHECK-AVX10_2-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm021; CHECK-AVX10_2-NEXT: retq22 %ret = call <32 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %a, <16 x float> %b)23 ret <32 x bfloat> %ret24}25 26define <8 x i32> @foo_avx10.2(<8 x double> %f) {27; CHECK-AVX10_1-LABEL: foo_avx10.2:28; CHECK-AVX10_1: # %bb.0:29; CHECK-AVX10_1-NEXT: vextractf32x4 $2, %zmm0, %xmm130; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]31; CHECK-AVX10_1-NEXT: vmovsd {{.*#+}} xmm3 = [-2.147483648E+9,0.0E+0]32; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm433; CHECK-AVX10_1-NEXT: vmovsd {{.*#+}} xmm5 = [2.147483647E+9,0.0E+0]34; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm435; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx36; CHECK-AVX10_1-NEXT: xorl %eax, %eax37; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm238; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx39; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm1, %xmm240; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm2, %xmm241; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm2, %edx42; CHECK-AVX10_1-NEXT: vucomisd %xmm1, %xmm143; CHECK-AVX10_1-NEXT: cmovpl %eax, %edx44; CHECK-AVX10_1-NEXT: vmovd %edx, %xmm145; CHECK-AVX10_1-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm146; CHECK-AVX10_1-NEXT: vextractf32x4 $3, %zmm0, %xmm247; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm448; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm449; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx50; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm251; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx52; CHECK-AVX10_1-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm153; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm2 = xmm2[1,0]54; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm455; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm456; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx57; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm258; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx59; CHECK-AVX10_1-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm160; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]61; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm2, %xmm462; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm463; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx64; CHECK-AVX10_1-NEXT: vucomisd %xmm2, %xmm265; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx66; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm0, %xmm267; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm2, %xmm268; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm2, %edx69; CHECK-AVX10_1-NEXT: vucomisd %xmm0, %xmm070; CHECK-AVX10_1-NEXT: cmovpl %eax, %edx71; CHECK-AVX10_1-NEXT: vmovd %edx, %xmm272; CHECK-AVX10_1-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm273; CHECK-AVX10_1-NEXT: vextractf128 $1, %ymm0, %xmm074; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm0, %xmm475; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm4, %xmm476; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm4, %ecx77; CHECK-AVX10_1-NEXT: vucomisd %xmm0, %xmm078; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx79; CHECK-AVX10_1-NEXT: vpinsrd $2, %ecx, %xmm2, %xmm280; CHECK-AVX10_1-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]81; CHECK-AVX10_1-NEXT: vmaxsd %xmm3, %xmm0, %xmm382; CHECK-AVX10_1-NEXT: vminsd %xmm5, %xmm3, %xmm383; CHECK-AVX10_1-NEXT: vcvttsd2si %xmm3, %ecx84; CHECK-AVX10_1-NEXT: vucomisd %xmm0, %xmm085; CHECK-AVX10_1-NEXT: cmovpl %eax, %ecx86; CHECK-AVX10_1-NEXT: vpinsrd $3, %ecx, %xmm2, %xmm087; CHECK-AVX10_1-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm088; CHECK-AVX10_1-NEXT: retq89;90; CHECK-AVX10_2-LABEL: foo_avx10.2:91; CHECK-AVX10_2: # %bb.0:92; CHECK-AVX10_2-NEXT: vcvttpd2dqs %zmm0, %ymm093; CHECK-AVX10_2-NEXT: retq94 %x = call <8 x i32> @llvm.fptosi.sat.v8i32.v8f64(<8 x double> %f)95 ret <8 x i32> %x96}97 98