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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core2 -mattr=+sse2 | FileCheck %s3 4; FIXME: Ideally we should be able to fold the entire body of @test1 into a5; single paddd instruction. At the moment we produce the sequence6; pshufd+paddq+pshufd. This is fixed with the widening legalization.7 8define double @test1(double %A) {9; CHECK-LABEL: test1:10; CHECK: # %bb.0:11; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm012; CHECK-NEXT: retq13 %1 = bitcast double %A to <2 x i32>14 %add = add <2 x i32> %1, <i32 3, i32 5>15 %2 = bitcast <2 x i32> %add to double16 ret double %217}18 19define double @test2(double %A, double %B) {20; CHECK-LABEL: test2:21; CHECK: # %bb.0:22; CHECK-NEXT: paddd %xmm1, %xmm023; CHECK-NEXT: retq24 %1 = bitcast double %A to <2 x i32>25 %2 = bitcast double %B to <2 x i32>26 %add = add <2 x i32> %1, %227 %3 = bitcast <2 x i32> %add to double28 ret double %329}30 31define i64 @test3(i64 %A) {32; CHECK-LABEL: test3:33; CHECK: # %bb.0:34; CHECK-NEXT: movq %rdi, %xmm035; CHECK-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm036; CHECK-NEXT: movq %xmm0, %rax37; CHECK-NEXT: retq38 %1 = bitcast i64 %A to <2 x float>39 %add = fadd <2 x float> %1, <float 3.0, float 5.0>40 %2 = bitcast <2 x float> %add to i6441 ret i64 %242}43 44; FIXME: Ideally we should be able to fold the entire body of @test4 into a45; single paddd instruction. This is fixed with the widening legalization.46 47define i64 @test4(i64 %A) {48; CHECK-LABEL: test4:49; CHECK: # %bb.0:50; CHECK-NEXT: movq %rdi, %xmm051; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm052; CHECK-NEXT: movq %xmm0, %rax53; CHECK-NEXT: retq54 %1 = bitcast i64 %A to <2 x i32>55 %add = add <2 x i32> %1, <i32 3, i32 5>56 %2 = bitcast <2 x i32> %add to i6457 ret i64 %258}59 60define double @test5(double %A) {61; CHECK-LABEL: test5:62; CHECK: # %bb.0:63; CHECK-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm064; CHECK-NEXT: retq65 %1 = bitcast double %A to <2 x float>66 %add = fadd <2 x float> %1, <float 3.0, float 5.0>67 %2 = bitcast <2 x float> %add to double68 ret double %269}70 71; FIXME: Ideally we should be able to fold the entire body of @test6 into a72; single paddw instruction. This is fixed with the widening legalization.73 74define double @test6(double %A) {75; CHECK-LABEL: test6:76; CHECK: # %bb.0:77; CHECK-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm078; CHECK-NEXT: retq79 %1 = bitcast double %A to <4 x i16>80 %add = add <4 x i16> %1, <i16 3, i16 4, i16 5, i16 6>81 %2 = bitcast <4 x i16> %add to double82 ret double %283}84 85define double @test7(double %A, double %B) {86; CHECK-LABEL: test7:87; CHECK: # %bb.0:88; CHECK-NEXT: paddw %xmm1, %xmm089; CHECK-NEXT: retq90 %1 = bitcast double %A to <4 x i16>91 %2 = bitcast double %B to <4 x i16>92 %add = add <4 x i16> %1, %293 %3 = bitcast <4 x i16> %add to double94 ret double %395}96 97; FIXME: Ideally we should be able to fold the entire body of @test8 into a98; single paddb instruction. At the moment we produce the sequence99; pshufd+paddw+pshufd. This is fixed with the widening legalization.100 101define double @test8(double %A) {102; CHECK-LABEL: test8:103; CHECK: # %bb.0:104; CHECK-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0105; CHECK-NEXT: retq106 %1 = bitcast double %A to <8 x i8>107 %add = add <8 x i8> %1, <i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10>108 %2 = bitcast <8 x i8> %add to double109 ret double %2110}111 112define double @test9(double %A, double %B) {113; CHECK-LABEL: test9:114; CHECK: # %bb.0:115; CHECK-NEXT: paddb %xmm1, %xmm0116; CHECK-NEXT: retq117 %1 = bitcast double %A to <8 x i8>118 %2 = bitcast double %B to <8 x i8>119 %add = add <8 x i8> %1, %2120 %3 = bitcast <8 x i8> %add to double121 ret double %3122}123