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1; XFAIL: *2; ...should pass. See PR12324: misched bringup3; RUN: llc < %s -O3 -asm-verbose=false | FileCheck %s4target datalayout = "e-p:64:64:64"5target triple = "x86_64-unknown-unknown"6 7; Full strength reduction reduces register pressure from 5 to 4 here.8; Instruction selection should use the FLAGS value from the dec for9; the branch. Scheduling should push the adds upwards.10 11; CHECK-LABEL: full_me_0:12; CHECK: movsd (%rsi), %xmm013; CHECK: mulsd (%rdx), %xmm014; CHECK: movsd %xmm0, (%rdi)15; CHECK: addq $8, %rsi16; CHECK: addq $8, %rdx17; CHECK: addq $8, %rdi18; CHECK: decq %rcx19; CHECK: jne20 21define void @full_me_0(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {22entry:23 %t0 = icmp sgt i64 %n, 024 br i1 %t0, label %loop, label %return25 26loop:27 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]28 %Ai = getelementptr inbounds double, ptr %A, i64 %i29 %Bi = getelementptr inbounds double, ptr %B, i64 %i30 %Ci = getelementptr inbounds double, ptr %C, i64 %i31 %t1 = load double, ptr %Bi32 %t2 = load double, ptr %Ci33 %m = fmul double %t1, %t234 store double %m, ptr %Ai35 %i.next = add nsw i64 %i, 136 %exitcond = icmp eq i64 %i.next, %n37 br i1 %exitcond, label %return, label %loop38 39return:40 ret void41}42 43; Mostly-full strength reduction means we do full strength reduction on all44; except for the offsets.45;46; Given a choice between constant offsets -2048 and 2048, choose the negative47; value, because at boundary conditions it has a smaller encoding.48; TODO: That's an over-general heuristic. It would be better for the target49; to indicate what the encoding cost would be. Then using a 2048 offset50; would be better on x86-64, since the start value would be 0 instead of51; 2048.52 53; CHECK-LABEL: mostly_full_me_0:54; CHECK: movsd -2048(%rsi), %xmm055; CHECK: mulsd -2048(%rdx), %xmm056; CHECK: movsd %xmm0, -2048(%rdi)57; CHECK: movsd (%rsi), %xmm058; CHECK: divsd (%rdx), %xmm059; CHECK: movsd %xmm0, (%rdi)60; CHECK: addq $8, %rsi61; CHECK: addq $8, %rdx62; CHECK: addq $8, %rdi63; CHECK: decq %rcx64; CHECK: jne65 66define void @mostly_full_me_0(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {67entry:68 %t0 = icmp sgt i64 %n, 069 br i1 %t0, label %loop, label %return70 71loop:72 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]73 %Ai = getelementptr inbounds double, ptr %A, i64 %i74 %Bi = getelementptr inbounds double, ptr %B, i64 %i75 %Ci = getelementptr inbounds double, ptr %C, i64 %i76 %t1 = load double, ptr %Bi77 %t2 = load double, ptr %Ci78 %m = fmul double %t1, %t279 store double %m, ptr %Ai80 %j = add i64 %i, 25681 %Aj = getelementptr inbounds double, ptr %A, i64 %j82 %Bj = getelementptr inbounds double, ptr %B, i64 %j83 %Cj = getelementptr inbounds double, ptr %C, i64 %j84 %t3 = load double, ptr %Bj85 %t4 = load double, ptr %Cj86 %o = fdiv double %t3, %t487 store double %o, ptr %Aj88 %i.next = add nsw i64 %i, 189 %exitcond = icmp eq i64 %i.next, %n90 br i1 %exitcond, label %return, label %loop91 92return:93 ret void94}95 96; A minor variation on mostly_full_me_0.97; Prefer to start the indvar at 0.98 99; CHECK-LABEL: mostly_full_me_1:100; CHECK: movsd (%rsi), %xmm0101; CHECK: mulsd (%rdx), %xmm0102; CHECK: movsd %xmm0, (%rdi)103; CHECK: movsd -2048(%rsi), %xmm0104; CHECK: divsd -2048(%rdx), %xmm0105; CHECK: movsd %xmm0, -2048(%rdi)106; CHECK: addq $8, %rsi107; CHECK: addq $8, %rdx108; CHECK: addq $8, %rdi109; CHECK: decq %rcx110; CHECK: jne111 112define void @mostly_full_me_1(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {113entry:114 %t0 = icmp sgt i64 %n, 0115 br i1 %t0, label %loop, label %return116 117loop:118 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]119 %Ai = getelementptr inbounds double, ptr %A, i64 %i120 %Bi = getelementptr inbounds double, ptr %B, i64 %i121 %Ci = getelementptr inbounds double, ptr %C, i64 %i122 %t1 = load double, ptr %Bi123 %t2 = load double, ptr %Ci124 %m = fmul double %t1, %t2125 store double %m, ptr %Ai126 %j = sub i64 %i, 256127 %Aj = getelementptr inbounds double, ptr %A, i64 %j128 %Bj = getelementptr inbounds double, ptr %B, i64 %j129 %Cj = getelementptr inbounds double, ptr %C, i64 %j130 %t3 = load double, ptr %Bj131 %t4 = load double, ptr %Cj132 %o = fdiv double %t3, %t4133 store double %o, ptr %Aj134 %i.next = add nsw i64 %i, 1135 %exitcond = icmp eq i64 %i.next, %n136 br i1 %exitcond, label %return, label %loop137 138return:139 ret void140}141 142; A slightly less minor variation on mostly_full_me_0.143 144; CHECK-LABEL: mostly_full_me_2:145; CHECK: movsd (%rsi), %xmm0146; CHECK: mulsd (%rdx), %xmm0147; CHECK: movsd %xmm0, (%rdi)148; CHECK: movsd -4096(%rsi), %xmm0149; CHECK: divsd -4096(%rdx), %xmm0150; CHECK: movsd %xmm0, -4096(%rdi)151; CHECK: addq $8, %rsi152; CHECK: addq $8, %rdx153; CHECK: addq $8, %rdi154; CHECK: decq %rcx155; CHECK: jne156 157define void @mostly_full_me_2(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {158entry:159 %t0 = icmp sgt i64 %n, 0160 br i1 %t0, label %loop, label %return161 162loop:163 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]164 %k = add i64 %i, 256165 %Ak = getelementptr inbounds double, ptr %A, i64 %k166 %Bk = getelementptr inbounds double, ptr %B, i64 %k167 %Ck = getelementptr inbounds double, ptr %C, i64 %k168 %t1 = load double, ptr %Bk169 %t2 = load double, ptr %Ck170 %m = fmul double %t1, %t2171 store double %m, ptr %Ak172 %j = sub i64 %i, 256173 %Aj = getelementptr inbounds double, ptr %A, i64 %j174 %Bj = getelementptr inbounds double, ptr %B, i64 %j175 %Cj = getelementptr inbounds double, ptr %C, i64 %j176 %t3 = load double, ptr %Bj177 %t4 = load double, ptr %Cj178 %o = fdiv double %t3, %t4179 store double %o, ptr %Aj180 %i.next = add nsw i64 %i, 1181 %exitcond = icmp eq i64 %i.next, %n182 br i1 %exitcond, label %return, label %loop183 184return:185 ret void186}187 188; In this test, the counting IV exit value is used, so full strength reduction189; would not reduce register pressure. IndVarSimplify ought to simplify such190; cases away, but it's useful here to verify that LSR's register pressure191; heuristics are working as expected.192 193; CHECK-LABEL: count_me_0:194; CHECK: movsd (%rsi,%rax,8), %xmm0195; CHECK: mulsd (%rdx,%rax,8), %xmm0196; CHECK: movsd %xmm0, (%rdi,%rax,8)197; CHECK: incq %rax198; CHECK: cmpq %rax, %rcx199; CHECK: jne200 201define i64 @count_me_0(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {202entry:203 %t0 = icmp sgt i64 %n, 0204 br i1 %t0, label %loop, label %return205 206loop:207 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]208 %Ai = getelementptr inbounds double, ptr %A, i64 %i209 %Bi = getelementptr inbounds double, ptr %B, i64 %i210 %Ci = getelementptr inbounds double, ptr %C, i64 %i211 %t1 = load double, ptr %Bi212 %t2 = load double, ptr %Ci213 %m = fmul double %t1, %t2214 store double %m, ptr %Ai215 %i.next = add nsw i64 %i, 1216 %exitcond = icmp eq i64 %i.next, %n217 br i1 %exitcond, label %return, label %loop218 219return:220 %q = phi i64 [ 0, %entry ], [ %i.next, %loop ]221 ret i64 %q222}223 224; In this test, the trip count value is used, so full strength reduction225; would not reduce register pressure.226; (though it would reduce register pressure inside the loop...)227 228; CHECK-LABEL: count_me_1:229; CHECK: movsd (%rsi,%rax,8), %xmm0230; CHECK: mulsd (%rdx,%rax,8), %xmm0231; CHECK: movsd %xmm0, (%rdi,%rax,8)232; CHECK: incq %rax233; CHECK: cmpq %rax, %rcx234; CHECK: jne235 236define i64 @count_me_1(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {237entry:238 %t0 = icmp sgt i64 %n, 0239 br i1 %t0, label %loop, label %return240 241loop:242 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]243 %Ai = getelementptr inbounds double, ptr %A, i64 %i244 %Bi = getelementptr inbounds double, ptr %B, i64 %i245 %Ci = getelementptr inbounds double, ptr %C, i64 %i246 %t1 = load double, ptr %Bi247 %t2 = load double, ptr %Ci248 %m = fmul double %t1, %t2249 store double %m, ptr %Ai250 %i.next = add nsw i64 %i, 1251 %exitcond = icmp eq i64 %i.next, %n252 br i1 %exitcond, label %return, label %loop253 254return:255 %q = phi i64 [ 0, %entry ], [ %n, %loop ]256 ret i64 %q257}258 259; Full strength reduction doesn't save any registers here because the260; loop tripcount is a constant.261 262; CHECK-LABEL: count_me_2:263; CHECK: movl $10, %eax264; CHECK: align265; CHECK: BB6_1:266; CHECK: movsd -40(%rdi,%rax,8), %xmm0267; CHECK: addsd -40(%rsi,%rax,8), %xmm0268; CHECK: movsd %xmm0, -40(%rdx,%rax,8)269; CHECK: movsd (%rdi,%rax,8), %xmm0270; CHECK: subsd (%rsi,%rax,8), %xmm0271; CHECK: movsd %xmm0, (%rdx,%rax,8)272; CHECK: incq %rax273; CHECK: cmpq $5010, %rax274; CHECK: jne275 276define void @count_me_2(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C) nounwind {277entry:278 br label %loop279 280loop:281 %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]282 %i5 = add i64 %i, 5283 %Ai = getelementptr double, ptr %A, i64 %i5284 %t2 = load double, ptr %Ai285 %Bi = getelementptr double, ptr %B, i64 %i5286 %t4 = load double, ptr %Bi287 %t5 = fadd double %t2, %t4288 %Ci = getelementptr double, ptr %C, i64 %i5289 store double %t5, ptr %Ci290 %i10 = add i64 %i, 10291 %Ai10 = getelementptr double, ptr %A, i64 %i10292 %t9 = load double, ptr %Ai10293 %Bi10 = getelementptr double, ptr %B, i64 %i10294 %t11 = load double, ptr %Bi10295 %t12 = fsub double %t9, %t11296 %Ci10 = getelementptr double, ptr %C, i64 %i10297 store double %t12, ptr %Ci10298 %i.next = add i64 %i, 1299 %exitcond = icmp eq i64 %i.next, 5000300 br i1 %exitcond, label %return, label %loop301 302return:303 ret void304}305 306; This should be fully strength-reduced to reduce register pressure.307 308; CHECK-LABEL: full_me_1:309; CHECK: align310; CHECK: BB7_1:311; CHECK: movsd (%rdi), %xmm0312; CHECK: addsd (%rsi), %xmm0313; CHECK: movsd %xmm0, (%rdx)314; CHECK: movsd 40(%rdi), %xmm0315; CHECK: subsd 40(%rsi), %xmm0316; CHECK: movsd %xmm0, 40(%rdx)317; CHECK: addq $8, %rdi318; CHECK: addq $8, %rsi319; CHECK: addq $8, %rdx320; CHECK: decq %rcx321; CHECK: jne322 323define void @full_me_1(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {324entry:325 br label %loop326 327loop:328 %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]329 %i5 = add i64 %i, 5330 %Ai = getelementptr double, ptr %A, i64 %i5331 %t2 = load double, ptr %Ai332 %Bi = getelementptr double, ptr %B, i64 %i5333 %t4 = load double, ptr %Bi334 %t5 = fadd double %t2, %t4335 %Ci = getelementptr double, ptr %C, i64 %i5336 store double %t5, ptr %Ci337 %i10 = add i64 %i, 10338 %Ai10 = getelementptr double, ptr %A, i64 %i10339 %t9 = load double, ptr %Ai10340 %Bi10 = getelementptr double, ptr %B, i64 %i10341 %t11 = load double, ptr %Bi10342 %t12 = fsub double %t9, %t11343 %Ci10 = getelementptr double, ptr %C, i64 %i10344 store double %t12, ptr %Ci10345 %i.next = add i64 %i, 1346 %exitcond = icmp eq i64 %i.next, %n347 br i1 %exitcond, label %return, label %loop348 349return:350 ret void351}352 353; This is a variation on full_me_0 in which the 0,+,1 induction variable354; has a non-address use, pinning that value in a register.355 356; CHECK-LABEL: count_me_3:357; CHECK: call358; CHECK: movsd (%r{{[^,]*}},%r{{[^,]*}},8), %xmm0359; CHECK: mulsd (%r{{[^,]*}},%r{{[^,]*}},8), %xmm0360; CHECK: movsd %xmm0, (%r{{[^,]*}},%r{{[^,]*}},8)361; CHECK: incq %r{{.*}}362; CHECK: cmpq %r{{.*}}, %r{{.*}}363; CHECK: jne364 365declare void @use(i64)366 367define void @count_me_3(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i64 %n) nounwind {368entry:369 %t0 = icmp sgt i64 %n, 0370 br i1 %t0, label %loop, label %return371 372loop:373 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]374 call void @use(i64 %i)375 %Ai = getelementptr inbounds double, ptr %A, i64 %i376 %Bi = getelementptr inbounds double, ptr %B, i64 %i377 %Ci = getelementptr inbounds double, ptr %C, i64 %i378 %t1 = load double, ptr %Bi379 %t2 = load double, ptr %Ci380 %m = fmul double %t1, %t2381 store double %m, ptr %Ai382 %i.next = add nsw i64 %i, 1383 %exitcond = icmp eq i64 %i.next, %n384 br i1 %exitcond, label %return, label %loop385 386return:387 ret void388}389 390; LSR should use only one indvar for the inner loop.391; rdar://7657764392 393; CHECK-LABEL: asd:394; CHECK: BB9_4:395; CHECK-NEXT: addl (%r{{[^,]*}},%rdi,4), %e396; CHECK-NEXT: incq %rdi397; CHECK-NEXT: cmpq %rdi, %r{{[^,]*}}398; CHECK-NEXT: jg399 400%struct.anon = type { i32, [4200 x i32] }401 402@bars = common global [123123 x %struct.anon] zeroinitializer, align 32 ; <ptr> [#uses=2]403 404define i32 @asd(i32 %n) nounwind readonly {405entry:406 %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]407 br i1 %0, label %bb.nph14, label %bb5408 409bb.nph14: ; preds = %entry410 %tmp18 = zext i32 %n to i64 ; <i64> [#uses=1]411 br label %bb412 413bb: ; preds = %bb3, %bb.nph14414 %indvar16 = phi i64 [ 0, %bb.nph14 ], [ %indvar.next17, %bb3 ] ; <i64> [#uses=3]415 %s.113 = phi i32 [ 0, %bb.nph14 ], [ %s.0.lcssa, %bb3 ] ; <i32> [#uses=2]416 %scevgep2526 = getelementptr [123123 x %struct.anon], ptr @bars, i64 0, i64 %indvar16, i32 0 ; <ptr> [#uses=1]417 %1 = load i32, ptr %scevgep2526, align 4 ; <i32> [#uses=2]418 %2 = icmp sgt i32 %1, 0 ; <i1> [#uses=1]419 br i1 %2, label %bb.nph, label %bb3420 421bb.nph: ; preds = %bb422 %tmp23 = sext i32 %1 to i64 ; <i64> [#uses=1]423 br label %bb1424 425bb1: ; preds = %bb.nph, %bb1426 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp19, %bb1 ] ; <i64> [#uses=2]427 %s.07 = phi i32 [ %s.113, %bb.nph ], [ %4, %bb1 ] ; <i32> [#uses=1]428 %c.08 = getelementptr [123123 x %struct.anon], ptr @bars, i64 0, i64 %indvar16, i32 1, i64 %indvar ; <ptr> [#uses=1]429 %3 = load i32, ptr %c.08, align 4 ; <i32> [#uses=1]430 %4 = add nsw i32 %3, %s.07 ; <i32> [#uses=2]431 %tmp19 = add i64 %indvar, 1 ; <i64> [#uses=2]432 %5 = icmp sgt i64 %tmp23, %tmp19 ; <i1> [#uses=1]433 br i1 %5, label %bb1, label %bb3434 435bb3: ; preds = %bb1, %bb436 %s.0.lcssa = phi i32 [ %s.113, %bb ], [ %4, %bb1 ] ; <i32> [#uses=2]437 %indvar.next17 = add i64 %indvar16, 1 ; <i64> [#uses=2]438 %exitcond = icmp eq i64 %indvar.next17, %tmp18 ; <i1> [#uses=1]439 br i1 %exitcond, label %bb5, label %bb440 441bb5: ; preds = %bb3, %entry442 %s.1.lcssa = phi i32 [ 0, %entry ], [ %s.0.lcssa, %bb3 ] ; <i32> [#uses=1]443 ret i32 %s.1.lcssa444}445 446; Two loops here are of particular interest; the one at %bb21, where447; we don't want to leave extra induction variables around, or use an448; lea to compute an exit condition inside the loop:449 450; CHECK-LABEL: test:451 452; CHECK: BB10_4:453; CHECK-NEXT: movaps %xmm{{.*}}, %xmm{{.*}}454; CHECK-NEXT: addss %xmm{{.*}}, %xmm{{.*}}455; CHECK-NEXT: mulss (%r{{[^,]*}}), %xmm{{.*}}456; CHECK-NEXT: movss %xmm{{.*}}, (%r{{[^,]*}})457; CHECK-NEXT: addq $4, %r{{.*}}458; CHECK-NEXT: decq %r{{.*}}459; CHECK-NEXT: addq $4, %r{{.*}}460; CHECK-NEXT: movaps %xmm{{.*}}, %xmm{{.*}}461; CHECK-NEXT: BB10_2:462; CHECK-NEXT: testq %r{{.*}}, %r{{.*}}463; CHECK-NEXT: jle464; CHECK-NEXT: testb $15, %r{{.*}}465; CHECK-NEXT: jne466 467; And the one at %bb68, where we want to be sure to use superhero mode:468 469; CHECK: BB10_7:470; CHECK-NEXT: movaps 48(%r{{[^,]*}}), %xmm{{.*}}471; CHECK-NEXT: mulps %xmm{{.*}}, %xmm{{.*}}472; CHECK-NEXT: movaps 32(%r{{[^,]*}}), %xmm{{.*}}473; CHECK-NEXT: mulps %xmm{{.*}}, %xmm{{.*}}474; CHECK-NEXT: movaps 16(%r{{[^,]*}}), %xmm{{.*}}475; CHECK-NEXT: mulps %xmm{{.*}}, %xmm{{.*}}476; CHECK-NEXT: movaps (%r{{[^,]*}}), %xmm{{.*}}477; CHECK-NEXT: mulps %xmm{{.*}}, %xmm{{.*}}478; CHECK-NEXT: movaps %xmm{{.*}}, (%r{{[^,]*}})479; CHECK-NEXT: movaps %xmm{{.*}}, 16(%r{{[^,]*}})480; CHECK-NEXT: movaps %xmm{{.*}}, 32(%r{{[^,]*}})481; CHECK-NEXT: movaps %xmm{{.*}}, 48(%r{{[^,]*}})482; CHECK-NEXT: addps %xmm{{.*}}, %xmm{{.*}}483; CHECK-NEXT: addps %xmm{{.*}}, %xmm{{.*}}484; CHECK-NEXT: addps %xmm{{.*}}, %xmm{{.*}}485; CHECK-NEXT: addps %xmm{{.*}}, %xmm{{.*}}486; CHECK-NEXT: addq $64, %r{{.*}}487; CHECK-NEXT: addq $64, %r{{.*}}488; CHECK-NEXT: addq $-16, %r{{.*}}489; CHECK-NEXT: cmpq $15, %r{{.*}}490; CHECK-NEXT: jg491 492define void @test(ptr %arg, i64 %arg1, ptr nocapture %arg2, ptr nocapture %arg3, ptr %arg4, i64 %arg5, i64 %arg6) nounwind {493bb:494 %t = alloca float, align 4 ; <ptr> [#uses=3]495 %t7 = alloca float, align 4 ; <ptr> [#uses=2]496 %t8 = load float, ptr %arg3 ; <float> [#uses=8]497 %t9 = ptrtoint ptr %arg to i64 ; <i64> [#uses=1]498 %t10 = ptrtoint ptr %arg4 to i64 ; <i64> [#uses=1]499 %t11 = xor i64 %t10, %t9 ; <i64> [#uses=1]500 %t12 = and i64 %t11, 15 ; <i64> [#uses=1]501 %t13 = icmp eq i64 %t12, 0 ; <i1> [#uses=1]502 %t14 = xor i64 %arg1, 1 ; <i64> [#uses=1]503 %t15 = xor i64 %arg5, 1 ; <i64> [#uses=1]504 %t16 = or i64 %t15, %t14 ; <i64> [#uses=1]505 %t17 = trunc i64 %t16 to i32 ; <i32> [#uses=1]506 %t18 = icmp eq i32 %t17, 0 ; <i1> [#uses=1]507 br i1 %t18, label %bb19, label %bb213508 509bb19: ; preds = %bb510 %t20 = load float, ptr %arg2 ; <float> [#uses=1]511 br label %bb21512 513bb21: ; preds = %bb32, %bb19514 %t22 = phi i64 [ %t36, %bb32 ], [ 0, %bb19 ] ; <i64> [#uses=21]515 %t23 = phi float [ %t35, %bb32 ], [ %t20, %bb19 ] ; <float> [#uses=6]516 %t24 = sub i64 %arg6, %t22 ; <i64> [#uses=4]517 %t25 = getelementptr float, ptr %arg4, i64 %t22 ; <ptr> [#uses=4]518 %t26 = getelementptr float, ptr %arg, i64 %t22 ; <ptr> [#uses=3]519 %t27 = icmp sgt i64 %t24, 0 ; <i1> [#uses=1]520 br i1 %t27, label %bb28, label %bb37521 522bb28: ; preds = %bb21523 %t29 = ptrtoint ptr %t25 to i64 ; <i64> [#uses=1]524 %t30 = and i64 %t29, 15 ; <i64> [#uses=1]525 %t31 = icmp eq i64 %t30, 0 ; <i1> [#uses=1]526 br i1 %t31, label %bb37, label %bb32527 528bb32: ; preds = %bb28529 %t33 = load float, ptr %t26 ; <float> [#uses=1]530 %t34 = fmul float %t23, %t33 ; <float> [#uses=1]531 store float %t34, ptr %t25532 %t35 = fadd float %t23, %t8 ; <float> [#uses=1]533 %t36 = add i64 %t22, 1 ; <i64> [#uses=1]534 br label %bb21535 536bb37: ; preds = %bb28, %bb21537 %t38 = fmul float %t8, 4.000000e+00 ; <float> [#uses=1]538 store float %t38, ptr %t539 %t39 = fmul float %t8, 1.600000e+01 ; <float> [#uses=1]540 store float %t39, ptr %t7541 %t40 = fmul float %t8, 0.000000e+00 ; <float> [#uses=1]542 %t41 = fadd float %t23, %t40 ; <float> [#uses=1]543 %t42 = insertelement <4 x float> undef, float %t41, i32 0 ; <<4 x float>> [#uses=1]544 %t43 = fadd float %t23, %t8 ; <float> [#uses=1]545 %t44 = insertelement <4 x float> %t42, float %t43, i32 1 ; <<4 x float>> [#uses=1]546 %t45 = fmul float %t8, 2.000000e+00 ; <float> [#uses=1]547 %t46 = fadd float %t23, %t45 ; <float> [#uses=1]548 %t47 = insertelement <4 x float> %t44, float %t46, i32 2 ; <<4 x float>> [#uses=1]549 %t48 = fmul float %t8, 3.000000e+00 ; <float> [#uses=1]550 %t49 = fadd float %t23, %t48 ; <float> [#uses=1]551 %t50 = insertelement <4 x float> %t47, float %t49, i32 3 ; <<4 x float>> [#uses=5]552 %t51 = call <4 x float> asm "movss $1, $0\09\0Apshufd $$0, $0, $0", "=x,*m,~{dirflag},~{fpsr},~{flags}"(ptr %t) nounwind ; <<4 x float>> [#uses=3]553 %t52 = fadd <4 x float> %t50, %t51 ; <<4 x float>> [#uses=3]554 %t53 = fadd <4 x float> %t52, %t51 ; <<4 x float>> [#uses=3]555 %t54 = fadd <4 x float> %t53, %t51 ; <<4 x float>> [#uses=2]556 %t55 = call <4 x float> asm "movss $1, $0\09\0Apshufd $$0, $0, $0", "=x,*m,~{dirflag},~{fpsr},~{flags}"(ptr %t7) nounwind ; <<4 x float>> [#uses=8]557 %t56 = icmp sgt i64 %t24, 15 ; <i1> [#uses=2]558 br i1 %t13, label %bb57, label %bb118559 560bb57: ; preds = %bb37561 br i1 %t56, label %bb61, label %bb112562 563bb58: ; preds = %bb68564 %t59 = getelementptr float, ptr %arg, i64 %t78 ; <ptr> [#uses=1]565 %t60 = getelementptr float, ptr %arg4, i64 %t78 ; <ptr> [#uses=1]566 br label %bb112567 568bb61: ; preds = %bb57569 %t62 = add i64 %t22, 16 ; <i64> [#uses=1]570 %t63 = add i64 %t22, 4 ; <i64> [#uses=1]571 %t64 = add i64 %t22, 8 ; <i64> [#uses=1]572 %t65 = add i64 %t22, 12 ; <i64> [#uses=1]573 %t66 = add i64 %arg6, -16 ; <i64> [#uses=1]574 %t67 = sub i64 %t66, %t22 ; <i64> [#uses=1]575 br label %bb68576 577bb68: ; preds = %bb68, %bb61578 %t69 = phi i64 [ 0, %bb61 ], [ %t111, %bb68 ] ; <i64> [#uses=3]579 %t70 = phi <4 x float> [ %t54, %bb61 ], [ %t107, %bb68 ] ; <<4 x float>> [#uses=2]580 %t71 = phi <4 x float> [ %t50, %bb61 ], [ %t103, %bb68 ] ; <<4 x float>> [#uses=2]581 %t72 = phi <4 x float> [ %t53, %bb61 ], [ %t108, %bb68 ] ; <<4 x float>> [#uses=2]582 %t73 = phi <4 x float> [ %t52, %bb61 ], [ %t109, %bb68 ] ; <<4 x float>> [#uses=2]583 %t74 = shl i64 %t69, 4 ; <i64> [#uses=5]584 %t75 = add i64 %t22, %t74 ; <i64> [#uses=2]585 %t76 = getelementptr float, ptr %arg, i64 %t75 ; <ptr> [#uses=1]586 %t78 = add i64 %t62, %t74 ; <i64> [#uses=2]587 %t79 = add i64 %t63, %t74 ; <i64> [#uses=2]588 %t80 = getelementptr float, ptr %arg, i64 %t79 ; <ptr> [#uses=1]589 %t82 = add i64 %t64, %t74 ; <i64> [#uses=2]590 %t83 = getelementptr float, ptr %arg, i64 %t82 ; <ptr> [#uses=1]591 %t85 = add i64 %t65, %t74 ; <i64> [#uses=2]592 %t86 = getelementptr float, ptr %arg, i64 %t85 ; <ptr> [#uses=1]593 %t88 = getelementptr float, ptr %arg4, i64 %t75 ; <ptr> [#uses=1]594 %t90 = getelementptr float, ptr %arg4, i64 %t79 ; <ptr> [#uses=1]595 %t92 = getelementptr float, ptr %arg4, i64 %t82 ; <ptr> [#uses=1]596 %t94 = getelementptr float, ptr %arg4, i64 %t85 ; <ptr> [#uses=1]597 %t96 = mul i64 %t69, -16 ; <i64> [#uses=1]598 %t97 = add i64 %t67, %t96 ; <i64> [#uses=2]599 %t98 = load <4 x float>, ptr %t76 ; <<4 x float>> [#uses=1]600 %t99 = load <4 x float>, ptr %t80 ; <<4 x float>> [#uses=1]601 %t100 = load <4 x float>, ptr %t83 ; <<4 x float>> [#uses=1]602 %t101 = load <4 x float>, ptr %t86 ; <<4 x float>> [#uses=1]603 %t102 = fmul <4 x float> %t98, %t71 ; <<4 x float>> [#uses=1]604 %t103 = fadd <4 x float> %t71, %t55 ; <<4 x float>> [#uses=2]605 %t104 = fmul <4 x float> %t99, %t73 ; <<4 x float>> [#uses=1]606 %t105 = fmul <4 x float> %t100, %t72 ; <<4 x float>> [#uses=1]607 %t106 = fmul <4 x float> %t101, %t70 ; <<4 x float>> [#uses=1]608 store <4 x float> %t102, ptr %t88609 store <4 x float> %t104, ptr %t90610 store <4 x float> %t105, ptr %t92611 store <4 x float> %t106, ptr %t94612 %t107 = fadd <4 x float> %t70, %t55 ; <<4 x float>> [#uses=1]613 %t108 = fadd <4 x float> %t72, %t55 ; <<4 x float>> [#uses=1]614 %t109 = fadd <4 x float> %t73, %t55 ; <<4 x float>> [#uses=1]615 %t110 = icmp sgt i64 %t97, 15 ; <i1> [#uses=1]616 %t111 = add i64 %t69, 1 ; <i64> [#uses=1]617 br i1 %t110, label %bb68, label %bb58618 619bb112: ; preds = %bb58, %bb57620 %t113 = phi ptr [ %t59, %bb58 ], [ %t26, %bb57 ] ; <ptr> [#uses=1]621 %t114 = phi ptr [ %t60, %bb58 ], [ %t25, %bb57 ] ; <ptr> [#uses=1]622 %t115 = phi <4 x float> [ %t103, %bb58 ], [ %t50, %bb57 ] ; <<4 x float>> [#uses=1]623 %t116 = phi i64 [ %t97, %bb58 ], [ %t24, %bb57 ] ; <i64> [#uses=1]624 %t117 = call <4 x float> asm "movss $1, $0\09\0Apshufd $$0, $0, $0", "=x,*m,~{dirflag},~{fpsr},~{flags}"(ptr %t) nounwind ; <<4 x float>> [#uses=0]625 br label %bb194626 627bb118: ; preds = %bb37628 br i1 %t56, label %bb122, label %bb194629 630bb119: ; preds = %bb137631 %t120 = getelementptr float, ptr %arg, i64 %t145 ; <ptr> [#uses=1]632 %t121 = getelementptr float, ptr %arg4, i64 %t145 ; <ptr> [#uses=1]633 br label %bb194634 635bb122: ; preds = %bb118636 %t123 = add i64 %t22, -1 ; <i64> [#uses=1]637 %t124 = getelementptr inbounds float, ptr %arg, i64 %t123 ; <ptr> [#uses=1]638 %t126 = load <4 x float>, ptr %t124 ; <<4 x float>> [#uses=1]639 %t127 = add i64 %t22, 16 ; <i64> [#uses=1]640 %t128 = add i64 %t22, 3 ; <i64> [#uses=1]641 %t129 = add i64 %t22, 7 ; <i64> [#uses=1]642 %t130 = add i64 %t22, 11 ; <i64> [#uses=1]643 %t131 = add i64 %t22, 15 ; <i64> [#uses=1]644 %t132 = add i64 %t22, 4 ; <i64> [#uses=1]645 %t133 = add i64 %t22, 8 ; <i64> [#uses=1]646 %t134 = add i64 %t22, 12 ; <i64> [#uses=1]647 %t135 = add i64 %arg6, -16 ; <i64> [#uses=1]648 %t136 = sub i64 %t135, %t22 ; <i64> [#uses=1]649 br label %bb137650 651bb137: ; preds = %bb137, %bb122652 %t138 = phi i64 [ 0, %bb122 ], [ %t193, %bb137 ] ; <i64> [#uses=3]653 %t139 = phi <4 x float> [ %t54, %bb122 ], [ %t189, %bb137 ] ; <<4 x float>> [#uses=2]654 %t140 = phi <4 x float> [ %t50, %bb122 ], [ %t185, %bb137 ] ; <<4 x float>> [#uses=2]655 %t141 = phi <4 x float> [ %t53, %bb122 ], [ %t190, %bb137 ] ; <<4 x float>> [#uses=2]656 %t142 = phi <4 x float> [ %t52, %bb122 ], [ %t191, %bb137 ] ; <<4 x float>> [#uses=2]657 %t143 = phi <4 x float> [ %t126, %bb122 ], [ %t175, %bb137 ] ; <<4 x float>> [#uses=1]658 %t144 = shl i64 %t138, 4 ; <i64> [#uses=9]659 %t145 = add i64 %t127, %t144 ; <i64> [#uses=2]660 %t146 = add i64 %t128, %t144 ; <i64> [#uses=1]661 %t147 = getelementptr float, ptr %arg, i64 %t146 ; <ptr> [#uses=1]662 %t149 = add i64 %t129, %t144 ; <i64> [#uses=1]663 %t150 = getelementptr float, ptr %arg, i64 %t149 ; <ptr> [#uses=1]664 %t152 = add i64 %t130, %t144 ; <i64> [#uses=1]665 %t153 = getelementptr float, ptr %arg, i64 %t152 ; <ptr> [#uses=1]666 %t155 = add i64 %t131, %t144 ; <i64> [#uses=1]667 %t156 = getelementptr float, ptr %arg, i64 %t155 ; <ptr> [#uses=1]668 %t158 = add i64 %t22, %t144 ; <i64> [#uses=1]669 %t159 = getelementptr float, ptr %arg4, i64 %t158 ; <ptr> [#uses=1]670 %t161 = add i64 %t132, %t144 ; <i64> [#uses=1]671 %t162 = getelementptr float, ptr %arg4, i64 %t161 ; <ptr> [#uses=1]672 %t164 = add i64 %t133, %t144 ; <i64> [#uses=1]673 %t165 = getelementptr float, ptr %arg4, i64 %t164 ; <ptr> [#uses=1]674 %t167 = add i64 %t134, %t144 ; <i64> [#uses=1]675 %t168 = getelementptr float, ptr %arg4, i64 %t167 ; <ptr> [#uses=1]676 %t170 = mul i64 %t138, -16 ; <i64> [#uses=1]677 %t171 = add i64 %t136, %t170 ; <i64> [#uses=2]678 %t172 = load <4 x float>, ptr %t147 ; <<4 x float>> [#uses=2]679 %t173 = load <4 x float>, ptr %t150 ; <<4 x float>> [#uses=2]680 %t174 = load <4 x float>, ptr %t153 ; <<4 x float>> [#uses=2]681 %t175 = load <4 x float>, ptr %t156 ; <<4 x float>> [#uses=2]682 %t176 = shufflevector <4 x float> %t143, <4 x float> %t172, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]683 %t177 = shufflevector <4 x float> %t176, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]684 %t178 = shufflevector <4 x float> %t172, <4 x float> %t173, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]685 %t179 = shufflevector <4 x float> %t178, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]686 %t180 = shufflevector <4 x float> %t173, <4 x float> %t174, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]687 %t181 = shufflevector <4 x float> %t180, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]688 %t182 = shufflevector <4 x float> %t174, <4 x float> %t175, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]689 %t183 = shufflevector <4 x float> %t182, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]690 %t184 = fmul <4 x float> %t177, %t140 ; <<4 x float>> [#uses=1]691 %t185 = fadd <4 x float> %t140, %t55 ; <<4 x float>> [#uses=2]692 %t186 = fmul <4 x float> %t179, %t142 ; <<4 x float>> [#uses=1]693 %t187 = fmul <4 x float> %t181, %t141 ; <<4 x float>> [#uses=1]694 %t188 = fmul <4 x float> %t183, %t139 ; <<4 x float>> [#uses=1]695 store <4 x float> %t184, ptr %t159696 store <4 x float> %t186, ptr %t162697 store <4 x float> %t187, ptr %t165698 store <4 x float> %t188, ptr %t168699 %t189 = fadd <4 x float> %t139, %t55 ; <<4 x float>> [#uses=1]700 %t190 = fadd <4 x float> %t141, %t55 ; <<4 x float>> [#uses=1]701 %t191 = fadd <4 x float> %t142, %t55 ; <<4 x float>> [#uses=1]702 %t192 = icmp sgt i64 %t171, 15 ; <i1> [#uses=1]703 %t193 = add i64 %t138, 1 ; <i64> [#uses=1]704 br i1 %t192, label %bb137, label %bb119705 706bb194: ; preds = %bb119, %bb118, %bb112707 %t195 = phi i64 [ %t116, %bb112 ], [ %t171, %bb119 ], [ %t24, %bb118 ] ; <i64> [#uses=2]708 %t196 = phi <4 x float> [ %t115, %bb112 ], [ %t185, %bb119 ], [ %t50, %bb118 ] ; <<4 x float>> [#uses=1]709 %t197 = phi ptr [ %t114, %bb112 ], [ %t121, %bb119 ], [ %t25, %bb118 ] ; <ptr> [#uses=1]710 %t198 = phi ptr [ %t113, %bb112 ], [ %t120, %bb119 ], [ %t26, %bb118 ] ; <ptr> [#uses=1]711 %t199 = extractelement <4 x float> %t196, i32 0 ; <float> [#uses=2]712 %t200 = icmp sgt i64 %t195, 0 ; <i1> [#uses=1]713 br i1 %t200, label %bb201, label %bb211714 715bb201: ; preds = %bb201, %bb194716 %t202 = phi i64 [ %t209, %bb201 ], [ 0, %bb194 ] ; <i64> [#uses=3]717 %t203 = phi float [ %t208, %bb201 ], [ %t199, %bb194 ] ; <float> [#uses=2]718 %t204 = getelementptr float, ptr %t198, i64 %t202 ; <ptr> [#uses=1]719 %t205 = getelementptr float, ptr %t197, i64 %t202 ; <ptr> [#uses=1]720 %t206 = load float, ptr %t204 ; <float> [#uses=1]721 %t207 = fmul float %t203, %t206 ; <float> [#uses=1]722 store float %t207, ptr %t205723 %t208 = fadd float %t203, %t8 ; <float> [#uses=2]724 %t209 = add i64 %t202, 1 ; <i64> [#uses=2]725 %t210 = icmp eq i64 %t209, %t195 ; <i1> [#uses=1]726 br i1 %t210, label %bb211, label %bb201727 728bb211: ; preds = %bb201, %bb194729 %t212 = phi float [ %t199, %bb194 ], [ %t208, %bb201 ] ; <float> [#uses=1]730 store float %t212, ptr %arg2731 ret void732 733bb213: ; preds = %bb734 ret void735}736