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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+lwp | FileCheck %s --check-prefixes=X86,X86_LWP3; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver1 | FileCheck %s --check-prefixes=X86,X86_BDVER4; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=X86,X86_BDVER5; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver3 | FileCheck %s --check-prefixes=X86,X86_BDVER6; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver4 | FileCheck %s --check-prefixes=X86,X86_BDVER7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X648; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X649; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X6410; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X6411; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X6412 13define void @test_llwpcb(ptr%a0) nounwind {14; X86-LABEL: test_llwpcb:15; X86: # %bb.0:16; X86-NEXT: movl {{[0-9]+}}(%esp), %eax17; X86-NEXT: llwpcb %eax18; X86-NEXT: retl19;20; X64-LABEL: test_llwpcb:21; X64: # %bb.0:22; X64-NEXT: llwpcb %rdi23; X64-NEXT: retq24 tail call void @llvm.x86.llwpcb(ptr%a0)25 ret void26}27 28define ptr @test_slwpcb(ptr%a0) nounwind {29; X86-LABEL: test_slwpcb:30; X86: # %bb.0:31; X86-NEXT: slwpcb %eax32; X86-NEXT: retl33;34; X64-LABEL: test_slwpcb:35; X64: # %bb.0:36; X64-NEXT: slwpcb %rax37; X64-NEXT: retq38 %1 = tail call ptr @llvm.x86.slwpcb()39 ret ptr%140}41 42define i8 @test_lwpins32_rri(i32 %a0, i32 %a1) nounwind {43; X86_LWP-LABEL: test_lwpins32_rri:44; X86_LWP: # %bb.0:45; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %eax46; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %ecx47; X86_LWP-NEXT: addl %ecx, %ecx48; X86_LWP-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF49; X86_LWP-NEXT: setb %al50; X86_LWP-NEXT: retl51;52; X86_BDVER-LABEL: test_lwpins32_rri:53; X86_BDVER: # %bb.0:54; X86_BDVER-NEXT: movl {{[0-9]+}}(%esp), %ecx55; X86_BDVER-NEXT: movl {{[0-9]+}}(%esp), %eax56; X86_BDVER-NEXT: addl %ecx, %ecx57; X86_BDVER-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF58; X86_BDVER-NEXT: setb %al59; X86_BDVER-NEXT: retl60;61; X64-LABEL: test_lwpins32_rri:62; X64: # %bb.0:63; X64-NEXT: addl %esi, %esi64; X64-NEXT: lwpins $-1985229329, %esi, %edi # imm = 0x89ABCDEF65; X64-NEXT: setb %al66; X64-NEXT: retq67 %1 = add i32 %a1, %a168 %2 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %1, i32 2309737967)69 ret i8 %270}71 72define i8 @test_lwpins32_rmi(i32 %a0, ptr%p1) nounwind {73; X86-LABEL: test_lwpins32_rmi:74; X86: # %bb.0:75; X86-NEXT: movl {{[0-9]+}}(%esp), %eax76; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx77; X86-NEXT: lwpins $1985229328, (%eax), %ecx # imm = 0x7654321078; X86-NEXT: setb %al79; X86-NEXT: retl80;81; X64-LABEL: test_lwpins32_rmi:82; X64: # %bb.0:83; X64-NEXT: lwpins $1985229328, (%rsi), %edi # imm = 0x7654321084; X64-NEXT: setb %al85; X64-NEXT: retq86 %a1 = load i32, ptr%p187 %1 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %a1, i32 1985229328)88 ret i8 %189}90 91define void @test_lwpval32_rri(i32 %a0, i32 %a1) nounwind {92; X86_LWP-LABEL: test_lwpval32_rri:93; X86_LWP: # %bb.0:94; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %eax95; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %ecx96; X86_LWP-NEXT: addl %ecx, %ecx97; X86_LWP-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA9898; X86_LWP-NEXT: retl99;100; X86_BDVER-LABEL: test_lwpval32_rri:101; X86_BDVER: # %bb.0:102; X86_BDVER-NEXT: movl {{[0-9]+}}(%esp), %ecx103; X86_BDVER-NEXT: movl {{[0-9]+}}(%esp), %eax104; X86_BDVER-NEXT: addl %ecx, %ecx105; X86_BDVER-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98106; X86_BDVER-NEXT: retl107;108; X64-LABEL: test_lwpval32_rri:109; X64: # %bb.0:110; X64-NEXT: addl %esi, %esi111; X64-NEXT: lwpval $-19088744, %esi, %edi # imm = 0xFEDCBA98112; X64-NEXT: retq113 %1 = add i32 %a1, %a1114 tail call void @llvm.x86.lwpval32(i32 %a0, i32 %1, i32 4275878552)115 ret void116}117 118define void @test_lwpval32_rmi(i32 %a0, ptr%p1) nounwind {119; X86-LABEL: test_lwpval32_rmi:120; X86: # %bb.0:121; X86-NEXT: movl {{[0-9]+}}(%esp), %eax122; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx123; X86-NEXT: lwpval $305419896, (%eax), %ecx # imm = 0x12345678124; X86-NEXT: retl125;126; X64-LABEL: test_lwpval32_rmi:127; X64: # %bb.0:128; X64-NEXT: lwpval $305419896, (%rsi), %edi # imm = 0x12345678129; X64-NEXT: retq130 %a1 = load i32, ptr%p1131 tail call void @llvm.x86.lwpval32(i32 %a0, i32 %a1, i32 305419896)132 ret void133}134 135declare void @llvm.x86.llwpcb(ptr) nounwind136declare ptr @llvm.x86.slwpcb() nounwind137declare i8 @llvm.x86.lwpins32(i32, i32, i32) nounwind138declare void @llvm.x86.lwpval32(i32, i32, i32) nounwind139