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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s3 4define i32 @mask_negated_zext_bool1(i1 %x) {5; CHECK-LABEL: mask_negated_zext_bool1:6; CHECK: # %bb.0:7; CHECK-NEXT: movl %edi, %eax8; CHECK-NEXT: andl $1, %eax9; CHECK-NEXT: retq10 %ext = zext i1 %x to i3211 %neg = sub i32 0, %ext12 %and = and i32 %neg, 113 ret i32 %and14}15 16define i32 @mask_negated_zext_bool2(i1 zeroext %x) {17; CHECK-LABEL: mask_negated_zext_bool2:18; CHECK: # %bb.0:19; CHECK-NEXT: movl %edi, %eax20; CHECK-NEXT: retq21 %ext = zext i1 %x to i3222 %neg = sub i32 0, %ext23 %and = and i32 %neg, 124 ret i32 %and25}26 27define <4 x i32> @mask_negated_zext_bool_vec(<4 x i1> %x) {28; CHECK-LABEL: mask_negated_zext_bool_vec:29; CHECK: # %bb.0:30; CHECK-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm031; CHECK-NEXT: retq32 %ext = zext <4 x i1> %x to <4 x i32>33 %neg = sub <4 x i32> zeroinitializer, %ext34 %and = and <4 x i32> %neg, <i32 1, i32 1, i32 1, i32 1>35 ret <4 x i32> %and36}37 38define i32 @mask_negated_sext_bool1(i1 %x) {39; CHECK-LABEL: mask_negated_sext_bool1:40; CHECK: # %bb.0:41; CHECK-NEXT: movl %edi, %eax42; CHECK-NEXT: andl $1, %eax43; CHECK-NEXT: retq44 %ext = sext i1 %x to i3245 %neg = sub i32 0, %ext46 %and = and i32 %neg, 147 ret i32 %and48}49 50define i32 @mask_negated_sext_bool2(i1 zeroext %x) {51; CHECK-LABEL: mask_negated_sext_bool2:52; CHECK: # %bb.0:53; CHECK-NEXT: movl %edi, %eax54; CHECK-NEXT: retq55 %ext = sext i1 %x to i3256 %neg = sub i32 0, %ext57 %and = and i32 %neg, 158 ret i32 %and59}60 61define <4 x i32> @mask_negated_sext_bool_vec(<4 x i1> %x) {62; CHECK-LABEL: mask_negated_sext_bool_vec:63; CHECK: # %bb.0:64; CHECK-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm065; CHECK-NEXT: retq66 %ext = sext <4 x i1> %x to <4 x i32>67 %neg = sub <4 x i32> zeroinitializer, %ext68 %and = and <4 x i32> %neg, <i32 1, i32 1, i32 1, i32 1>69 ret <4 x i32> %and70}71 72