57 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=i686_SSE23; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_64_SSE24; RUN: llc < %s -mtriple=x86_64--gnux32 -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_x32_SSE25; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=i686_AVX6; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=x86_64_AVX7; RUN: llc < %s -mtriple=x86_64--gnux32 -mattr=+avx | FileCheck %s --check-prefix=x86_x32_AVX8; rdar://65734679 10define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, ptr %c) nounwind {11; i686_SSE2-LABEL: test:12; i686_SSE2: # %bb.0: # %entry13; i686_SSE2-NEXT: pushl %edi14; i686_SSE2-NEXT: movl {{[0-9]+}}(%esp), %edi15; i686_SSE2-NEXT: maskmovdqu %xmm1, %xmm016; i686_SSE2-NEXT: popl %edi17; i686_SSE2-NEXT: retl18;19; x86_64_SSE2-LABEL: test:20; x86_64_SSE2: # %bb.0: # %entry21; x86_64_SSE2-NEXT: movq %rsi, %rdi22; x86_64_SSE2-NEXT: maskmovdqu %xmm1, %xmm023; x86_64_SSE2-NEXT: retq24;25; x86_x32_SSE2-LABEL: test:26; x86_x32_SSE2: # %bb.0: # %entry27; x86_x32_SSE2-NEXT: movq %rsi, %rdi28; x86_x32_SSE2-NEXT: # kill: def $edi killed $edi killed $rdi29; x86_x32_SSE2-NEXT: addr32 maskmovdqu %xmm1, %xmm030; x86_x32_SSE2-NEXT: retq31;32; i686_AVX-LABEL: test:33; i686_AVX: # %bb.0: # %entry34; i686_AVX-NEXT: pushl %edi35; i686_AVX-NEXT: movl {{[0-9]+}}(%esp), %edi36; i686_AVX-NEXT: vmaskmovdqu %xmm1, %xmm037; i686_AVX-NEXT: popl %edi38; i686_AVX-NEXT: retl39;40; x86_64_AVX-LABEL: test:41; x86_64_AVX: # %bb.0: # %entry42; x86_64_AVX-NEXT: movq %rsi, %rdi43; x86_64_AVX-NEXT: vmaskmovdqu %xmm1, %xmm044; x86_64_AVX-NEXT: retq45; x86_x32_AVX-LABEL: test:46; x86_x32_AVX: # %bb.0: # %entry47; x86_x32_AVX-NEXT: movq %rsi, %rdi48; x86_x32_AVX-NEXT: # kill: def $edi killed $edi killed $rdi49; x86_x32_AVX-NEXT: addr32 vmaskmovdqu %xmm1, %xmm050; x86_x32_AVX-NEXT: retq51entry:52 tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, ptr %c )53 ret void54}55 56declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, ptr) nounwind57