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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; Make sure that we realign the stack. Mingw32 uses 4 byte stack alignment, we3; need 16 bytes for SSE and 32 bytes for AVX.4 5; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=pentium2 | FileCheck %s --check-prefix=NOSSE6; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=pentium3 | FileCheck %s --check-prefix=SSE7; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=yonah | FileCheck %s --check-prefix=SSE8; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=corei7-avx | FileCheck %s --check-prefix=AVX9; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX10 11define void @test1(i32 %t) nounwind {12; NOSSE-LABEL: test1:13; NOSSE: # %bb.0:14; NOSSE-NEXT: pushl %ebp15; NOSSE-NEXT: movl %esp, %ebp16; NOSSE-NEXT: subl $32, %esp17; NOSSE-NEXT: movl 8(%ebp), %eax18; NOSSE-NEXT: movl $0, -4(%ebp)19; NOSSE-NEXT: movl $0, -8(%ebp)20; NOSSE-NEXT: movl $0, -12(%ebp)21; NOSSE-NEXT: movl $0, -16(%ebp)22; NOSSE-NEXT: movl $0, -20(%ebp)23; NOSSE-NEXT: movl $0, -24(%ebp)24; NOSSE-NEXT: movl $0, -28(%ebp)25; NOSSE-NEXT: movl $0, -32(%ebp)26; NOSSE-NEXT: addl $3, %eax27; NOSSE-NEXT: andl $-4, %eax28; NOSSE-NEXT: calll __alloca29; NOSSE-NEXT: movl %esp, %eax30; NOSSE-NEXT: pushl %eax31; NOSSE-NEXT: calll _dummy32; NOSSE-NEXT: movl %ebp, %esp33; NOSSE-NEXT: popl %ebp34; NOSSE-NEXT: retl35;36; SSE-LABEL: test1:37; SSE: # %bb.0:38; SSE-NEXT: pushl %ebp39; SSE-NEXT: movl %esp, %ebp40; SSE-NEXT: pushl %esi41; SSE-NEXT: andl $-16, %esp42; SSE-NEXT: subl $48, %esp43; SSE-NEXT: movl %esp, %esi44; SSE-NEXT: movl 8(%ebp), %eax45; SSE-NEXT: xorps %xmm0, %xmm046; SSE-NEXT: movaps %xmm0, 16(%esi)47; SSE-NEXT: movaps %xmm0, (%esi)48; SSE-NEXT: addl $3, %eax49; SSE-NEXT: andl $-4, %eax50; SSE-NEXT: calll __alloca51; SSE-NEXT: movl %esp, %eax52; SSE-NEXT: pushl %eax53; SSE-NEXT: calll _dummy54; SSE-NEXT: leal -4(%ebp), %esp55; SSE-NEXT: popl %esi56; SSE-NEXT: popl %ebp57; SSE-NEXT: retl58;59; AVX-LABEL: test1:60; AVX: # %bb.0:61; AVX-NEXT: pushl %ebp62; AVX-NEXT: movl %esp, %ebp63; AVX-NEXT: pushl %esi64; AVX-NEXT: andl $-32, %esp65; AVX-NEXT: subl $64, %esp66; AVX-NEXT: movl %esp, %esi67; AVX-NEXT: movl 8(%ebp), %eax68; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm069; AVX-NEXT: vmovaps %ymm0, (%esi)70; AVX-NEXT: addl $3, %eax71; AVX-NEXT: andl $-4, %eax72; AVX-NEXT: calll __alloca73; AVX-NEXT: movl %esp, %eax74; AVX-NEXT: pushl %eax75; AVX-NEXT: vzeroupper76; AVX-NEXT: calll _dummy77; AVX-NEXT: leal -4(%ebp), %esp78; AVX-NEXT: popl %esi79; AVX-NEXT: popl %ebp80; AVX-NEXT: retl81 %tmp1210 = alloca i8, i32 32, align 482 call void @llvm.memset.p0.i64(ptr align 4 %tmp1210, i8 0, i64 32, i1 false)83 %x = alloca i8, i32 %t84 call void @dummy(ptr %x)85 ret void86}87 88define void @test2(i32 %t) nounwind {89; NOSSE-LABEL: test2:90; NOSSE: # %bb.0:91; NOSSE-NEXT: pushl %ebp92; NOSSE-NEXT: movl %esp, %ebp93; NOSSE-NEXT: subl $16, %esp94; NOSSE-NEXT: movl 8(%ebp), %eax95; NOSSE-NEXT: movl $0, -4(%ebp)96; NOSSE-NEXT: movl $0, -8(%ebp)97; NOSSE-NEXT: movl $0, -12(%ebp)98; NOSSE-NEXT: movl $0, -16(%ebp)99; NOSSE-NEXT: addl $3, %eax100; NOSSE-NEXT: andl $-4, %eax101; NOSSE-NEXT: calll __alloca102; NOSSE-NEXT: movl %esp, %eax103; NOSSE-NEXT: pushl %eax104; NOSSE-NEXT: calll _dummy105; NOSSE-NEXT: movl %ebp, %esp106; NOSSE-NEXT: popl %ebp107; NOSSE-NEXT: retl108;109; SSE-LABEL: test2:110; SSE: # %bb.0:111; SSE-NEXT: pushl %ebp112; SSE-NEXT: movl %esp, %ebp113; SSE-NEXT: pushl %esi114; SSE-NEXT: andl $-16, %esp115; SSE-NEXT: subl $32, %esp116; SSE-NEXT: movl %esp, %esi117; SSE-NEXT: movl 8(%ebp), %eax118; SSE-NEXT: xorps %xmm0, %xmm0119; SSE-NEXT: movaps %xmm0, (%esi)120; SSE-NEXT: addl $3, %eax121; SSE-NEXT: andl $-4, %eax122; SSE-NEXT: calll __alloca123; SSE-NEXT: movl %esp, %eax124; SSE-NEXT: pushl %eax125; SSE-NEXT: calll _dummy126; SSE-NEXT: leal -4(%ebp), %esp127; SSE-NEXT: popl %esi128; SSE-NEXT: popl %ebp129; SSE-NEXT: retl130;131; AVX-LABEL: test2:132; AVX: # %bb.0:133; AVX-NEXT: pushl %ebp134; AVX-NEXT: movl %esp, %ebp135; AVX-NEXT: pushl %esi136; AVX-NEXT: andl $-16, %esp137; AVX-NEXT: subl $32, %esp138; AVX-NEXT: movl %esp, %esi139; AVX-NEXT: movl 8(%ebp), %eax140; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0141; AVX-NEXT: vmovaps %xmm0, (%esi)142; AVX-NEXT: addl $3, %eax143; AVX-NEXT: andl $-4, %eax144; AVX-NEXT: calll __alloca145; AVX-NEXT: movl %esp, %eax146; AVX-NEXT: pushl %eax147; AVX-NEXT: calll _dummy148; AVX-NEXT: leal -4(%ebp), %esp149; AVX-NEXT: popl %esi150; AVX-NEXT: popl %ebp151; AVX-NEXT: retl152 %tmp1210 = alloca i8, i32 16, align 4153 call void @llvm.memset.p0.i64(ptr align 4 %tmp1210, i8 0, i64 16, i1 false)154 %x = alloca i8, i32 %t155 call void @dummy(ptr %x)156 ret void157}158 159declare void @dummy(ptr)160 161declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind162