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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE23; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=X86,X86-SSE4A4; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64-SSE,X64-SSE25; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=X64-SSE,X64-SSE4A6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE417; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX18; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX29 10;11; PR4212312;13 14define void @merge_2_v4f32_align32(ptr %a0, ptr %a1) nounwind {15; X86-LABEL: merge_2_v4f32_align32:16; X86: # %bb.0:17; X86-NEXT: movl {{[0-9]+}}(%esp), %eax18; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx19; X86-NEXT: movaps (%ecx), %xmm020; X86-NEXT: movaps 16(%ecx), %xmm121; X86-NEXT: movntps %xmm0, (%eax)22; X86-NEXT: movntps %xmm1, 16(%eax)23; X86-NEXT: retl24;25; X64-SSE2-LABEL: merge_2_v4f32_align32:26; X64-SSE2: # %bb.0:27; X64-SSE2-NEXT: movaps (%rdi), %xmm028; X64-SSE2-NEXT: movaps 16(%rdi), %xmm129; X64-SSE2-NEXT: movntps %xmm0, (%rsi)30; X64-SSE2-NEXT: movntps %xmm1, 16(%rsi)31; X64-SSE2-NEXT: retq32;33; X64-SSE4A-LABEL: merge_2_v4f32_align32:34; X64-SSE4A: # %bb.0:35; X64-SSE4A-NEXT: movaps (%rdi), %xmm036; X64-SSE4A-NEXT: movaps 16(%rdi), %xmm137; X64-SSE4A-NEXT: movntps %xmm0, (%rsi)38; X64-SSE4A-NEXT: movntps %xmm1, 16(%rsi)39; X64-SSE4A-NEXT: retq40;41; X64-SSE41-LABEL: merge_2_v4f32_align32:42; X64-SSE41: # %bb.0:43; X64-SSE41-NEXT: movntdqa (%rdi), %xmm044; X64-SSE41-NEXT: movntdqa 16(%rdi), %xmm145; X64-SSE41-NEXT: movntdq %xmm0, (%rsi)46; X64-SSE41-NEXT: movntdq %xmm1, 16(%rsi)47; X64-SSE41-NEXT: retq48;49; X64-AVX1-LABEL: merge_2_v4f32_align32:50; X64-AVX1: # %bb.0:51; X64-AVX1-NEXT: vmovntdqa (%rdi), %xmm052; X64-AVX1-NEXT: vmovntdqa 16(%rdi), %xmm153; X64-AVX1-NEXT: vmovntdq %xmm0, (%rsi)54; X64-AVX1-NEXT: vmovntdq %xmm1, 16(%rsi)55; X64-AVX1-NEXT: retq56;57; X64-AVX2-LABEL: merge_2_v4f32_align32:58; X64-AVX2: # %bb.0:59; X64-AVX2-NEXT: vmovntdqa (%rdi), %ymm060; X64-AVX2-NEXT: vmovntdq %ymm0, (%rsi)61; X64-AVX2-NEXT: vzeroupper62; X64-AVX2-NEXT: retq63 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 064 %2 = load <4 x float>, ptr %a0, align 32, !nontemporal !065 %3 = load <4 x float>, ptr %1, align 16, !nontemporal !066 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 067 store <4 x float> %2, ptr %a1, align 32, !nontemporal !068 store <4 x float> %3, ptr %4, align 16, !nontemporal !069 ret void70}71 72; Don't merge nt and non-nt loads even if aligned.73define void @merge_2_v4f32_align32_mix_ntload(ptr %a0, ptr %a1) nounwind {74; X86-LABEL: merge_2_v4f32_align32_mix_ntload:75; X86: # %bb.0:76; X86-NEXT: movl {{[0-9]+}}(%esp), %eax77; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx78; X86-NEXT: movaps (%ecx), %xmm079; X86-NEXT: movaps 16(%ecx), %xmm180; X86-NEXT: movaps %xmm0, (%eax)81; X86-NEXT: movaps %xmm1, 16(%eax)82; X86-NEXT: retl83;84; X64-SSE2-LABEL: merge_2_v4f32_align32_mix_ntload:85; X64-SSE2: # %bb.0:86; X64-SSE2-NEXT: movaps (%rdi), %xmm087; X64-SSE2-NEXT: movaps 16(%rdi), %xmm188; X64-SSE2-NEXT: movaps %xmm0, (%rsi)89; X64-SSE2-NEXT: movaps %xmm1, 16(%rsi)90; X64-SSE2-NEXT: retq91;92; X64-SSE4A-LABEL: merge_2_v4f32_align32_mix_ntload:93; X64-SSE4A: # %bb.0:94; X64-SSE4A-NEXT: movaps (%rdi), %xmm095; X64-SSE4A-NEXT: movaps 16(%rdi), %xmm196; X64-SSE4A-NEXT: movaps %xmm0, (%rsi)97; X64-SSE4A-NEXT: movaps %xmm1, 16(%rsi)98; X64-SSE4A-NEXT: retq99;100; X64-SSE41-LABEL: merge_2_v4f32_align32_mix_ntload:101; X64-SSE41: # %bb.0:102; X64-SSE41-NEXT: movntdqa (%rdi), %xmm0103; X64-SSE41-NEXT: movaps 16(%rdi), %xmm1104; X64-SSE41-NEXT: movdqa %xmm0, (%rsi)105; X64-SSE41-NEXT: movaps %xmm1, 16(%rsi)106; X64-SSE41-NEXT: retq107;108; X64-AVX-LABEL: merge_2_v4f32_align32_mix_ntload:109; X64-AVX: # %bb.0:110; X64-AVX-NEXT: vmovntdqa (%rdi), %xmm0111; X64-AVX-NEXT: vmovaps 16(%rdi), %xmm1112; X64-AVX-NEXT: vmovdqa %xmm0, (%rsi)113; X64-AVX-NEXT: vmovaps %xmm1, 16(%rsi)114; X64-AVX-NEXT: retq115 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0116 %2 = load <4 x float>, ptr %a0, align 32, !nontemporal !0117 %3 = load <4 x float>, ptr %1, align 16118 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0119 store <4 x float> %2, ptr %a1, align 32120 store <4 x float> %3, ptr %4, align 16121 ret void122}123 124; Don't merge nt and non-nt stores even if aligned.125define void @merge_2_v4f32_align32_mix_ntstore(ptr %a0, ptr %a1) nounwind {126; X86-LABEL: merge_2_v4f32_align32_mix_ntstore:127; X86: # %bb.0:128; X86-NEXT: movl {{[0-9]+}}(%esp), %eax129; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx130; X86-NEXT: movaps (%ecx), %xmm0131; X86-NEXT: movaps 16(%ecx), %xmm1132; X86-NEXT: movntps %xmm0, (%eax)133; X86-NEXT: movaps %xmm1, 16(%eax)134; X86-NEXT: retl135;136; X64-SSE-LABEL: merge_2_v4f32_align32_mix_ntstore:137; X64-SSE: # %bb.0:138; X64-SSE-NEXT: movaps (%rdi), %xmm0139; X64-SSE-NEXT: movaps 16(%rdi), %xmm1140; X64-SSE-NEXT: movntps %xmm0, (%rsi)141; X64-SSE-NEXT: movaps %xmm1, 16(%rsi)142; X64-SSE-NEXT: retq143;144; X64-AVX-LABEL: merge_2_v4f32_align32_mix_ntstore:145; X64-AVX: # %bb.0:146; X64-AVX-NEXT: vmovaps (%rdi), %xmm0147; X64-AVX-NEXT: vmovaps 16(%rdi), %xmm1148; X64-AVX-NEXT: vmovntps %xmm0, (%rsi)149; X64-AVX-NEXT: vmovaps %xmm1, 16(%rsi)150; X64-AVX-NEXT: retq151 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0152 %2 = load <4 x float>, ptr %a0, align 32153 %3 = load <4 x float>, ptr %1, align 16154 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0155 store <4 x float> %2, ptr %a1, align 32, !nontemporal !0156 store <4 x float> %3, ptr %4, align 16157 ret void158}159 160; AVX2 can't perform NT-load-ymm on 16-byte aligned memory.161; Must be kept separate as VMOVNTDQA xmm.162define void @merge_2_v4f32_align16_ntload(ptr %a0, ptr %a1) nounwind {163; X86-LABEL: merge_2_v4f32_align16_ntload:164; X86: # %bb.0:165; X86-NEXT: movl {{[0-9]+}}(%esp), %eax166; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx167; X86-NEXT: movaps (%ecx), %xmm0168; X86-NEXT: movaps 16(%ecx), %xmm1169; X86-NEXT: movaps %xmm0, (%eax)170; X86-NEXT: movaps %xmm1, 16(%eax)171; X86-NEXT: retl172;173; X64-SSE2-LABEL: merge_2_v4f32_align16_ntload:174; X64-SSE2: # %bb.0:175; X64-SSE2-NEXT: movaps (%rdi), %xmm0176; X64-SSE2-NEXT: movaps 16(%rdi), %xmm1177; X64-SSE2-NEXT: movaps %xmm0, (%rsi)178; X64-SSE2-NEXT: movaps %xmm1, 16(%rsi)179; X64-SSE2-NEXT: retq180;181; X64-SSE4A-LABEL: merge_2_v4f32_align16_ntload:182; X64-SSE4A: # %bb.0:183; X64-SSE4A-NEXT: movaps (%rdi), %xmm0184; X64-SSE4A-NEXT: movaps 16(%rdi), %xmm1185; X64-SSE4A-NEXT: movaps %xmm0, (%rsi)186; X64-SSE4A-NEXT: movaps %xmm1, 16(%rsi)187; X64-SSE4A-NEXT: retq188;189; X64-SSE41-LABEL: merge_2_v4f32_align16_ntload:190; X64-SSE41: # %bb.0:191; X64-SSE41-NEXT: movntdqa (%rdi), %xmm0192; X64-SSE41-NEXT: movntdqa 16(%rdi), %xmm1193; X64-SSE41-NEXT: movdqa %xmm0, (%rsi)194; X64-SSE41-NEXT: movdqa %xmm1, 16(%rsi)195; X64-SSE41-NEXT: retq196;197; X64-AVX-LABEL: merge_2_v4f32_align16_ntload:198; X64-AVX: # %bb.0:199; X64-AVX-NEXT: vmovntdqa (%rdi), %xmm0200; X64-AVX-NEXT: vmovntdqa 16(%rdi), %xmm1201; X64-AVX-NEXT: vmovdqa %xmm0, (%rsi)202; X64-AVX-NEXT: vmovdqa %xmm1, 16(%rsi)203; X64-AVX-NEXT: retq204 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0205 %2 = load <4 x float>, ptr %a0, align 16, !nontemporal !0206 %3 = load <4 x float>, ptr %1, align 16, !nontemporal !0207 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0208 store <4 x float> %2, ptr %a1, align 16209 store <4 x float> %3, ptr %4, align 16210 ret void211}212 213; AVX can't perform NT-store-ymm on 16-byte aligned memory.214; Must be kept separate as VMOVNTPS xmm.215define void @merge_2_v4f32_align16_ntstore(ptr %a0, ptr %a1) nounwind {216; X86-LABEL: merge_2_v4f32_align16_ntstore:217; X86: # %bb.0:218; X86-NEXT: movl {{[0-9]+}}(%esp), %eax219; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx220; X86-NEXT: movaps (%ecx), %xmm0221; X86-NEXT: movaps 16(%ecx), %xmm1222; X86-NEXT: movntps %xmm0, (%eax)223; X86-NEXT: movntps %xmm1, 16(%eax)224; X86-NEXT: retl225;226; X64-SSE-LABEL: merge_2_v4f32_align16_ntstore:227; X64-SSE: # %bb.0:228; X64-SSE-NEXT: movaps (%rdi), %xmm0229; X64-SSE-NEXT: movaps 16(%rdi), %xmm1230; X64-SSE-NEXT: movntps %xmm0, (%rsi)231; X64-SSE-NEXT: movntps %xmm1, 16(%rsi)232; X64-SSE-NEXT: retq233;234; X64-AVX-LABEL: merge_2_v4f32_align16_ntstore:235; X64-AVX: # %bb.0:236; X64-AVX-NEXT: vmovaps (%rdi), %xmm0237; X64-AVX-NEXT: vmovaps 16(%rdi), %xmm1238; X64-AVX-NEXT: vmovntps %xmm0, (%rsi)239; X64-AVX-NEXT: vmovntps %xmm1, 16(%rsi)240; X64-AVX-NEXT: retq241 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0242 %2 = load <4 x float>, ptr %a0, align 16243 %3 = load <4 x float>, ptr %1, align 16244 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0245 store <4 x float> %2, ptr %a1, align 16, !nontemporal !0246 store <4 x float> %3, ptr %4, align 16, !nontemporal !0247 ret void248}249 250; Nothing can perform NT-load-vector on 1-byte aligned memory.251; Just perform regular loads.252define void @merge_2_v4f32_align1_ntload(ptr %a0, ptr %a1) nounwind {253; X86-LABEL: merge_2_v4f32_align1_ntload:254; X86: # %bb.0:255; X86-NEXT: movl {{[0-9]+}}(%esp), %eax256; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx257; X86-NEXT: movups (%ecx), %xmm0258; X86-NEXT: movups 16(%ecx), %xmm1259; X86-NEXT: movups %xmm0, (%eax)260; X86-NEXT: movups %xmm1, 16(%eax)261; X86-NEXT: retl262;263; X64-SSE-LABEL: merge_2_v4f32_align1_ntload:264; X64-SSE: # %bb.0:265; X64-SSE-NEXT: movups (%rdi), %xmm0266; X64-SSE-NEXT: movups 16(%rdi), %xmm1267; X64-SSE-NEXT: movups %xmm0, (%rsi)268; X64-SSE-NEXT: movups %xmm1, 16(%rsi)269; X64-SSE-NEXT: retq270;271; X64-AVX-LABEL: merge_2_v4f32_align1_ntload:272; X64-AVX: # %bb.0:273; X64-AVX-NEXT: vmovups (%rdi), %ymm0274; X64-AVX-NEXT: vmovups %ymm0, (%rsi)275; X64-AVX-NEXT: vzeroupper276; X64-AVX-NEXT: retq277 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0278 %2 = load <4 x float>, ptr %a0, align 1, !nontemporal !0279 %3 = load <4 x float>, ptr %1, align 1, !nontemporal !0280 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0281 store <4 x float> %2, ptr %a1, align 1282 store <4 x float> %3, ptr %4, align 1283 ret void284}285 286; Nothing can perform NT-store-vector on 1-byte aligned memory.287; Must be scalarized to use MOVTNI/MOVNTSD.288define void @merge_2_v4f32_align1_ntstore(ptr %a0, ptr %a1) nounwind {289; X86-SSE2-LABEL: merge_2_v4f32_align1_ntstore:290; X86-SSE2: # %bb.0:291; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax292; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx293; X86-SSE2-NEXT: movdqu (%ecx), %xmm1294; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm0295; X86-SSE2-NEXT: movd %xmm1, %ecx296; X86-SSE2-NEXT: movntil %ecx, (%eax)297; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]298; X86-SSE2-NEXT: movd %xmm2, %ecx299; X86-SSE2-NEXT: movntil %ecx, 12(%eax)300; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]301; X86-SSE2-NEXT: movd %xmm2, %ecx302; X86-SSE2-NEXT: movntil %ecx, 8(%eax)303; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]304; X86-SSE2-NEXT: movd %xmm1, %ecx305; X86-SSE2-NEXT: movntil %ecx, 4(%eax)306; X86-SSE2-NEXT: movd %xmm0, %ecx307; X86-SSE2-NEXT: movntil %ecx, 16(%eax)308; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]309; X86-SSE2-NEXT: movd %xmm1, %ecx310; X86-SSE2-NEXT: movntil %ecx, 28(%eax)311; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]312; X86-SSE2-NEXT: movd %xmm1, %ecx313; X86-SSE2-NEXT: movntil %ecx, 24(%eax)314; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]315; X86-SSE2-NEXT: movd %xmm0, %ecx316; X86-SSE2-NEXT: movntil %ecx, 20(%eax)317; X86-SSE2-NEXT: retl318;319; X86-SSE4A-LABEL: merge_2_v4f32_align1_ntstore:320; X86-SSE4A: # %bb.0:321; X86-SSE4A-NEXT: movl {{[0-9]+}}(%esp), %eax322; X86-SSE4A-NEXT: movl {{[0-9]+}}(%esp), %ecx323; X86-SSE4A-NEXT: movsd (%ecx), %xmm0 # xmm0 = mem[0],zero324; X86-SSE4A-NEXT: movsd 8(%ecx), %xmm1 # xmm1 = mem[0],zero325; X86-SSE4A-NEXT: movsd 16(%ecx), %xmm2 # xmm2 = mem[0],zero326; X86-SSE4A-NEXT: movsd 24(%ecx), %xmm3 # xmm3 = mem[0],zero327; X86-SSE4A-NEXT: movntsd %xmm0, (%eax)328; X86-SSE4A-NEXT: movntsd %xmm1, 8(%eax)329; X86-SSE4A-NEXT: movntsd %xmm3, 24(%eax)330; X86-SSE4A-NEXT: movntsd %xmm2, 16(%eax)331; X86-SSE4A-NEXT: retl332;333; X64-SSE2-LABEL: merge_2_v4f32_align1_ntstore:334; X64-SSE2: # %bb.0:335; X64-SSE2-NEXT: movdqu (%rdi), %xmm0336; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1337; X64-SSE2-NEXT: movq %xmm0, %rax338; X64-SSE2-NEXT: movntiq %rax, (%rsi)339; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]340; X64-SSE2-NEXT: movq %xmm0, %rax341; X64-SSE2-NEXT: movntiq %rax, 8(%rsi)342; X64-SSE2-NEXT: movq %xmm1, %rax343; X64-SSE2-NEXT: movntiq %rax, 16(%rsi)344; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]345; X64-SSE2-NEXT: movq %xmm0, %rax346; X64-SSE2-NEXT: movntiq %rax, 24(%rsi)347; X64-SSE2-NEXT: retq348;349; X64-SSE4A-LABEL: merge_2_v4f32_align1_ntstore:350; X64-SSE4A: # %bb.0:351; X64-SSE4A-NEXT: movsd (%rdi), %xmm0 # xmm0 = mem[0],zero352; X64-SSE4A-NEXT: movsd 8(%rdi), %xmm1 # xmm1 = mem[0],zero353; X64-SSE4A-NEXT: movsd 16(%rdi), %xmm2 # xmm2 = mem[0],zero354; X64-SSE4A-NEXT: movsd 24(%rdi), %xmm3 # xmm3 = mem[0],zero355; X64-SSE4A-NEXT: movntsd %xmm0, (%rsi)356; X64-SSE4A-NEXT: movntsd %xmm1, 8(%rsi)357; X64-SSE4A-NEXT: movntsd %xmm3, 24(%rsi)358; X64-SSE4A-NEXT: movntsd %xmm2, 16(%rsi)359; X64-SSE4A-NEXT: retq360;361; X64-SSE41-LABEL: merge_2_v4f32_align1_ntstore:362; X64-SSE41: # %bb.0:363; X64-SSE41-NEXT: movdqu (%rdi), %xmm0364; X64-SSE41-NEXT: movdqu 16(%rdi), %xmm1365; X64-SSE41-NEXT: pextrq $1, %xmm0, %rax366; X64-SSE41-NEXT: movntiq %rax, 8(%rsi)367; X64-SSE41-NEXT: movq %xmm0, %rax368; X64-SSE41-NEXT: movntiq %rax, (%rsi)369; X64-SSE41-NEXT: pextrq $1, %xmm1, %rax370; X64-SSE41-NEXT: movntiq %rax, 24(%rsi)371; X64-SSE41-NEXT: movq %xmm1, %rax372; X64-SSE41-NEXT: movntiq %rax, 16(%rsi)373; X64-SSE41-NEXT: retq374;375; X64-AVX-LABEL: merge_2_v4f32_align1_ntstore:376; X64-AVX: # %bb.0:377; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0378; X64-AVX-NEXT: vmovdqu 16(%rdi), %xmm1379; X64-AVX-NEXT: vpextrq $1, %xmm0, %rax380; X64-AVX-NEXT: movntiq %rax, 8(%rsi)381; X64-AVX-NEXT: vmovq %xmm0, %rax382; X64-AVX-NEXT: movntiq %rax, (%rsi)383; X64-AVX-NEXT: vpextrq $1, %xmm1, %rax384; X64-AVX-NEXT: movntiq %rax, 24(%rsi)385; X64-AVX-NEXT: vmovq %xmm1, %rax386; X64-AVX-NEXT: movntiq %rax, 16(%rsi)387; X64-AVX-NEXT: retq388 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0389 %2 = load <4 x float>, ptr %a0, align 1390 %3 = load <4 x float>, ptr %1, align 1391 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0392 store <4 x float> %2, ptr %a1, align 1, !nontemporal !0393 store <4 x float> %3, ptr %4, align 1, !nontemporal !0394 ret void395}396 397; Nothing can perform NT-load-vector on 1-byte aligned memory.398; Just perform regular loads and scalarize NT-stores.399define void @merge_2_v4f32_align1(ptr %a0, ptr %a1) nounwind {400; X86-SSE2-LABEL: merge_2_v4f32_align1:401; X86-SSE2: # %bb.0:402; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax403; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx404; X86-SSE2-NEXT: movdqu (%ecx), %xmm1405; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm0406; X86-SSE2-NEXT: movd %xmm1, %ecx407; X86-SSE2-NEXT: movntil %ecx, (%eax)408; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]409; X86-SSE2-NEXT: movd %xmm2, %ecx410; X86-SSE2-NEXT: movntil %ecx, 12(%eax)411; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]412; X86-SSE2-NEXT: movd %xmm2, %ecx413; X86-SSE2-NEXT: movntil %ecx, 8(%eax)414; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]415; X86-SSE2-NEXT: movd %xmm1, %ecx416; X86-SSE2-NEXT: movntil %ecx, 4(%eax)417; X86-SSE2-NEXT: movd %xmm0, %ecx418; X86-SSE2-NEXT: movntil %ecx, 16(%eax)419; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]420; X86-SSE2-NEXT: movd %xmm1, %ecx421; X86-SSE2-NEXT: movntil %ecx, 28(%eax)422; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]423; X86-SSE2-NEXT: movd %xmm1, %ecx424; X86-SSE2-NEXT: movntil %ecx, 24(%eax)425; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]426; X86-SSE2-NEXT: movd %xmm0, %ecx427; X86-SSE2-NEXT: movntil %ecx, 20(%eax)428; X86-SSE2-NEXT: retl429;430; X86-SSE4A-LABEL: merge_2_v4f32_align1:431; X86-SSE4A: # %bb.0:432; X86-SSE4A-NEXT: movl {{[0-9]+}}(%esp), %eax433; X86-SSE4A-NEXT: movl {{[0-9]+}}(%esp), %ecx434; X86-SSE4A-NEXT: movsd (%ecx), %xmm0 # xmm0 = mem[0],zero435; X86-SSE4A-NEXT: movsd 8(%ecx), %xmm1 # xmm1 = mem[0],zero436; X86-SSE4A-NEXT: movsd 16(%ecx), %xmm2 # xmm2 = mem[0],zero437; X86-SSE4A-NEXT: movsd 24(%ecx), %xmm3 # xmm3 = mem[0],zero438; X86-SSE4A-NEXT: movntsd %xmm0, (%eax)439; X86-SSE4A-NEXT: movntsd %xmm1, 8(%eax)440; X86-SSE4A-NEXT: movntsd %xmm3, 24(%eax)441; X86-SSE4A-NEXT: movntsd %xmm2, 16(%eax)442; X86-SSE4A-NEXT: retl443;444; X64-SSE2-LABEL: merge_2_v4f32_align1:445; X64-SSE2: # %bb.0:446; X64-SSE2-NEXT: movdqu (%rdi), %xmm0447; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1448; X64-SSE2-NEXT: movq %xmm0, %rax449; X64-SSE2-NEXT: movntiq %rax, (%rsi)450; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]451; X64-SSE2-NEXT: movq %xmm0, %rax452; X64-SSE2-NEXT: movntiq %rax, 8(%rsi)453; X64-SSE2-NEXT: movq %xmm1, %rax454; X64-SSE2-NEXT: movntiq %rax, 16(%rsi)455; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]456; X64-SSE2-NEXT: movq %xmm0, %rax457; X64-SSE2-NEXT: movntiq %rax, 24(%rsi)458; X64-SSE2-NEXT: retq459;460; X64-SSE4A-LABEL: merge_2_v4f32_align1:461; X64-SSE4A: # %bb.0:462; X64-SSE4A-NEXT: movsd (%rdi), %xmm0 # xmm0 = mem[0],zero463; X64-SSE4A-NEXT: movsd 8(%rdi), %xmm1 # xmm1 = mem[0],zero464; X64-SSE4A-NEXT: movsd 16(%rdi), %xmm2 # xmm2 = mem[0],zero465; X64-SSE4A-NEXT: movsd 24(%rdi), %xmm3 # xmm3 = mem[0],zero466; X64-SSE4A-NEXT: movntsd %xmm0, (%rsi)467; X64-SSE4A-NEXT: movntsd %xmm1, 8(%rsi)468; X64-SSE4A-NEXT: movntsd %xmm3, 24(%rsi)469; X64-SSE4A-NEXT: movntsd %xmm2, 16(%rsi)470; X64-SSE4A-NEXT: retq471;472; X64-SSE41-LABEL: merge_2_v4f32_align1:473; X64-SSE41: # %bb.0:474; X64-SSE41-NEXT: movdqu (%rdi), %xmm0475; X64-SSE41-NEXT: movdqu 16(%rdi), %xmm1476; X64-SSE41-NEXT: pextrq $1, %xmm0, %rax477; X64-SSE41-NEXT: movntiq %rax, 8(%rsi)478; X64-SSE41-NEXT: movq %xmm0, %rax479; X64-SSE41-NEXT: movntiq %rax, (%rsi)480; X64-SSE41-NEXT: pextrq $1, %xmm1, %rax481; X64-SSE41-NEXT: movntiq %rax, 24(%rsi)482; X64-SSE41-NEXT: movq %xmm1, %rax483; X64-SSE41-NEXT: movntiq %rax, 16(%rsi)484; X64-SSE41-NEXT: retq485;486; X64-AVX-LABEL: merge_2_v4f32_align1:487; X64-AVX: # %bb.0:488; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0489; X64-AVX-NEXT: vmovdqu 16(%rdi), %xmm1490; X64-AVX-NEXT: vpextrq $1, %xmm0, %rax491; X64-AVX-NEXT: movntiq %rax, 8(%rsi)492; X64-AVX-NEXT: vmovq %xmm0, %rax493; X64-AVX-NEXT: movntiq %rax, (%rsi)494; X64-AVX-NEXT: vpextrq $1, %xmm1, %rax495; X64-AVX-NEXT: movntiq %rax, 24(%rsi)496; X64-AVX-NEXT: vmovq %xmm1, %rax497; X64-AVX-NEXT: movntiq %rax, 16(%rsi)498; X64-AVX-NEXT: retq499 %1 = getelementptr inbounds <4 x float>, ptr %a0, i64 1, i64 0500 %2 = load <4 x float>, ptr %a0, align 1, !nontemporal !0501 %3 = load <4 x float>, ptr %1, align 1, !nontemporal !0502 %4 = getelementptr inbounds <4 x float>, ptr %a1, i64 1, i64 0503 store <4 x float> %2, ptr %a1, align 1, !nontemporal !0504 store <4 x float> %3, ptr %4, align 1, !nontemporal !0505 ret void506}507 508!0 = !{i32 1}509