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1; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s2;3; Verify that misched resource/latency balancy heuristics are sane.4 5define void @unrolled_mmult1(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94,6 ptr %pre95, ptr %pre96, ptr %pre97, ptr %pre98, ptr %pre99,7 ptr %pre100, ptr %pre101, ptr %pre102, ptr %pre103, ptr %pre104)8 nounwind uwtable ssp {9entry:10 br label %for.body11 12; imull folded loads should be in order, addl may be reordered to reduce total13; latency. Also check that we have no spilling.14;15; Since mmult1 IR is already in good order, this effectively ensure16; the scheduler maintains source order.17;18; CHECK-LABEL: %for.body19; CHECK-NOT: %rsp20; CHECK: imull 421; CHECK-NOT: {{imull|rsp}}22; CHECK: addl23; CHECK: imull 824; CHECK-NOT: {{imull|rsp}}25; CHECK: imull 1226; CHECK-NOT: {{imull|rsp}}27; CHECK: addl28; CHECK: addl29; CHECK: imull 1630; CHECK-NOT: {{imull|rsp}}31; CHECK: imull 2032; CHECK-NOT: {{imull|rsp}}33; CHECK: addl34; CHECK: imull 2435; CHECK-NOT: {{imull|rsp}}36; CHECK: addl37; CHECK: addl38; CHECK: imull 2839; CHECK-NOT: {{imull|rsp}}40; CHECK: imull 3241; CHECK-NOT: {{imull|rsp}}42; CHECK: addl43; CHECK: imull 3644; CHECK-NOT: {{imull|rsp}}45; CHECK: addl46; CHECK: addl47; CHECK-NOT: {{imull|rsp}}48; CHECK-LABEL: %end49for.body:50 %indvars.iv42.i = phi i64 [ %indvars.iv.next43.i, %for.body ], [ 0, %entry ]51 %tmp57 = load i32, ptr %tmp56, align 452 %arrayidx12.us.i61 = getelementptr inbounds i32, ptr %pre, i64 %indvars.iv42.i53 %tmp58 = load i32, ptr %arrayidx12.us.i61, align 454 %mul.us.i = mul nsw i32 %tmp58, %tmp5755 %arrayidx8.us.i.1 = getelementptr inbounds i32, ptr %tmp56, i64 156 %tmp59 = load i32, ptr %arrayidx8.us.i.1, align 457 %arrayidx12.us.i61.1 = getelementptr inbounds i32, ptr %pre94, i64 %indvars.iv42.i58 %tmp60 = load i32, ptr %arrayidx12.us.i61.1, align 459 %mul.us.i.1 = mul nsw i32 %tmp60, %tmp5960 %add.us.i.1 = add nsw i32 %mul.us.i.1, %mul.us.i61 %arrayidx8.us.i.2 = getelementptr inbounds i32, ptr %tmp56, i64 262 %tmp61 = load i32, ptr %arrayidx8.us.i.2, align 463 %arrayidx12.us.i61.2 = getelementptr inbounds i32, ptr %pre95, i64 %indvars.iv42.i64 %tmp62 = load i32, ptr %arrayidx12.us.i61.2, align 465 %mul.us.i.2 = mul nsw i32 %tmp62, %tmp6166 %add.us.i.2 = add nsw i32 %mul.us.i.2, %add.us.i.167 %arrayidx8.us.i.3 = getelementptr inbounds i32, ptr %tmp56, i64 368 %tmp63 = load i32, ptr %arrayidx8.us.i.3, align 469 %arrayidx12.us.i61.3 = getelementptr inbounds i32, ptr %pre96, i64 %indvars.iv42.i70 %tmp64 = load i32, ptr %arrayidx12.us.i61.3, align 471 %mul.us.i.3 = mul nsw i32 %tmp64, %tmp6372 %add.us.i.3 = add nsw i32 %mul.us.i.3, %add.us.i.273 %arrayidx8.us.i.4 = getelementptr inbounds i32, ptr %tmp56, i64 474 %tmp65 = load i32, ptr %arrayidx8.us.i.4, align 475 %arrayidx12.us.i61.4 = getelementptr inbounds i32, ptr %pre97, i64 %indvars.iv42.i76 %tmp66 = load i32, ptr %arrayidx12.us.i61.4, align 477 %mul.us.i.4 = mul nsw i32 %tmp66, %tmp6578 %add.us.i.4 = add nsw i32 %mul.us.i.4, %add.us.i.379 %arrayidx8.us.i.5 = getelementptr inbounds i32, ptr %tmp56, i64 580 %tmp67 = load i32, ptr %arrayidx8.us.i.5, align 481 %arrayidx12.us.i61.5 = getelementptr inbounds i32, ptr %pre98, i64 %indvars.iv42.i82 %tmp68 = load i32, ptr %arrayidx12.us.i61.5, align 483 %mul.us.i.5 = mul nsw i32 %tmp68, %tmp6784 %add.us.i.5 = add nsw i32 %mul.us.i.5, %add.us.i.485 %arrayidx8.us.i.6 = getelementptr inbounds i32, ptr %tmp56, i64 686 %tmp69 = load i32, ptr %arrayidx8.us.i.6, align 487 %arrayidx12.us.i61.6 = getelementptr inbounds i32, ptr %pre99, i64 %indvars.iv42.i88 %tmp70 = load i32, ptr %arrayidx12.us.i61.6, align 489 %mul.us.i.6 = mul nsw i32 %tmp70, %tmp6990 %add.us.i.6 = add nsw i32 %mul.us.i.6, %add.us.i.591 %arrayidx8.us.i.7 = getelementptr inbounds i32, ptr %tmp56, i64 792 %tmp71 = load i32, ptr %arrayidx8.us.i.7, align 493 %arrayidx12.us.i61.7 = getelementptr inbounds i32, ptr %pre100, i64 %indvars.iv42.i94 %tmp72 = load i32, ptr %arrayidx12.us.i61.7, align 495 %mul.us.i.7 = mul nsw i32 %tmp72, %tmp7196 %add.us.i.7 = add nsw i32 %mul.us.i.7, %add.us.i.697 %arrayidx8.us.i.8 = getelementptr inbounds i32, ptr %tmp56, i64 898 %tmp73 = load i32, ptr %arrayidx8.us.i.8, align 499 %arrayidx12.us.i61.8 = getelementptr inbounds i32, ptr %pre101, i64 %indvars.iv42.i100 %tmp74 = load i32, ptr %arrayidx12.us.i61.8, align 4101 %mul.us.i.8 = mul nsw i32 %tmp74, %tmp73102 %add.us.i.8 = add nsw i32 %mul.us.i.8, %add.us.i.7103 %arrayidx8.us.i.9 = getelementptr inbounds i32, ptr %tmp56, i64 9104 %tmp75 = load i32, ptr %arrayidx8.us.i.9, align 4105 %arrayidx12.us.i61.9 = getelementptr inbounds i32, ptr %pre102, i64 %indvars.iv42.i106 %tmp76 = load i32, ptr %arrayidx12.us.i61.9, align 4107 %mul.us.i.9 = mul nsw i32 %tmp76, %tmp75108 %add.us.i.9 = add nsw i32 %mul.us.i.9, %add.us.i.8109 %arrayidx16.us.i = getelementptr inbounds i32, ptr %tmp55, i64 %indvars.iv42.i110 store i32 %add.us.i.9, ptr %arrayidx16.us.i, align 4111 %indvars.iv.next43.i = add i64 %indvars.iv42.i, 1112 %lftr.wideiv = trunc i64 %indvars.iv.next43.i to i32113 %exitcond = icmp eq i32 %lftr.wideiv, 10114 br i1 %exitcond, label %end, label %for.body115 116end:117 ret void118}119 120; Unlike the above loop, this IR starts out bad and must be121; rescheduled.122;123; CHECK-LABEL: %for.body124; CHECK-NOT: %rsp125; CHECK: imull 4126; CHECK-NOT: {{imull|rsp}}127; CHECK: addl128; CHECK: imull 8129; CHECK-NOT: {{imull|rsp}}130; CHECK: imull 12131; CHECK-NOT: {{imull|rsp}}132; CHECK: addl133; CHECK: addl134; CHECK: imull 16135; CHECK-NOT: {{imull|rsp}}136; CHECK: imull 20137; CHECK-NOT: {{imull|rsp}}138; CHECK: addl139; CHECK: imull 24140; CHECK-NOT: {{imull|rsp}}141; CHECK: addl142; CHECK: addl143; CHECK: imull 28144; CHECK-NOT: {{imull|rsp}}145; CHECK: imull 32146; CHECK-NOT: {{imull|rsp}}147; CHECK: addl148; CHECK: imull 36149; CHECK-NOT: {{imull|rsp}}150; CHECK: addl151; CHECK: addl152; CHECK-NOT: {{imull|rsp}}153; CHECK-LABEL: %end154define void @unrolled_mmult2(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94,155 ptr %pre95, ptr %pre96, ptr %pre97, ptr %pre98, ptr %pre99,156 ptr %pre100, ptr %pre101, ptr %pre102, ptr %pre103, ptr %pre104)157 nounwind uwtable ssp {158entry:159 br label %for.body160for.body:161 %indvars.iv42.i = phi i64 [ %indvars.iv.next43.i, %for.body ], [ 0, %entry ]162 %tmp57 = load i32, ptr %tmp56, align 4163 %arrayidx12.us.i61 = getelementptr inbounds i32, ptr %pre, i64 %indvars.iv42.i164 %tmp58 = load i32, ptr %arrayidx12.us.i61, align 4165 %arrayidx8.us.i.1 = getelementptr inbounds i32, ptr %tmp56, i64 1166 %tmp59 = load i32, ptr %arrayidx8.us.i.1, align 4167 %arrayidx12.us.i61.1 = getelementptr inbounds i32, ptr %pre94, i64 %indvars.iv42.i168 %tmp60 = load i32, ptr %arrayidx12.us.i61.1, align 4169 %arrayidx8.us.i.2 = getelementptr inbounds i32, ptr %tmp56, i64 2170 %tmp61 = load i32, ptr %arrayidx8.us.i.2, align 4171 %arrayidx12.us.i61.2 = getelementptr inbounds i32, ptr %pre95, i64 %indvars.iv42.i172 %tmp62 = load i32, ptr %arrayidx12.us.i61.2, align 4173 %arrayidx8.us.i.3 = getelementptr inbounds i32, ptr %tmp56, i64 3174 %tmp63 = load i32, ptr %arrayidx8.us.i.3, align 4175 %arrayidx12.us.i61.3 = getelementptr inbounds i32, ptr %pre96, i64 %indvars.iv42.i176 %tmp64 = load i32, ptr %arrayidx12.us.i61.3, align 4177 %arrayidx8.us.i.4 = getelementptr inbounds i32, ptr %tmp56, i64 4178 %tmp65 = load i32, ptr %arrayidx8.us.i.4, align 4179 %arrayidx12.us.i61.4 = getelementptr inbounds i32, ptr %pre97, i64 %indvars.iv42.i180 %tmp66 = load i32, ptr %arrayidx12.us.i61.4, align 4181 %arrayidx8.us.i.5 = getelementptr inbounds i32, ptr %tmp56, i64 5182 %tmp67 = load i32, ptr %arrayidx8.us.i.5, align 4183 %arrayidx12.us.i61.5 = getelementptr inbounds i32, ptr %pre98, i64 %indvars.iv42.i184 %tmp68 = load i32, ptr %arrayidx12.us.i61.5, align 4185 %arrayidx8.us.i.6 = getelementptr inbounds i32, ptr %tmp56, i64 6186 %tmp69 = load i32, ptr %arrayidx8.us.i.6, align 4187 %arrayidx12.us.i61.6 = getelementptr inbounds i32, ptr %pre99, i64 %indvars.iv42.i188 %tmp70 = load i32, ptr %arrayidx12.us.i61.6, align 4189 %mul.us.i = mul nsw i32 %tmp58, %tmp57190 %arrayidx8.us.i.7 = getelementptr inbounds i32, ptr %tmp56, i64 7191 %tmp71 = load i32, ptr %arrayidx8.us.i.7, align 4192 %arrayidx12.us.i61.7 = getelementptr inbounds i32, ptr %pre100, i64 %indvars.iv42.i193 %tmp72 = load i32, ptr %arrayidx12.us.i61.7, align 4194 %arrayidx8.us.i.8 = getelementptr inbounds i32, ptr %tmp56, i64 8195 %tmp73 = load i32, ptr %arrayidx8.us.i.8, align 4196 %arrayidx12.us.i61.8 = getelementptr inbounds i32, ptr %pre101, i64 %indvars.iv42.i197 %tmp74 = load i32, ptr %arrayidx12.us.i61.8, align 4198 %arrayidx8.us.i.9 = getelementptr inbounds i32, ptr %tmp56, i64 9199 %tmp75 = load i32, ptr %arrayidx8.us.i.9, align 4200 %arrayidx12.us.i61.9 = getelementptr inbounds i32, ptr %pre102, i64 %indvars.iv42.i201 %tmp76 = load i32, ptr %arrayidx12.us.i61.9, align 4202 %mul.us.i.1 = mul nsw i32 %tmp60, %tmp59203 %add.us.i.1 = add nsw i32 %mul.us.i.1, %mul.us.i204 %mul.us.i.2 = mul nsw i32 %tmp62, %tmp61205 %add.us.i.2 = add nsw i32 %mul.us.i.2, %add.us.i.1206 %mul.us.i.3 = mul nsw i32 %tmp64, %tmp63207 %add.us.i.3 = add nsw i32 %mul.us.i.3, %add.us.i.2208 %mul.us.i.4 = mul nsw i32 %tmp66, %tmp65209 %add.us.i.4 = add nsw i32 %mul.us.i.4, %add.us.i.3210 %mul.us.i.5 = mul nsw i32 %tmp68, %tmp67211 %add.us.i.5 = add nsw i32 %mul.us.i.5, %add.us.i.4212 %mul.us.i.6 = mul nsw i32 %tmp70, %tmp69213 %add.us.i.6 = add nsw i32 %mul.us.i.6, %add.us.i.5214 %mul.us.i.7 = mul nsw i32 %tmp72, %tmp71215 %add.us.i.7 = add nsw i32 %mul.us.i.7, %add.us.i.6216 %mul.us.i.8 = mul nsw i32 %tmp74, %tmp73217 %add.us.i.8 = add nsw i32 %mul.us.i.8, %add.us.i.7218 %mul.us.i.9 = mul nsw i32 %tmp76, %tmp75219 %add.us.i.9 = add nsw i32 %mul.us.i.9, %add.us.i.8220 %arrayidx16.us.i = getelementptr inbounds i32, ptr %tmp55, i64 %indvars.iv42.i221 store i32 %add.us.i.9, ptr %arrayidx16.us.i, align 4222 %indvars.iv.next43.i = add i64 %indvars.iv42.i, 1223 %lftr.wideiv = trunc i64 %indvars.iv.next43.i to i32224 %exitcond = icmp eq i32 %lftr.wideiv, 10225 br i1 %exitcond, label %end, label %for.body226 227end:228 ret void229}230 231; A mildly interesting little block extracted from a cipher. The232; balanced heuristics are interesting here because we have resource,233; latency, and register limits all at once. For now, simply check that234; we don't use any callee-saves.235; CHECK-LABEL: @encpc1236; CHECK-LABEL: %entry237; CHECK-NOT: push238; CHECK-NOT: pop239; CHECK: ret240@a = external global i32, align 4241@b = external global i32, align 4242@c = external global i32, align 4243@d = external global i32, align 4244define i32 @encpc1() nounwind {245entry:246 %l1 = load i32, ptr @a, align 16247 %conv = shl i32 %l1, 8248 %s5 = lshr i32 %l1, 8249 %add = or i32 %conv, %s5250 store i32 %add, ptr @b251 %l6 = load i32, ptr @a252 %l7 = load i32, ptr @c253 %add.i = add i32 %l7, %l6254 %idxprom.i = zext i32 %l7 to i64255 %arrayidx.i = getelementptr inbounds i32, ptr @d, i64 %idxprom.i256 %l8 = load i32, ptr %arrayidx.i257 store i32 346, ptr @c258 store i32 20021, ptr @d259 %l9 = load i32, ptr @a260 store i32 %l8, ptr @a261 store i32 %l9, ptr @b262 store i32 %add.i, ptr @c263 store i32 %l9, ptr @d264 %cmp.i = icmp eq i32 %add.i, 0265 %s10 = lshr i32 %l1, 16266 %s12 = lshr i32 %l1, 24267 %s14 = lshr i32 %l1, 30268 br i1 %cmp.i, label %if, label %return269if:270 %sa = add i32 %s5, %s10271 %sb = add i32 %sa, %s12272 %sc = add i32 %sb, %s14273 br label %return274return:275 %result = phi i32 [0, %entry], [%sc, %if]276 ret i32 %result277}278