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1; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \2; RUN: -misched-prera-direction=topdown -verify-machineinstrs \3; RUN: | FileCheck %s -check-prefix=TOPDOWN4; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \5; RUN: -misched=ilpmin -verify-machineinstrs \6; RUN: | FileCheck %s -check-prefix=ILPMIN7; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \8; RUN: -misched=ilpmax -verify-machineinstrs \9; RUN: | FileCheck %s -check-prefix=ILPMAX10;11; Verify that the MI scheduler minimizes register pressure for a12; uniform set of bottom-up subtrees (unrolled matrix multiply).13;14; For current top-down heuristics, ensure that some folded imulls have15; been reordered with the stores. This tests the scheduler's cheap16; alias analysis ability (that doesn't require any AliasAnalysis pass).17;18; TOPDOWN-LABEL: %for.body19; TOPDOWN: movl %{{.*}}, (20; TOPDOWN: imull {{[0-9]*}}(21; TOPDOWN: movl %{{.*}}, 4(22; TOPDOWN: imull {{[0-9]*}}(23; TOPDOWN: movl %{{.*}}, 8(24; TOPDOWN: movl %{{.*}}, 12(25; TOPDOWN-LABEL: %for.end26;27; For -misched=ilpmin, verify that each expression subtree is28; scheduled independently, and that the imull/adds are interleaved.29;30; ILPMIN-LABEL: %for.body31; ILPMIN: movl %{{.*}}, (32; ILPMIN: imull33; ILPMIN: imull34; ILPMIN: addl35; ILPMIN: imull36; ILPMIN: imull37; ILPMIN: addl38; ILPMIN: addl39; ILPMIN: movl %{{.*}}, 4(40; ILPMIN: imull41; ILPMIN: imull42; ILPMIN: addl43; ILPMIN: imull44; ILPMIN: imull45; ILPMIN: addl46; ILPMIN: addl47; ILPMIN: movl %{{.*}}, 8(48; ILPMIN: imull49; ILPMIN: imull50; ILPMIN: addl51; ILPMIN: imull52; ILPMIN: imull53; ILPMIN: addl54; ILPMIN: addl55; ILPMIN: movl %{{.*}}, 12(56; ILPMIN-LABEL: %for.end57;58; For -misched=ilpmax, verify that each expression subtree is59; scheduled independently, and that the imull/adds are clustered.60;61; ILPMAX-LABEL: %for.body62; ILPMAX: movl %{{.*}}, (63; ILPMAX: imull64; ILPMAX: imull65; ILPMAX: imull66; ILPMAX: imull67; ILPMAX: addl68; ILPMAX: addl69; ILPMAX: addl70; ILPMAX: movl %{{.*}}, 4(71; ILPMAX: imull72; ILPMAX: imull73; ILPMAX: imull74; ILPMAX: imull75; ILPMAX: addl76; ILPMAX: addl77; ILPMAX: addl78; ILPMAX: movl %{{.*}}, 8(79; ILPMAX: imull80; ILPMAX: imull81; ILPMAX: imull82; ILPMAX: imull83; ILPMAX: addl84; ILPMAX: addl85; ILPMAX: addl86; ILPMAX: movl %{{.*}}, 12(87; ILPMAX-LABEL: %for.end88 89define void @mmult(ptr noalias nocapture %m1, ptr noalias nocapture %m2,90ptr noalias nocapture %m3) nounwind uwtable ssp {91entry:92 br label %for.body93 94for.body: ; preds = %for.body, %entry95 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]96 %arrayidx8 = getelementptr inbounds [4 x i32], ptr %m1, i64 %indvars.iv, i64 097 %tmp = load i32, ptr %arrayidx8, align 498 %tmp1 = load i32, ptr %m2, align 499 %arrayidx8.1 = getelementptr inbounds [4 x i32], ptr %m1, i64 %indvars.iv, i64 1100 %tmp2 = load i32, ptr %arrayidx8.1, align 4101 %arrayidx12.1 = getelementptr inbounds [4 x i32], ptr %m2, i64 1, i64 0102 %tmp3 = load i32, ptr %arrayidx12.1, align 4103 %arrayidx8.2 = getelementptr inbounds [4 x i32], ptr %m1, i64 %indvars.iv, i64 2104 %tmp4 = load i32, ptr %arrayidx8.2, align 4105 %arrayidx12.2 = getelementptr inbounds [4 x i32], ptr %m2, i64 2, i64 0106 %tmp5 = load i32, ptr %arrayidx12.2, align 4107 %arrayidx8.3 = getelementptr inbounds [4 x i32], ptr %m1, i64 %indvars.iv, i64 3108 %tmp6 = load i32, ptr %arrayidx8.3, align 4109 %arrayidx12.3 = getelementptr inbounds [4 x i32], ptr %m2, i64 3, i64 0110 %tmp8 = load i32, ptr %arrayidx8, align 4111 %arrayidx12.137 = getelementptr inbounds [4 x i32], ptr %m2, i64 0, i64 1112 %tmp9 = load i32, ptr %arrayidx12.137, align 4113 %tmp10 = load i32, ptr %arrayidx8.1, align 4114 %arrayidx12.1.1 = getelementptr inbounds [4 x i32], ptr %m2, i64 1, i64 1115 %tmp11 = load i32, ptr %arrayidx12.1.1, align 4116 %tmp12 = load i32, ptr %arrayidx8.2, align 4117 %arrayidx12.2.1 = getelementptr inbounds [4 x i32], ptr %m2, i64 2, i64 1118 %tmp13 = load i32, ptr %arrayidx12.2.1, align 4119 %tmp14 = load i32, ptr %arrayidx8.3, align 4120 %arrayidx12.3.1 = getelementptr inbounds [4 x i32], ptr %m2, i64 3, i64 1121 %tmp15 = load i32, ptr %arrayidx12.3.1, align 4122 %tmp16 = load i32, ptr %arrayidx8, align 4123 %arrayidx12.239 = getelementptr inbounds [4 x i32], ptr %m2, i64 0, i64 2124 %tmp17 = load i32, ptr %arrayidx12.239, align 4125 %tmp18 = load i32, ptr %arrayidx8.1, align 4126 %arrayidx12.1.2 = getelementptr inbounds [4 x i32], ptr %m2, i64 1, i64 2127 %tmp19 = load i32, ptr %arrayidx12.1.2, align 4128 %tmp20 = load i32, ptr %arrayidx8.2, align 4129 %arrayidx12.2.2 = getelementptr inbounds [4 x i32], ptr %m2, i64 2, i64 2130 %tmp21 = load i32, ptr %arrayidx12.2.2, align 4131 %tmp22 = load i32, ptr %arrayidx8.3, align 4132 %arrayidx12.3.2 = getelementptr inbounds [4 x i32], ptr %m2, i64 3, i64 2133 %tmp23 = load i32, ptr %arrayidx12.3.2, align 4134 %tmp24 = load i32, ptr %arrayidx8, align 4135 %arrayidx12.341 = getelementptr inbounds [4 x i32], ptr %m2, i64 0, i64 3136 %tmp25 = load i32, ptr %arrayidx12.341, align 4137 %tmp26 = load i32, ptr %arrayidx8.1, align 4138 %arrayidx12.1.3 = getelementptr inbounds [4 x i32], ptr %m2, i64 1, i64 3139 %tmp27 = load i32, ptr %arrayidx12.1.3, align 4140 %tmp28 = load i32, ptr %arrayidx8.2, align 4141 %arrayidx12.2.3 = getelementptr inbounds [4 x i32], ptr %m2, i64 2, i64 3142 %tmp29 = load i32, ptr %arrayidx12.2.3, align 4143 %tmp30 = load i32, ptr %arrayidx8.3, align 4144 %arrayidx12.3.3 = getelementptr inbounds [4 x i32], ptr %m2, i64 3, i64 3145 %tmp31 = load i32, ptr %arrayidx12.3.3, align 4146 %tmp7 = load i32, ptr %arrayidx12.3, align 4147 %mul = mul nsw i32 %tmp1, %tmp148 %mul.1 = mul nsw i32 %tmp3, %tmp2149 %mul.2 = mul nsw i32 %tmp5, %tmp4150 %mul.3 = mul nsw i32 %tmp7, %tmp6151 %mul.138 = mul nsw i32 %tmp9, %tmp8152 %mul.1.1 = mul nsw i32 %tmp11, %tmp10153 %mul.2.1 = mul nsw i32 %tmp13, %tmp12154 %mul.3.1 = mul nsw i32 %tmp15, %tmp14155 %mul.240 = mul nsw i32 %tmp17, %tmp16156 %mul.1.2 = mul nsw i32 %tmp19, %tmp18157 %mul.2.2 = mul nsw i32 %tmp21, %tmp20158 %mul.3.2 = mul nsw i32 %tmp23, %tmp22159 %mul.342 = mul nsw i32 %tmp25, %tmp24160 %mul.1.3 = mul nsw i32 %tmp27, %tmp26161 %mul.2.3 = mul nsw i32 %tmp29, %tmp28162 %mul.3.3 = mul nsw i32 %tmp31, %tmp30163 %add.1 = add nsw i32 %mul.1, %mul164 %add.2 = add nsw i32 %mul.2, %add.1165 %add.3 = add nsw i32 %mul.3, %add.2166 %add.1.1 = add nsw i32 %mul.1.1, %mul.138167 %add.2.1 = add nsw i32 %mul.2.1, %add.1.1168 %add.3.1 = add nsw i32 %mul.3.1, %add.2.1169 %add.1.2 = add nsw i32 %mul.1.2, %mul.240170 %add.2.2 = add nsw i32 %mul.2.2, %add.1.2171 %add.3.2 = add nsw i32 %mul.3.2, %add.2.2172 %add.1.3 = add nsw i32 %mul.1.3, %mul.342173 %add.2.3 = add nsw i32 %mul.2.3, %add.1.3174 %add.3.3 = add nsw i32 %mul.3.3, %add.2.3175 %arrayidx16 = getelementptr inbounds [4 x i32], ptr %m3, i64 %indvars.iv, i64 0176 store i32 %add.3, ptr %arrayidx16, align 4177 %arrayidx16.1 = getelementptr inbounds [4 x i32], ptr %m3, i64 %indvars.iv, i64 1178 store i32 %add.3.1, ptr %arrayidx16.1, align 4179 %arrayidx16.2 = getelementptr inbounds [4 x i32], ptr %m3, i64 %indvars.iv, i64 2180 store i32 %add.3.2, ptr %arrayidx16.2, align 4181 %arrayidx16.3 = getelementptr inbounds [4 x i32], ptr %m3, i64 %indvars.iv, i64 3182 store i32 %add.3.3, ptr %arrayidx16.3, align 4183 %indvars.iv.next = add i64 %indvars.iv, 1184 %lftr.wideiv = trunc i64 %indvars.iv.next to i32185 %exitcond = icmp eq i32 %lftr.wideiv, 4186 br i1 %exitcond, label %for.end, label %for.body187 188for.end: ; preds = %for.body189 ret void190}191