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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X644 5define i64 @t0(ptr %a, ptr %b) nounwind {6; X86-LABEL: t0:7; X86: # %bb.0: # %entry8; X86-NEXT: pushl %ebp9; X86-NEXT: movl %esp, %ebp10; X86-NEXT: andl $-8, %esp11; X86-NEXT: subl $8, %esp12; X86-NEXT: movl 12(%ebp), %eax13; X86-NEXT: movl 8(%ebp), %ecx14; X86-NEXT: movq (%ecx), %mm015; X86-NEXT: movd (%eax), %mm116; X86-NEXT: psllq %mm1, %mm017; X86-NEXT: movq %mm0, (%esp)18; X86-NEXT: movl (%esp), %eax19; X86-NEXT: movl {{[0-9]+}}(%esp), %edx20; X86-NEXT: movl %ebp, %esp21; X86-NEXT: popl %ebp22; X86-NEXT: retl23;24; X64-LABEL: t0:25; X64: # %bb.0: # %entry26; X64-NEXT: movq (%rdi), %mm027; X64-NEXT: movd (%rsi), %mm128; X64-NEXT: psllq %mm1, %mm029; X64-NEXT: movq %mm0, %rax30; X64-NEXT: retq31entry:32 %0 = load <1 x i64>, ptr %a, align 833 %1 = load i32, ptr %b, align 434 %2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %0, i32 %1)35 %3 = bitcast <1 x i64> %2 to i6436 ret i64 %337}38declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32)39 40define i64 @t1(ptr %a, ptr %b) nounwind {41; X86-LABEL: t1:42; X86: # %bb.0: # %entry43; X86-NEXT: pushl %ebp44; X86-NEXT: movl %esp, %ebp45; X86-NEXT: andl $-8, %esp46; X86-NEXT: subl $8, %esp47; X86-NEXT: movl 12(%ebp), %eax48; X86-NEXT: movl 8(%ebp), %ecx49; X86-NEXT: movq (%ecx), %mm050; X86-NEXT: movd (%eax), %mm151; X86-NEXT: psrlq %mm1, %mm052; X86-NEXT: movq %mm0, (%esp)53; X86-NEXT: movl (%esp), %eax54; X86-NEXT: movl {{[0-9]+}}(%esp), %edx55; X86-NEXT: movl %ebp, %esp56; X86-NEXT: popl %ebp57; X86-NEXT: retl58;59; X64-LABEL: t1:60; X64: # %bb.0: # %entry61; X64-NEXT: movq (%rdi), %mm062; X64-NEXT: movd (%rsi), %mm163; X64-NEXT: psrlq %mm1, %mm064; X64-NEXT: movq %mm0, %rax65; X64-NEXT: retq66entry:67 %0 = load <1 x i64>, ptr %a, align 868 %1 = load i32, ptr %b, align 469 %2 = tail call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %0, i32 %1)70 %3 = bitcast <1 x i64> %2 to i6471 ret i64 %372}73declare <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64>, i32)74 75define i64 @t2(ptr %a, ptr %b) nounwind {76; X86-LABEL: t2:77; X86: # %bb.0: # %entry78; X86-NEXT: pushl %ebp79; X86-NEXT: movl %esp, %ebp80; X86-NEXT: andl $-8, %esp81; X86-NEXT: subl $8, %esp82; X86-NEXT: movl 12(%ebp), %eax83; X86-NEXT: movl 8(%ebp), %ecx84; X86-NEXT: movq (%ecx), %mm085; X86-NEXT: movd (%eax), %mm186; X86-NEXT: psllw %mm1, %mm087; X86-NEXT: movq %mm0, (%esp)88; X86-NEXT: movl (%esp), %eax89; X86-NEXT: movl {{[0-9]+}}(%esp), %edx90; X86-NEXT: movl %ebp, %esp91; X86-NEXT: popl %ebp92; X86-NEXT: retl93;94; X64-LABEL: t2:95; X64: # %bb.0: # %entry96; X64-NEXT: movq (%rdi), %mm097; X64-NEXT: movd (%rsi), %mm198; X64-NEXT: psllw %mm1, %mm099; X64-NEXT: movq %mm0, %rax100; X64-NEXT: retq101entry:102 %0 = load <1 x i64>, ptr %a, align 8103 %1 = load i32, ptr %b, align 4104 %2 = tail call <1 x i64> @llvm.x86.mmx.pslli.w(<1 x i64> %0, i32 %1)105 %3 = bitcast <1 x i64> %2 to i64106 ret i64 %3107}108declare <1 x i64> @llvm.x86.mmx.pslli.w(<1 x i64>, i32)109 110define i64 @t3(ptr %a, ptr %b) nounwind {111; X86-LABEL: t3:112; X86: # %bb.0: # %entry113; X86-NEXT: pushl %ebp114; X86-NEXT: movl %esp, %ebp115; X86-NEXT: andl $-8, %esp116; X86-NEXT: subl $8, %esp117; X86-NEXT: movl 12(%ebp), %eax118; X86-NEXT: movl 8(%ebp), %ecx119; X86-NEXT: movq (%ecx), %mm0120; X86-NEXT: movd (%eax), %mm1121; X86-NEXT: psrlw %mm1, %mm0122; X86-NEXT: movq %mm0, (%esp)123; X86-NEXT: movl (%esp), %eax124; X86-NEXT: movl {{[0-9]+}}(%esp), %edx125; X86-NEXT: movl %ebp, %esp126; X86-NEXT: popl %ebp127; X86-NEXT: retl128;129; X64-LABEL: t3:130; X64: # %bb.0: # %entry131; X64-NEXT: movq (%rdi), %mm0132; X64-NEXT: movd (%rsi), %mm1133; X64-NEXT: psrlw %mm1, %mm0134; X64-NEXT: movq %mm0, %rax135; X64-NEXT: retq136entry:137 %0 = load <1 x i64>, ptr %a, align 8138 %1 = load i32, ptr %b, align 4139 %2 = tail call <1 x i64> @llvm.x86.mmx.psrli.w(<1 x i64> %0, i32 %1)140 %3 = bitcast <1 x i64> %2 to i64141 ret i64 %3142}143declare <1 x i64> @llvm.x86.mmx.psrli.w(<1 x i64>, i32)144 145define i64 @t4(ptr %a, ptr %b) nounwind {146; X86-LABEL: t4:147; X86: # %bb.0: # %entry148; X86-NEXT: pushl %ebp149; X86-NEXT: movl %esp, %ebp150; X86-NEXT: andl $-8, %esp151; X86-NEXT: subl $8, %esp152; X86-NEXT: movl 12(%ebp), %eax153; X86-NEXT: movl 8(%ebp), %ecx154; X86-NEXT: movq (%ecx), %mm0155; X86-NEXT: movd (%eax), %mm1156; X86-NEXT: pslld %mm1, %mm0157; X86-NEXT: movq %mm0, (%esp)158; X86-NEXT: movl (%esp), %eax159; X86-NEXT: movl {{[0-9]+}}(%esp), %edx160; X86-NEXT: movl %ebp, %esp161; X86-NEXT: popl %ebp162; X86-NEXT: retl163;164; X64-LABEL: t4:165; X64: # %bb.0: # %entry166; X64-NEXT: movq (%rdi), %mm0167; X64-NEXT: movd (%rsi), %mm1168; X64-NEXT: pslld %mm1, %mm0169; X64-NEXT: movq %mm0, %rax170; X64-NEXT: retq171entry:172 %0 = load <1 x i64>, ptr %a, align 8173 %1 = load i32, ptr %b, align 4174 %2 = tail call <1 x i64> @llvm.x86.mmx.pslli.d(<1 x i64> %0, i32 %1)175 %3 = bitcast <1 x i64> %2 to i64176 ret i64 %3177}178declare <1 x i64> @llvm.x86.mmx.pslli.d(<1 x i64>, i32)179 180define i64 @t5(ptr %a, ptr %b) nounwind {181; X86-LABEL: t5:182; X86: # %bb.0: # %entry183; X86-NEXT: pushl %ebp184; X86-NEXT: movl %esp, %ebp185; X86-NEXT: andl $-8, %esp186; X86-NEXT: subl $8, %esp187; X86-NEXT: movl 12(%ebp), %eax188; X86-NEXT: movl 8(%ebp), %ecx189; X86-NEXT: movq (%ecx), %mm0190; X86-NEXT: movd (%eax), %mm1191; X86-NEXT: psrld %mm1, %mm0192; X86-NEXT: movq %mm0, (%esp)193; X86-NEXT: movl (%esp), %eax194; X86-NEXT: movl {{[0-9]+}}(%esp), %edx195; X86-NEXT: movl %ebp, %esp196; X86-NEXT: popl %ebp197; X86-NEXT: retl198;199; X64-LABEL: t5:200; X64: # %bb.0: # %entry201; X64-NEXT: movq (%rdi), %mm0202; X64-NEXT: movd (%rsi), %mm1203; X64-NEXT: psrld %mm1, %mm0204; X64-NEXT: movq %mm0, %rax205; X64-NEXT: retq206entry:207 %0 = load <1 x i64>, ptr %a, align 8208 %1 = load i32, ptr %b, align 4209 %2 = tail call <1 x i64> @llvm.x86.mmx.psrli.d(<1 x i64> %0, i32 %1)210 %3 = bitcast <1 x i64> %2 to i64211 ret i64 %3212}213declare <1 x i64> @llvm.x86.mmx.psrli.d(<1 x i64>, i32)214 215define i64 @t6(ptr %a, ptr %b) nounwind {216; X86-LABEL: t6:217; X86: # %bb.0: # %entry218; X86-NEXT: pushl %ebp219; X86-NEXT: movl %esp, %ebp220; X86-NEXT: andl $-8, %esp221; X86-NEXT: subl $8, %esp222; X86-NEXT: movl 12(%ebp), %eax223; X86-NEXT: movl 8(%ebp), %ecx224; X86-NEXT: movq (%ecx), %mm0225; X86-NEXT: movd (%eax), %mm1226; X86-NEXT: psraw %mm1, %mm0227; X86-NEXT: movq %mm0, (%esp)228; X86-NEXT: movl (%esp), %eax229; X86-NEXT: movl {{[0-9]+}}(%esp), %edx230; X86-NEXT: movl %ebp, %esp231; X86-NEXT: popl %ebp232; X86-NEXT: retl233;234; X64-LABEL: t6:235; X64: # %bb.0: # %entry236; X64-NEXT: movq (%rdi), %mm0237; X64-NEXT: movd (%rsi), %mm1238; X64-NEXT: psraw %mm1, %mm0239; X64-NEXT: movq %mm0, %rax240; X64-NEXT: retq241entry:242 %0 = load <1 x i64>, ptr %a, align 8243 %1 = load i32, ptr %b, align 4244 %2 = tail call <1 x i64> @llvm.x86.mmx.psrai.w(<1 x i64> %0, i32 %1)245 %3 = bitcast <1 x i64> %2 to i64246 ret i64 %3247}248declare <1 x i64> @llvm.x86.mmx.psrai.w(<1 x i64>, i32)249 250define i64 @t7(ptr %a, ptr %b) nounwind {251; X86-LABEL: t7:252; X86: # %bb.0: # %entry253; X86-NEXT: pushl %ebp254; X86-NEXT: movl %esp, %ebp255; X86-NEXT: andl $-8, %esp256; X86-NEXT: subl $8, %esp257; X86-NEXT: movl 12(%ebp), %eax258; X86-NEXT: movl 8(%ebp), %ecx259; X86-NEXT: movq (%ecx), %mm0260; X86-NEXT: movd (%eax), %mm1261; X86-NEXT: psrad %mm1, %mm0262; X86-NEXT: movq %mm0, (%esp)263; X86-NEXT: movl (%esp), %eax264; X86-NEXT: movl {{[0-9]+}}(%esp), %edx265; X86-NEXT: movl %ebp, %esp266; X86-NEXT: popl %ebp267; X86-NEXT: retl268;269; X64-LABEL: t7:270; X64: # %bb.0: # %entry271; X64-NEXT: movq (%rdi), %mm0272; X64-NEXT: movd (%rsi), %mm1273; X64-NEXT: psrad %mm1, %mm0274; X64-NEXT: movq %mm0, %rax275; X64-NEXT: retq276entry:277 %0 = load <1 x i64>, ptr %a, align 8278 %1 = load i32, ptr %b, align 4279 %2 = tail call <1 x i64> @llvm.x86.mmx.psrai.d(<1 x i64> %0, i32 %1)280 %3 = bitcast <1 x i64> %2 to i64281 ret i64 %3282}283declare <1 x i64> @llvm.x86.mmx.psrai.d(<1 x i64>, i32)284 285define i64 @tt0(<1 x i64> %t, ptr %q) nounwind {286; X86-LABEL: tt0:287; X86: # %bb.0: # %entry288; X86-NEXT: pushl %ebp289; X86-NEXT: movl %esp, %ebp290; X86-NEXT: andl $-8, %esp291; X86-NEXT: subl $16, %esp292; X86-NEXT: movl 8(%ebp), %eax293; X86-NEXT: movl 12(%ebp), %ecx294; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)295; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)296; X86-NEXT: movl 16(%ebp), %eax297; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0298; X86-NEXT: paddb (%eax), %mm0299; X86-NEXT: movq %mm0, (%esp)300; X86-NEXT: movl (%esp), %eax301; X86-NEXT: movl {{[0-9]+}}(%esp), %edx302; X86-NEXT: emms303; X86-NEXT: movl %ebp, %esp304; X86-NEXT: popl %ebp305; X86-NEXT: retl306;307; X64-LABEL: tt0:308; X64: # %bb.0: # %entry309; X64-NEXT: movq %rdi, %mm0310; X64-NEXT: paddb (%rsi), %mm0311; X64-NEXT: movq %mm0, %rax312; X64-NEXT: emms313; X64-NEXT: retq314entry:315 %v = load <1 x i64>, ptr %q316 %u = tail call <1 x i64> @llvm.x86.mmx.padd.b(<1 x i64> %t, <1 x i64> %v)317 %s = bitcast <1 x i64> %u to i64318 call void @llvm.x86.mmx.emms()319 ret i64 %s320}321declare <1 x i64> @llvm.x86.mmx.padd.b(<1 x i64>, <1 x i64>)322declare void @llvm.x86.mmx.emms()323 324define i64 @tt1(<1 x i64> %t, ptr %q) nounwind {325; X86-LABEL: tt1:326; X86: # %bb.0: # %entry327; X86-NEXT: pushl %ebp328; X86-NEXT: movl %esp, %ebp329; X86-NEXT: andl $-8, %esp330; X86-NEXT: subl $16, %esp331; X86-NEXT: movl 8(%ebp), %eax332; X86-NEXT: movl 12(%ebp), %ecx333; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)334; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)335; X86-NEXT: movl 16(%ebp), %eax336; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0337; X86-NEXT: paddw (%eax), %mm0338; X86-NEXT: movq %mm0, (%esp)339; X86-NEXT: movl (%esp), %eax340; X86-NEXT: movl {{[0-9]+}}(%esp), %edx341; X86-NEXT: emms342; X86-NEXT: movl %ebp, %esp343; X86-NEXT: popl %ebp344; X86-NEXT: retl345;346; X64-LABEL: tt1:347; X64: # %bb.0: # %entry348; X64-NEXT: movq %rdi, %mm0349; X64-NEXT: paddw (%rsi), %mm0350; X64-NEXT: movq %mm0, %rax351; X64-NEXT: emms352; X64-NEXT: retq353entry:354 %v = load <1 x i64>, ptr %q355 %u = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %t, <1 x i64> %v)356 %s = bitcast <1 x i64> %u to i64357 call void @llvm.x86.mmx.emms()358 ret i64 %s359}360declare <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64>, <1 x i64>)361 362define i64 @tt2(<1 x i64> %t, ptr %q) nounwind {363; X86-LABEL: tt2:364; X86: # %bb.0: # %entry365; X86-NEXT: pushl %ebp366; X86-NEXT: movl %esp, %ebp367; X86-NEXT: andl $-8, %esp368; X86-NEXT: subl $16, %esp369; X86-NEXT: movl 8(%ebp), %eax370; X86-NEXT: movl 12(%ebp), %ecx371; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)372; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)373; X86-NEXT: movl 16(%ebp), %eax374; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0375; X86-NEXT: paddd (%eax), %mm0376; X86-NEXT: movq %mm0, (%esp)377; X86-NEXT: movl (%esp), %eax378; X86-NEXT: movl {{[0-9]+}}(%esp), %edx379; X86-NEXT: emms380; X86-NEXT: movl %ebp, %esp381; X86-NEXT: popl %ebp382; X86-NEXT: retl383;384; X64-LABEL: tt2:385; X64: # %bb.0: # %entry386; X64-NEXT: movq %rdi, %mm0387; X64-NEXT: paddd (%rsi), %mm0388; X64-NEXT: movq %mm0, %rax389; X64-NEXT: emms390; X64-NEXT: retq391entry:392 %v = load <1 x i64>, ptr %q393 %u = tail call <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64> %t, <1 x i64> %v)394 %s = bitcast <1 x i64> %u to i64395 call void @llvm.x86.mmx.emms()396 ret i64 %s397}398declare <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64>, <1 x i64>)399 400define i64 @tt3(<1 x i64> %t, ptr %q) nounwind {401; X86-LABEL: tt3:402; X86: # %bb.0: # %entry403; X86-NEXT: pushl %ebp404; X86-NEXT: movl %esp, %ebp405; X86-NEXT: andl $-8, %esp406; X86-NEXT: subl $16, %esp407; X86-NEXT: movl 8(%ebp), %eax408; X86-NEXT: movl 12(%ebp), %ecx409; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)410; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)411; X86-NEXT: movl 16(%ebp), %eax412; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0413; X86-NEXT: paddq (%eax), %mm0414; X86-NEXT: movq %mm0, (%esp)415; X86-NEXT: movl (%esp), %eax416; X86-NEXT: movl {{[0-9]+}}(%esp), %edx417; X86-NEXT: emms418; X86-NEXT: movl %ebp, %esp419; X86-NEXT: popl %ebp420; X86-NEXT: retl421;422; X64-LABEL: tt3:423; X64: # %bb.0: # %entry424; X64-NEXT: movq %rdi, %mm0425; X64-NEXT: paddq (%rsi), %mm0426; X64-NEXT: movq %mm0, %rax427; X64-NEXT: emms428; X64-NEXT: retq429entry:430 %v = load <1 x i64>, ptr %q431 %u = tail call <1 x i64> @llvm.x86.mmx.padd.q(<1 x i64> %t, <1 x i64> %v)432 %s = bitcast <1 x i64> %u to i64433 call void @llvm.x86.mmx.emms()434 ret i64 %s435}436declare <1 x i64> @llvm.x86.mmx.padd.q(<1 x i64>, <1 x i64>)437 438define i64 @tt4(<1 x i64> %t, ptr %q) nounwind {439; X86-LABEL: tt4:440; X86: # %bb.0: # %entry441; X86-NEXT: pushl %ebp442; X86-NEXT: movl %esp, %ebp443; X86-NEXT: andl $-8, %esp444; X86-NEXT: subl $16, %esp445; X86-NEXT: movl 8(%ebp), %eax446; X86-NEXT: movl 12(%ebp), %ecx447; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)448; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)449; X86-NEXT: movl 16(%ebp), %eax450; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0451; X86-NEXT: paddusb (%eax), %mm0452; X86-NEXT: movq %mm0, (%esp)453; X86-NEXT: movl (%esp), %eax454; X86-NEXT: movl {{[0-9]+}}(%esp), %edx455; X86-NEXT: emms456; X86-NEXT: movl %ebp, %esp457; X86-NEXT: popl %ebp458; X86-NEXT: retl459;460; X64-LABEL: tt4:461; X64: # %bb.0: # %entry462; X64-NEXT: movq %rdi, %mm0463; X64-NEXT: paddusb (%rsi), %mm0464; X64-NEXT: movq %mm0, %rax465; X64-NEXT: emms466; X64-NEXT: retq467entry:468 %v = load <1 x i64>, ptr %q469 %u = tail call <1 x i64> @llvm.x86.mmx.paddus.b(<1 x i64> %t, <1 x i64> %v)470 %s = bitcast <1 x i64> %u to i64471 call void @llvm.x86.mmx.emms()472 ret i64 %s473}474declare <1 x i64> @llvm.x86.mmx.paddus.b(<1 x i64>, <1 x i64>)475 476define i64 @tt5(<1 x i64> %t, ptr %q) nounwind {477; X86-LABEL: tt5:478; X86: # %bb.0: # %entry479; X86-NEXT: pushl %ebp480; X86-NEXT: movl %esp, %ebp481; X86-NEXT: andl $-8, %esp482; X86-NEXT: subl $16, %esp483; X86-NEXT: movl 8(%ebp), %eax484; X86-NEXT: movl 12(%ebp), %ecx485; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)486; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)487; X86-NEXT: movl 16(%ebp), %eax488; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0489; X86-NEXT: paddusw (%eax), %mm0490; X86-NEXT: movq %mm0, (%esp)491; X86-NEXT: movl (%esp), %eax492; X86-NEXT: movl {{[0-9]+}}(%esp), %edx493; X86-NEXT: emms494; X86-NEXT: movl %ebp, %esp495; X86-NEXT: popl %ebp496; X86-NEXT: retl497;498; X64-LABEL: tt5:499; X64: # %bb.0: # %entry500; X64-NEXT: movq %rdi, %mm0501; X64-NEXT: paddusw (%rsi), %mm0502; X64-NEXT: movq %mm0, %rax503; X64-NEXT: emms504; X64-NEXT: retq505entry:506 %v = load <1 x i64>, ptr %q507 %u = tail call <1 x i64> @llvm.x86.mmx.paddus.w(<1 x i64> %t, <1 x i64> %v)508 %s = bitcast <1 x i64> %u to i64509 call void @llvm.x86.mmx.emms()510 ret i64 %s511}512declare <1 x i64> @llvm.x86.mmx.paddus.w(<1 x i64>, <1 x i64>)513 514define i64 @tt6(<1 x i64> %t, ptr %q) nounwind {515; X86-LABEL: tt6:516; X86: # %bb.0: # %entry517; X86-NEXT: pushl %ebp518; X86-NEXT: movl %esp, %ebp519; X86-NEXT: andl $-8, %esp520; X86-NEXT: subl $16, %esp521; X86-NEXT: movl 8(%ebp), %eax522; X86-NEXT: movl 12(%ebp), %ecx523; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)524; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)525; X86-NEXT: movl 16(%ebp), %eax526; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0527; X86-NEXT: psrlw (%eax), %mm0528; X86-NEXT: movq %mm0, (%esp)529; X86-NEXT: movl (%esp), %eax530; X86-NEXT: movl {{[0-9]+}}(%esp), %edx531; X86-NEXT: emms532; X86-NEXT: movl %ebp, %esp533; X86-NEXT: popl %ebp534; X86-NEXT: retl535;536; X64-LABEL: tt6:537; X64: # %bb.0: # %entry538; X64-NEXT: movq %rdi, %mm0539; X64-NEXT: psrlw (%rsi), %mm0540; X64-NEXT: movq %mm0, %rax541; X64-NEXT: emms542; X64-NEXT: retq543entry:544 %v = load <1 x i64>, ptr %q545 %u = tail call <1 x i64> @llvm.x86.mmx.psrl.w(<1 x i64> %t, <1 x i64> %v)546 %s = bitcast <1 x i64> %u to i64547 call void @llvm.x86.mmx.emms()548 ret i64 %s549}550declare <1 x i64> @llvm.x86.mmx.psrl.w(<1 x i64>, <1 x i64>)551 552define i64 @tt7(<1 x i64> %t, ptr %q) nounwind {553; X86-LABEL: tt7:554; X86: # %bb.0: # %entry555; X86-NEXT: pushl %ebp556; X86-NEXT: movl %esp, %ebp557; X86-NEXT: andl $-8, %esp558; X86-NEXT: subl $16, %esp559; X86-NEXT: movl 8(%ebp), %eax560; X86-NEXT: movl 12(%ebp), %ecx561; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)562; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)563; X86-NEXT: movl 16(%ebp), %eax564; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0565; X86-NEXT: psrld (%eax), %mm0566; X86-NEXT: movq %mm0, (%esp)567; X86-NEXT: movl (%esp), %eax568; X86-NEXT: movl {{[0-9]+}}(%esp), %edx569; X86-NEXT: emms570; X86-NEXT: movl %ebp, %esp571; X86-NEXT: popl %ebp572; X86-NEXT: retl573;574; X64-LABEL: tt7:575; X64: # %bb.0: # %entry576; X64-NEXT: movq %rdi, %mm0577; X64-NEXT: psrld (%rsi), %mm0578; X64-NEXT: movq %mm0, %rax579; X64-NEXT: emms580; X64-NEXT: retq581entry:582 %v = load <1 x i64>, ptr %q583 %u = tail call <1 x i64> @llvm.x86.mmx.psrl.d(<1 x i64> %t, <1 x i64> %v)584 %s = bitcast <1 x i64> %u to i64585 call void @llvm.x86.mmx.emms()586 ret i64 %s587}588declare <1 x i64> @llvm.x86.mmx.psrl.d(<1 x i64>, <1 x i64>)589 590define i64 @tt8(<1 x i64> %t, ptr %q) nounwind {591; X86-LABEL: tt8:592; X86: # %bb.0: # %entry593; X86-NEXT: pushl %ebp594; X86-NEXT: movl %esp, %ebp595; X86-NEXT: andl $-8, %esp596; X86-NEXT: subl $16, %esp597; X86-NEXT: movl 8(%ebp), %eax598; X86-NEXT: movl 12(%ebp), %ecx599; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)600; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)601; X86-NEXT: movl 16(%ebp), %eax602; X86-NEXT: movq {{[0-9]+}}(%esp), %mm0603; X86-NEXT: psrlq (%eax), %mm0604; X86-NEXT: movq %mm0, (%esp)605; X86-NEXT: movl (%esp), %eax606; X86-NEXT: movl {{[0-9]+}}(%esp), %edx607; X86-NEXT: emms608; X86-NEXT: movl %ebp, %esp609; X86-NEXT: popl %ebp610; X86-NEXT: retl611;612; X64-LABEL: tt8:613; X64: # %bb.0: # %entry614; X64-NEXT: movq %rdi, %mm0615; X64-NEXT: psrlq (%rsi), %mm0616; X64-NEXT: movq %mm0, %rax617; X64-NEXT: emms618; X64-NEXT: retq619entry:620 %v = load <1 x i64>, ptr %q621 %u = tail call <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64> %t, <1 x i64> %v)622 %s = bitcast <1 x i64> %u to i64623 call void @llvm.x86.mmx.emms()624 ret i64 %s625}626declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <1 x i64>)627 628define void @test_psrlq_by_volatile_shift_amount(ptr %t) nounwind {629; X86-LABEL: test_psrlq_by_volatile_shift_amount:630; X86: # %bb.0: # %entry631; X86-NEXT: pushl %eax632; X86-NEXT: movl {{[0-9]+}}(%esp), %eax633; X86-NEXT: movl $1, (%esp)634; X86-NEXT: movl $255, %ecx635; X86-NEXT: movd %ecx, %mm0636; X86-NEXT: movd (%esp), %mm1637; X86-NEXT: psrlq %mm1, %mm0638; X86-NEXT: movq %mm0, (%eax)639; X86-NEXT: popl %eax640; X86-NEXT: retl641;642; X64-LABEL: test_psrlq_by_volatile_shift_amount:643; X64: # %bb.0: # %entry644; X64-NEXT: movl $1, -{{[0-9]+}}(%rsp)645; X64-NEXT: movl $255, %eax646; X64-NEXT: movd %eax, %mm0647; X64-NEXT: movd -{{[0-9]+}}(%rsp), %mm1648; X64-NEXT: psrlq %mm1, %mm0649; X64-NEXT: movq %mm0, (%rdi)650; X64-NEXT: retq651entry:652 %0 = alloca i32, align 4653 call void @llvm.lifetime.start(i64 4, ptr nonnull %0)654 store volatile i32 1, ptr %0, align 4655 %1 = load volatile i32, ptr %0, align 4656 %2 = tail call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> <i64 255>, i32 %1)657 store <1 x i64> %2, ptr %t, align 8658 call void @llvm.lifetime.end(i64 4, ptr nonnull %0)659 ret void660}661 662declare void @llvm.lifetime.start(i64, ptr nocapture)663declare void @llvm.lifetime.end(i64, ptr nocapture)664 665; Make sure we shrink this vector load and fold it.666define <1 x i64> @vec_load(ptr %x) {667; X86-LABEL: vec_load:668; X86: # %bb.0:669; X86-NEXT: pushl %ebp670; X86-NEXT: .cfi_def_cfa_offset 8671; X86-NEXT: .cfi_offset %ebp, -8672; X86-NEXT: movl %esp, %ebp673; X86-NEXT: .cfi_def_cfa_register %ebp674; X86-NEXT: andl $-8, %esp675; X86-NEXT: subl $8, %esp676; X86-NEXT: movl 8(%ebp), %eax677; X86-NEXT: pshufw $68, (%eax), %mm0 # mm0 = mem[0,1,0,1]678; X86-NEXT: paddsb %mm0, %mm0679; X86-NEXT: movq %mm0, (%esp)680; X86-NEXT: movl (%esp), %eax681; X86-NEXT: movl {{[0-9]+}}(%esp), %edx682; X86-NEXT: movl %ebp, %esp683; X86-NEXT: popl %ebp684; X86-NEXT: .cfi_def_cfa %esp, 4685; X86-NEXT: retl686;687; X64-LABEL: vec_load:688; X64: # %bb.0:689; X64-NEXT: pshufw $68, (%rdi), %mm0 # mm0 = mem[0,1,0,1]690; X64-NEXT: paddsb %mm0, %mm0691; X64-NEXT: movq %mm0, %rax692; X64-NEXT: retq693 %z = load <4 x float>, ptr %x694 %y = extractelement <4 x float> %z, i32 0695 %a = insertelement <2 x float> undef, float %y, i32 0696 %b = insertelement <2 x float> %a, float %y, i32 1697 %c = bitcast <2 x float> %b to <1 x i64>698 %d = tail call <1 x i64> @llvm.x86.mmx.padds.b(<1 x i64> %c, <1 x i64> %c)699 ret <1 x i64> %d700}701 702declare <1 x i64> @llvm.x86.mmx.padds.b(<1 x i64>, <1 x i64>)703 704