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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 -code-model=small | FileCheck %s --check-prefix=X644; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 -code-model=medium | FileCheck %s --check-prefix=X645; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 -code-model=large | FileCheck %s --check-prefix=X64-LARGE6 7define double @mmx_zero(double, double, double, double) nounwind {8; X86-LABEL: mmx_zero:9; X86: # %bb.0:10; X86-NEXT: pushl %ebp11; X86-NEXT: movl %esp, %ebp12; X86-NEXT: andl $-8, %esp13; X86-NEXT: subl $16, %esp14; X86-NEXT: movq 8(%ebp), %mm015; X86-NEXT: movq 16(%ebp), %mm516; X86-NEXT: movq %mm5, (%esp) # 8-byte Spill17; X86-NEXT: movq %mm0, %mm318; X86-NEXT: paddd %mm5, %mm319; X86-NEXT: pxor %mm1, %mm120; X86-NEXT: movq %mm3, %mm621; X86-NEXT: pmuludq %mm1, %mm622; X86-NEXT: movq 24(%ebp), %mm423; X86-NEXT: movq %mm6, %mm224; X86-NEXT: paddd %mm4, %mm225; X86-NEXT: paddw %mm2, %mm026; X86-NEXT: movq %mm5, %mm127; X86-NEXT: paddw %mm0, %mm128; X86-NEXT: movq 32(%ebp), %mm529; X86-NEXT: movq %mm1, %mm730; X86-NEXT: pmuludq %mm5, %mm731; X86-NEXT: paddw %mm4, %mm732; X86-NEXT: paddw %mm7, %mm533; X86-NEXT: paddw %mm5, %mm234; X86-NEXT: paddw %mm2, %mm035; X86-NEXT: paddw %mm6, %mm036; X86-NEXT: pmuludq %mm3, %mm037; X86-NEXT: pxor %mm3, %mm338; X86-NEXT: paddw %mm3, %mm039; X86-NEXT: paddw %mm1, %mm040; X86-NEXT: pmuludq %mm7, %mm041; X86-NEXT: pmuludq (%esp), %mm0 # 8-byte Folded Reload42; X86-NEXT: paddw %mm5, %mm043; X86-NEXT: paddw %mm2, %mm044; X86-NEXT: movq2dq %mm0, %xmm045; X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)46; X86-NEXT: fldl {{[0-9]+}}(%esp)47; X86-NEXT: movl %ebp, %esp48; X86-NEXT: popl %ebp49; X86-NEXT: retl50;51; X64-LABEL: mmx_zero:52; X64: # %bb.0:53; X64-NEXT: movdq2q %xmm0, %mm054; X64-NEXT: movdq2q %xmm1, %mm555; X64-NEXT: movq %mm5, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill56; X64-NEXT: movq %mm0, %mm357; X64-NEXT: paddd %mm5, %mm358; X64-NEXT: pxor %mm1, %mm159; X64-NEXT: movq %mm3, %mm660; X64-NEXT: pmuludq %mm1, %mm661; X64-NEXT: movdq2q %xmm2, %mm462; X64-NEXT: movq %mm6, %mm263; X64-NEXT: paddd %mm4, %mm264; X64-NEXT: paddw %mm2, %mm065; X64-NEXT: movq %mm5, %mm166; X64-NEXT: paddw %mm0, %mm167; X64-NEXT: movdq2q %xmm3, %mm568; X64-NEXT: movq %mm1, %mm769; X64-NEXT: pmuludq %mm5, %mm770; X64-NEXT: paddw %mm4, %mm771; X64-NEXT: paddw %mm7, %mm572; X64-NEXT: paddw %mm5, %mm273; X64-NEXT: paddw %mm2, %mm074; X64-NEXT: paddw %mm6, %mm075; X64-NEXT: pmuludq %mm3, %mm076; X64-NEXT: pxor %mm3, %mm377; X64-NEXT: paddw %mm3, %mm078; X64-NEXT: paddw %mm1, %mm079; X64-NEXT: pmuludq %mm7, %mm080; X64-NEXT: pmuludq {{[-0-9]+}}(%r{{[sb]}}p), %mm0 # 8-byte Folded Reload81; X64-NEXT: paddw %mm5, %mm082; X64-NEXT: paddw %mm2, %mm083; X64-NEXT: movq2dq %mm0, %xmm084; X64-NEXT: retq85;86; X64-LARGE-LABEL: mmx_zero:87; X64-LARGE: # %bb.0:88; X64-LARGE-NEXT: movdq2q %xmm0, %mm089; X64-LARGE-NEXT: movdq2q %xmm1, %mm590; X64-LARGE-NEXT: movq %mm5, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill91; X64-LARGE-NEXT: movq %mm0, %mm392; X64-LARGE-NEXT: paddd %mm5, %mm393; X64-LARGE-NEXT: pxor %mm1, %mm194; X64-LARGE-NEXT: movq %mm3, %mm695; X64-LARGE-NEXT: pmuludq %mm1, %mm696; X64-LARGE-NEXT: movdq2q %xmm2, %mm497; X64-LARGE-NEXT: movq %mm6, %mm298; X64-LARGE-NEXT: paddd %mm4, %mm299; X64-LARGE-NEXT: paddw %mm2, %mm0100; X64-LARGE-NEXT: movq %mm5, %mm1101; X64-LARGE-NEXT: paddw %mm0, %mm1102; X64-LARGE-NEXT: movdq2q %xmm3, %mm5103; X64-LARGE-NEXT: movq %mm1, %mm7104; X64-LARGE-NEXT: pmuludq %mm5, %mm7105; X64-LARGE-NEXT: paddw %mm4, %mm7106; X64-LARGE-NEXT: paddw %mm7, %mm5107; X64-LARGE-NEXT: paddw %mm5, %mm2108; X64-LARGE-NEXT: paddw %mm2, %mm0109; X64-LARGE-NEXT: paddw %mm6, %mm0110; X64-LARGE-NEXT: pmuludq %mm3, %mm0111; X64-LARGE-NEXT: pxor %mm3, %mm3112; X64-LARGE-NEXT: paddw %mm3, %mm0113; X64-LARGE-NEXT: paddw %mm1, %mm0114; X64-LARGE-NEXT: pmuludq %mm7, %mm0115; X64-LARGE-NEXT: pmuludq {{[-0-9]+}}(%r{{[sb]}}p), %mm0 # 8-byte Folded Reload116; X64-LARGE-NEXT: paddw %mm5, %mm0117; X64-LARGE-NEXT: paddw %mm2, %mm0118; X64-LARGE-NEXT: movq2dq %mm0, %xmm0119; X64-LARGE-NEXT: retq120 %5 = bitcast double %0 to <1 x i64>121 %6 = bitcast double %1 to <1 x i64>122 %7 = tail call <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64> %5, <1 x i64> %6)123 %8 = tail call <1 x i64> @llvm.x86.mmx.pmulu.dq(<1 x i64> %7, <1 x i64> bitcast (double 0.000000e+00 to <1 x i64>))124 %9 = bitcast double %2 to <1 x i64>125 %10 = tail call <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64> %8, <1 x i64> %9)126 %11 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %5, <1 x i64> %10)127 %12 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %6, <1 x i64> %11)128 %13 = bitcast double %3 to <1 x i64>129 %14 = tail call <1 x i64> @llvm.x86.mmx.pmulu.dq(<1 x i64> %12, <1 x i64> %13)130 %15 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %14, <1 x i64> %9)131 %16 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %15, <1 x i64> %13)132 %17 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %16, <1 x i64> %10)133 %18 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %17, <1 x i64> %11)134 %19 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %18, <1 x i64> %8)135 %20 = tail call <1 x i64> @llvm.x86.mmx.pmulu.dq(<1 x i64> %19, <1 x i64> %7)136 %21 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %20, <1 x i64> bitcast (double 0.000000e+00 to <1 x i64>))137 %22 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %21, <1 x i64> %12)138 %23 = tail call <1 x i64> @llvm.x86.mmx.pmulu.dq(<1 x i64> %22, <1 x i64> %15)139 %24 = tail call <1 x i64> @llvm.x86.mmx.pmulu.dq(<1 x i64> %23, <1 x i64> %6)140 %25 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %24, <1 x i64> %16)141 %26 = tail call <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64> %25, <1 x i64> %17)142 %27 = bitcast <1 x i64> %26 to double143 ret double %27144}145 146declare <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64>, <1 x i64>)147declare <1 x i64> @llvm.x86.mmx.padd.w(<1 x i64>, <1 x i64>)148declare <1 x i64> @llvm.x86.mmx.pmulu.dq(<1 x i64>, <1 x i64>)149