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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE3; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=AVX4; RUN: llc < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX5; RUN: llc < %s -mtriple=i686-- -mattr=+avx512vl | FileCheck %s --check-prefix=AVX6 7; Test an isel pattern for a splatted VZLOAD.8 9define <4 x float> @movddup_load_fold(float %x, float %y) {10; SSE-LABEL: movddup_load_fold:11; SSE: # %bb.0:12; SSE-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]13; SSE-NEXT: retl14;15; AVX-LABEL: movddup_load_fold:16; AVX: # %bb.0:17; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]18; AVX-NEXT: retl19 %i0 = insertelement <4 x float> zeroinitializer, float %x, i32 020 %i1 = insertelement <4 x float> %i0, float %y, i32 121 %dup = shufflevector <4 x float> %i1, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>22 ret <4 x float> %dup23}24 25