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1; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X322; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X643; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X644 5define i32 @test1() nounwind readonly {6; X32-LABEL: test1:7; X32: # %bb.0: # %entry8; X32-NEXT: movl %gs:196, %eax9; X32-NEXT: movl (%eax), %eax10; X32-NEXT: retl11;12; X64-LABEL: test1:13; X64: # %bb.0: # %entry14; X64-NEXT: movq %gs:320, %rax15; X64-NEXT: movl (%rax), %eax16; X64-NEXT: retq17entry:18 %tmp = load ptr, ptr addrspace(256) getelementptr (ptr, ptr addrspace(256) inttoptr (i32 72 to ptr addrspace(256)), i32 31) ; <ptr> [#uses=1]19 %tmp1 = load i32, ptr %tmp ; <i32> [#uses=1]20 ret i32 %tmp121}22 23define i64 @test2(ptr addrspace(256) %tmp8) nounwind {24; X32-LABEL: test2:25; X32: # %bb.0: # %entry26; X32-NEXT: subl $12, %esp27; X32-NEXT: movl {{[0-9]+}}(%esp), %eax28; X32-NEXT: calll *%gs:(%eax)29; X32-NEXT: xorl %eax, %eax30; X32-NEXT: xorl %edx, %edx31; X32-NEXT: addl $12, %esp32; X32-NEXT: retl33;34; X64-LABEL: test2:35; X64: # %bb.0: # %entry36; X64-NEXT: {{(subq.*%rsp|pushq)}}37; X64-NEXT: callq *%gs:(%{{(rcx|rdi)}})38; X64-NEXT: xorl %eax, %eax39; X64-NEXT: {{(addq.*%rsp|popq)}}40; X64-NEXT: retq41entry:42 %tmp9 = load ptr, ptr addrspace(256) %tmp8, align 843 tail call void %tmp9(ptr undef) nounwind optsize44 ret i64 045}46 47define <2 x i64> @pmovsxwd_1(ptr addrspace(256) %p) nounwind readonly {48; X32-LABEL: pmovsxwd_1:49; X32: # %bb.0: # %entry50; X32-NEXT: movl {{[0-9]+}}(%esp), %eax51; X32-NEXT: pmovsxwd %gs:(%eax), %xmm052; X32-NEXT: retl53;54; X64-LABEL: pmovsxwd_1:55; X64: # %bb.0: # %entry56; X64-NEXT: pmovsxwd %gs:(%{{(rcx|rdi)}}), %xmm057; X64-NEXT: retq58entry:59 %0 = load i64, ptr addrspace(256) %p60 %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 061 %1 = bitcast <2 x i64> %tmp2 to <8 x i16>62 %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>63 %3 = sext <4 x i16> %2 to <4 x i32>64 %4 = bitcast <4 x i32> %3 to <2 x i64>65 ret <2 x i64> %466}67 68; The two loads here both look identical to selection DAG, except for their69; address spaces. Make sure they aren't CSE'd.70define i32 @test_no_cse() nounwind readonly {71; X32-LABEL: test_no_cse:72; X32: # %bb.0: # %entry73; X32-NEXT: movl %gs:196, %eax74; X32-NEXT: movl (%eax), %eax75; X32-NEXT: movl %fs:196, %ecx76; X32-NEXT: addl (%ecx), %eax77; X32-NEXT: retl78;79; X64-LABEL: test_no_cse:80; X64: # %bb.0: # %entry81; X64-NEXT: movq %gs:320, %rax82; X64-NEXT: movl (%rax), %eax83; X64-NEXT: movq %fs:320, %rcx84; X64-NEXT: addl (%rcx), %eax85; X64-NEXT: retq86entry:87 %tmp = load ptr, ptr addrspace(256) getelementptr (ptr, ptr addrspace(256) inttoptr (i32 72 to ptr addrspace(256)), i32 31) ; <ptr> [#uses=1]88 %tmp1 = load i32, ptr %tmp ; <i32> [#uses=1]89 %tmp2 = load ptr, ptr addrspace(257) getelementptr (ptr, ptr addrspace(257) inttoptr (i32 72 to ptr addrspace(257)), i32 31) ; <ptr> [#uses=1]90 %tmp3 = load i32, ptr %tmp2 ; <i32> [#uses=1]91 %tmp4 = add i32 %tmp1, %tmp392 ret i32 %tmp493}94