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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+movrs,+avx10.2 -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK3 4declare <64 x i8> @llvm.x86.avx10.vmovrsb512(ptr)5declare <16 x i32> @llvm.x86.avx10.vmovrsd512(ptr)6declare <8 x i64> @llvm.x86.avx10.vmovrsq512(ptr)7declare <32 x i16> @llvm.x86.avx10.vmovrsw512(ptr)8 9define <8 x i64> @test_mm512_movrsb_epi8(ptr %__A) {10; CHECK-LABEL: test_mm512_movrsb_epi8:11; CHECK: # %bb.0: # %entry12; CHECK-NEXT: vmovrsb (%rdi), %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6f,0x07]13; CHECK-NEXT: retq # encoding: [0xc3]14entry:15 %0 = tail call <64 x i8> @llvm.x86.avx10.vmovrsb512(ptr %__A)16 %1 = bitcast <64 x i8> %0 to <8 x i64>17 ret <8 x i64> %118}19 20define <8 x i64> @test_mm512_mask_movrsb_epi8(<8 x i64> %__A, i64 %__B, ptr %__C) {21; CHECK-LABEL: test_mm512_mask_movrsb_epi8:22; CHECK: # %bb.0: # %entry23; CHECK-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]24; CHECK-NEXT: vmovrsb (%rsi), %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6f,0x06]25; CHECK-NEXT: retq # encoding: [0xc3]26entry:27 %0 = tail call <64 x i8> @llvm.x86.avx10.vmovrsb512(ptr %__C)28 %1 = bitcast <8 x i64> %__A to <64 x i8>29 %2 = bitcast i64 %__B to <64 x i1>30 %3 = select <64 x i1> %2, <64 x i8> %0, <64 x i8> %131 %4 = bitcast <64 x i8> %3 to <8 x i64>32 ret <8 x i64> %433}34 35define dso_local <8 x i64> @test_mm512_maskz_movrsb_epi8(i64 %__A, ptr %__B) {36; CHECK-LABEL: test_mm512_maskz_movrsb_epi8:37; CHECK: # %bb.0: # %entry38; CHECK-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]39; CHECK-NEXT: vmovrsb (%rsi), %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6f,0x06]40; CHECK-NEXT: retq # encoding: [0xc3]41entry:42 %0 = tail call <64 x i8> @llvm.x86.avx10.vmovrsb512(ptr %__B)43 %1 = bitcast i64 %__A to <64 x i1>44 %2 = select <64 x i1> %1, <64 x i8> %0, <64 x i8> zeroinitializer45 %3 = bitcast <64 x i8> %2 to <8 x i64>46 ret <8 x i64> %347}48 49define <8 x i64> @test_mm512_movrsd_epi32(ptr %__A) {50; CHECK-LABEL: test_mm512_movrsd_epi32:51; CHECK: # %bb.0: # %entry52; CHECK-NEXT: vmovrsd (%rdi), %zmm0 # encoding: [0x62,0xf5,0x7e,0x48,0x6f,0x07]53; CHECK-NEXT: retq # encoding: [0xc3]54entry:55 %0 = tail call <16 x i32> @llvm.x86.avx10.vmovrsd512(ptr %__A)56 %1 = bitcast <16 x i32> %0 to <8 x i64>57 ret <8 x i64> %158}59 60define <8 x i64> @test_mm512_mask_movrsd_epi32(<8 x i64> %__A, i16 zeroext %__B, ptr %__C) {61; CHECK-LABEL: test_mm512_mask_movrsd_epi32:62; CHECK: # %bb.0: # %entry63; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]64; CHECK-NEXT: vmovrsd (%rsi), %zmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x6f,0x06]65; CHECK-NEXT: retq # encoding: [0xc3]66entry:67 %0 = tail call <16 x i32> @llvm.x86.avx10.vmovrsd512(ptr %__C)68 %1 = bitcast <8 x i64> %__A to <16 x i32>69 %2 = bitcast i16 %__B to <16 x i1>70 %3 = select <16 x i1> %2, <16 x i32> %0, <16 x i32> %171 %4 = bitcast <16 x i32> %3 to <8 x i64>72 ret <8 x i64> %473}74 75define <8 x i64> @test_mm512_maskz_movrsd_epi32(i16 zeroext %__A, ptr %__B) {76; CHECK-LABEL: test_mm512_maskz_movrsd_epi32:77; CHECK: # %bb.0: # %entry78; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]79; CHECK-NEXT: vmovrsd (%rsi), %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x6f,0x06]80; CHECK-NEXT: retq # encoding: [0xc3]81entry:82 %0 = tail call <16 x i32> @llvm.x86.avx10.vmovrsd512(ptr %__B)83 %1 = bitcast i16 %__A to <16 x i1>84 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer85 %3 = bitcast <16 x i32> %2 to <8 x i64>86 ret <8 x i64> %387}88 89define <8 x i64> @test_mm512_movrsq_epi64(ptr %__A) {90; CHECK-LABEL: test_mm512_movrsq_epi64:91; CHECK: # %bb.0: # %entry92; CHECK-NEXT: vmovrsq (%rdi), %zmm0 # encoding: [0x62,0xf5,0xfe,0x48,0x6f,0x07]93; CHECK-NEXT: retq # encoding: [0xc3]94entry:95 %0 = tail call <8 x i64> @llvm.x86.avx10.vmovrsq512(ptr %__A)96 ret <8 x i64> %097}98 99define <8 x i64> @test_mm512_mask_movrsq_epi64(<8 x i64> %__A, i8 zeroext %__B, ptr %__C) {100; CHECK-LABEL: test_mm512_mask_movrsq_epi64:101; CHECK: # %bb.0: # %entry102; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]103; CHECK-NEXT: vmovrsq (%rsi), %zmm0 {%k1} # encoding: [0x62,0xf5,0xfe,0x49,0x6f,0x06]104; CHECK-NEXT: retq # encoding: [0xc3]105entry:106 %0 = tail call <8 x i64> @llvm.x86.avx10.vmovrsq512(ptr %__C)107 %1 = bitcast i8 %__B to <8 x i1>108 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__A109 ret <8 x i64> %2110}111 112define <8 x i64> @test_mm512_maskz_movrsq_epi64(i8 zeroext %__A, ptr %__B) {113; CHECK-LABEL: test_mm512_maskz_movrsq_epi64:114; CHECK: # %bb.0: # %entry115; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]116; CHECK-NEXT: vmovrsq (%rsi), %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfe,0xc9,0x6f,0x06]117; CHECK-NEXT: retq # encoding: [0xc3]118entry:119 %0 = tail call <8 x i64> @llvm.x86.avx10.vmovrsq512(ptr %__B)120 %1 = bitcast i8 %__A to <8 x i1>121 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer122 ret <8 x i64> %2123}124 125define <8 x i64> @test_mm512_movrsw_epi16(ptr %__A) {126; CHECK-LABEL: test_mm512_movrsw_epi16:127; CHECK: # %bb.0: # %entry128; CHECK-NEXT: vmovrsw (%rdi), %zmm0 # encoding: [0x62,0xf5,0xff,0x48,0x6f,0x07]129; CHECK-NEXT: retq # encoding: [0xc3]130entry:131 %0 = tail call <32 x i16> @llvm.x86.avx10.vmovrsw512(ptr %__A)132 %1 = bitcast <32 x i16> %0 to <8 x i64>133 ret <8 x i64> %1134}135 136define <8 x i64> @test_mm512_mask_movrsw_epi16(<8 x i64> %__A, i32 %__B, ptr %__C) {137; CHECK-LABEL: test_mm512_mask_movrsw_epi16:138; CHECK: # %bb.0: # %entry139; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]140; CHECK-NEXT: vmovrsw (%rsi), %zmm0 {%k1} # encoding: [0x62,0xf5,0xff,0x49,0x6f,0x06]141; CHECK-NEXT: retq # encoding: [0xc3]142entry:143 %0 = tail call <32 x i16> @llvm.x86.avx10.vmovrsw512(ptr %__C)144 %1 = bitcast <8 x i64> %__A to <32 x i16>145 %2 = bitcast i32 %__B to <32 x i1>146 %3 = select <32 x i1> %2, <32 x i16> %0, <32 x i16> %1147 %4 = bitcast <32 x i16> %3 to <8 x i64>148 ret <8 x i64> %4149}150 151define <8 x i64> @test_mm512_maskz_movrsw_epi16(i32 %__A, ptr %__B) {152; CHECK-LABEL: test_mm512_maskz_movrsw_epi16:153; CHECK: # %bb.0: # %entry154; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]155; CHECK-NEXT: vmovrsw (%rsi), %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0xff,0xc9,0x6f,0x06]156; CHECK-NEXT: retq # encoding: [0xc3]157entry:158 %0 = tail call <32 x i16> @llvm.x86.avx10.vmovrsw512(ptr %__B)159 %1 = bitcast i32 %__A to <32 x i1>160 %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer161 %3 = bitcast <32 x i16> %2 to <8 x i64>162 ret <8 x i64> %3163}164